JPH0744516B2 - Data communication method between in-vehicle computers - Google Patents

Description

The present invention relates to a data communication method between vehicle-mounted computers connected by a serial channel.

[Prior Art] In recent years, many vehicles such as automobiles are equipped with a plurality of computers.
Japanese Patent Laid-Open No. 4 discloses a technique that includes first and second microcomputers and divides and processes a plurality of types of control items.

Further, in distributed processing by a plurality of computers, there are many cases in which each computer is connected by a serial channel and data required for each other is transmitted serially. Usually, between each computer, a command, an address, write data to a memory or a memory. The read data from the device is communicated via the serial channel.

In this case, the command is necessary for reading, writing, identifying special information, etc., and it is necessary to check whether or not the data transmitted by each computer is normal in order to ensure the reliability of information transmission. is there.

In addition, in Japanese Patent Laid-Open No. 55-1766 (first prior art example), when transmitting data from a transmitting side to a receiving side, one communication block is composed of a plurality of data, and between each communication block, A technique has been disclosed in which a delimiter signal indicating a delimiter of data to be transmitted / received is provided, and the delimiter signal is used at the receiving side to recognize the delimiter of the data transmitted from the transmitting side.

Further, Japanese Patent Application Laid-Open No. 63-138826 (second prior art example) discloses that
Regarding a data transmission method for transmitting data from a transmission side device to a reception side device having a plurality of devices, a transmission side device periodically transmits a communication block including data addressed to a plurality of devices to a reception side device, and a reception side device. The device compares the data addressed to each device in the communication block received this time with the data addressed to the same device in the communication block received last time, and when both data match, treats as valid data in the device of the destination of the data. By discarding mismatched data, it is possible to detect errors with a simple process of comparing data, and even if there is an error in data addressed to one device, data addressed to another device can be treated as valid. Such a technique is disclosed.

[Problems to be Solved by the Invention] However, when controlling communication between computers by software, it is difficult to increase the communication density depending on the capabilities of the computers. For example, for each 1-byte data transmission If a method such as echoing back the check data is adopted, the information transfer rate is substantially reduced, and there is a problem that the real-time property is lacking.

Further, in the first prior art example described above, the delimiter signal for recognizing the delimiter of the data is the H level signal having a longer period than the synchronizing signal and the data signal, and the receiving side recognizes this. It is necessary for the side to add a special delimiter signal in order to recognize the first data in the communication block. Further, as a means for achieving the purpose, a special H-level signal longer than the synchronization signal and the data signal is used as a delimiter signal. Therefore, the data transmission side divides the frequency of the signal from the oscillation circuit. Need additional circuits such as binary counter, one-shot multi-vibrator, multiple gate circuits, etc. Also, in order to recognize the delimiter signal on the data receiving side, re-trigger one-shot multi-vibrator, one-shot multi-vibrator, frequency division output Since additional circuits such as a bit counter for obtaining the above are required, and these additional circuits are required, the hardware configuration of the control system becomes complicated and the cost is increased.

Further, in the second prior art example, the validity of the data is judged by comparing the specific data between the respective communication blocks, and it is difficult to use it for the data communication between the computers mounted on the vehicle.

That is, in the computer mounted on the vehicle,
After detecting the engine operating state that changes from moment to moment with a sensor, inputting the signal from the sensor to the computer and processing it to obtain data such as the engine operating state, and after calculating the control amount for the actuator based on this data A signal corresponding to this control amount is output to the actuator to control the engine. Therefore, in the case where the first computer and the second computer mounted on the vehicle are connected through the serial channel to perform the bidirectional communication, when the data of the read request from the first computer is transmitted to the second computer, The data read out by the second computer in response to the read request and returned to the first computer is the above-mentioned data such as the engine operating state which changes momentarily, or the data which changes momentarily correspondingly. Since it becomes control amount data and the data between each communication block constantly changes, if the validity of the data is judged by comparing the specific data between each communication block, the frequency of matching the data is extremely low, Despite the normal communication, the data is rejected and the controllability deteriorates significantly.

In view of the above circumstances, the present invention aims to improve the data transmission efficiency when performing data communication between a plurality of computers connected by serial channels, and to ensure the reliability of data. It is intended to provide a communication method.

[Means for Solving the Problems] In order to achieve the above-mentioned object, a first data communication method between on-vehicle computers according to the present invention is a first data communication method mounted on a vehicle.
In a data communication method between an in-vehicle computer for connecting a computer and a second computer via a serial channel to perform bidirectional communication, when transmitting data from the first computer to the second computer,
In the first computer, a single communication block is configured by a plurality of data whose byte cycle is the same cycle, and a blank section in a non-communication state longer than the cycle is provided between the communication blocks, and the second computer is used. Every time data is received from the first computer in the second computer, the blank interval is longer than the reception interval of the transmission data from the first computer and a byte cycle of one data. Is compared with a preset set value that can be identified, and when the reception interval is longer than this set value, the data received this time is identified as data reception of the first byte at the beginning. .

A second data communication method between vehicle-mounted computers according to the present invention is the data communication method between the first vehicle-mounted computers, wherein data of a read request is transmitted from the first computer to the second computer. When the second computer reads the data in response to the read request and transmits the data to the first computer, the first computer treats one communication block as three identical data and the second computer. To the second computer, the same data including the data read command is transmitted three times, and when the second computer first receives the data including the data read command from the first computer, the second computer responds to the contents of the data. When the first data is read from the memory and then the same data is received a second time, the first data When the data is transmitted to the first computer, the second data is read from the memory according to the content of the data received the second time, and the same data is received the third time, the second data is transferred to the first computer. The first computer transmits the data, the first computer holds the first data transmitted from the second computer after the second data transmission, and holds the first data after the third data transmission. The data is compared with the second data transmitted from the second computer, and only when the two data match, the data read from the second computer is judged to be valid, and this data is stored in the memory. The data is stored in the data area, and when the two data are different from each other, it is determined that the communication is abnormal and the occurrence of the abnormality is recorded.

According to a third data communication method between vehicle-mounted computers according to the present invention, the first computer and the second computer mounted on the vehicle are connected by a serial channel to perform two-way communication, and the first computer is used. From above second
The data to be written or the data for setting the base address to cause the second computer to write the data, or to set the base address. The computer transmits the same data twice to the second computer, holds the data at the time of the first data transmission, transmits the data to the second computer, and transmits the data after the second data transmission. The first data sent back from the second computer is compared with the held data, and when both data match, it is determined that the communication is normal and the same data is sent again as the third data to the second computer. , If both data are different, it is judged that there is a communication error and the check data obtained by inverting all bits of the transmission value is 3 When the first computer receives the first data from the first computer, the second computer records the occurrence of an abnormality while transmitting it as eye data to the second computer. Then, when the same data is received the second time, the first data is transmitted to the first computer and the second data is used as the second data. When received, the received data is compared with the second data, and when the two data match, it is determined that the communication is normal and the received data is written in the memory, or the base address is set based on the received data. When the two data are different, it is judged that the communication is abnormal and the data is discarded.

[Operation] In the data communication method between the first vehicle-mounted computers,
In the first computer, one communication block is configured by a plurality of data whose byte cycle is the same cycle, and a blank section in a non-communication state longer than the cycle of each data is provided between each communication block When data is transmitted and the second computer receives the data every time the data is received, the reception interval is compared with a preset value capable of identifying the blank section in the non-communication state, and the reception interval is longer than the set value. , The data received this time is identified as the first byte of data received.

Further, in the second data communication method between the in-vehicle computers, the read request data is transmitted from the first computer to the second computer.
To the computer, the second computer reads the data in response to the read request, transmits the data to the first computer, and the first computer reads the data from the second computer. When the same three pieces of data including the read request command are transmitted to the second computer as one communication block, the second
Computer, at the first data reception, and 2
At the time of the first data reception, the corresponding data is read from the memory and transmitted as the first data and the second data to the first computer at the next data reception. Then, the first computer compares the received first data from the second computer with the second data, and only when the two data match in one communication block, the second computer The data read from the memory is judged to be valid, and this data is stored in the data area of the memory. In the first computer, when the first data and the second data transmitted from the second computer are different from each other in one communication block, it is determined that the communication is abnormal and the abnormality is generated. Record.

In the third data communication method between in-vehicle computers, data to be written to the second computer or data for setting a base address is transmitted from the first computer to write data to the second computer, or When setting the base address, the same data is continuously transmitted from the first computer to the second computer twice, and the second computer receives the first data and the second data at the second computer. , The received data is referred to as first data and second data, respectively. Then, in the first computer, the holding value of the data transmitted the first time and the second value after the data transmission of the second time are performed.
The first data returned from the computer is compared, and when the two data match, it is determined that the communication is normal, and the same data is again transmitted to the second computer as the third data, and the two data are different. Occasionally, it is determined that the communication is abnormal, the occurrence of the communication abnormality is recorded, and the check data in which all bits are inverted to the transmission value is transmitted to the second computer. When the second computer receives the third data from the first computer, the second computer compares the received data with the second data, and when the first computer determines that the communication is normal, the third computer compares the received data with the second data. Since the second data is transmitted as the same data, both data match and it is determined that the communication is normal, and the received data is written to the memory, or the base address is set based on the received data. When the computer determines that there is a communication error, the check data with all bits inverted is sent as the third data, so both data do not match, and it is determined that there is a communication error and the data is written or the base address is determined. Data is rejected without setting.

Embodiments of the Invention Embodiments of the present invention will be described below with reference to the drawings.

The drawings show an embodiment of the present invention, FIG. 1 is a flowchart showing a communication procedure of a main computer, FIG. 2 is a flowchart showing a communication procedure of a sub computer, FIG. 3 is a circuit block diagram of a control device, and FIG. FIG. 5 is a time chart of clock synchronous communication, and FIG. 5 is an explanatory diagram showing the structure of a communication block.

In FIG. 3, reference numeral 1 is a control unit (ECU) mounted in a vehicle such as an automobile. The ECU 1 includes a main computer 1a as a first computer and a sub computer 1b as a second computer. Two microcomputers are built in, and further peripheral circuits such as the drive circuit 1c are built in.

The main computer 1a is, for example, an 8-bit main computer.
A CPU 10, a ROM 11, a RAM 12, an I / O interface 13, a serial interface (SCI) 14, and a timer 15 are connected via a bus line 16, and the sub computer 1b has, for example, an 8-bit sub CPU 20, ROM 21, RAM22, I
/ O interface 23, serial interface (SC
I) 24 and the timer 25 are connected via a bus line 26.

Then, in the I / O interface 13 of the main computer 1a, a sensor for detecting an operating state is input to the input port.
The switches 30 are connected, and the actuators 31 such as injectors and ignition coils are connected to the output port via the drive circuit 1c.
In the I / O interface 23 of 1b, the knock sensor 32 is connected to the input port.

The ROM 11 stores an engine control program such as fuel injection control, ignition timing control, a communication program for data communication with the sub computer 1b, and fixed control data, while the ROM 21 stores the ROM 21. A knock detection processing program and a communication program for data communication with the main computer 1a are stored.

At the time of system startup, the main CPU 10 sends fixed data such as an ignition timing map to the sub computer 1 via the SCI 14.
Then, the ignition timing, the fuel injection pulse width and the like are calculated based on the engine operating state parameters from the sensors and switches 30 and output to the actuators 31, and the ignition timing and the like to the sub computer 4b. Send engine control information of.

The sub CPU 20 receives the engine control information from the main computer 1a via the SCI 24 and processes the signal from the knock sensor 32 to process the main computer.
Send to 1a. As a result, if a knock occurs, the main computer 1a retards the ignition timing to eliminate the knock, and always controls the engine to an appropriate state.

The SCIs 14 and 24 are connected to each other by respective lines of a clock signal CLK, a transmission signal TX, and a reception signal RX, and the main computer 1a is synchronized with the clock signal CLK supplied from the timer 15 of the main computer 1a. And the sub-computer 1b perform clock-synchronized full-duplex bidirectional communication.

In this clock synchronous communication, as shown in FIG. 4, the LSB (bit 0) of the transmitted data DATA is changed to the MSB.
Each bit up to (bit 7) is the clock signal CLK
Strobe at the rising edge of.

Next, a communication procedure between the computers 1a and 1b in the ECU 1 will be described.

In data communication between the main computer 1a and the sub computer 1b, as shown in FIG. 5, DATA1, DATA
A 3-byte data composed of 2, DATA3 is used as one block, and communication of a byte cycle with a cycle T (for example, T = 4 ms) is performed. Following this one block of communication block T XB, a blank section in a non-communication state T BLANK is set, and the first byte data DATA1 which is the head data is detected by this blank section T BLANK.

In this head data, the command C OM that indicates the communication mode is indicated by the upper 2 bits.
The C OM has the following system, for example.

01 …… Write mode (writing data from main computer 1a to sub computer 1b) 10 …… Read mode (reading data from sub computer 1b to main computer 1a) 11 …… Base address mode (setting of base address described later) The data communication from the second byte onward is started when the communicable code is returned from the sub computer 1b at the timing of the data communication of the first byte, and operates as follows according to each mode.

(Write Mode and Base Address Mode) When the write data of the second byte is transmitted from the main computer 1a, the value received in the first byte of the sub computer 1b is returned as the first data. In the main computer 1a, by matching the first byte transmission value and the reply value (first data) from the sub computer 1b at the second byte, the first byte transmission value is normally stored in the sub computer 1b. It is possible to confirm whether or not it has been received. When the communication is normal, the third byte transmission value is the same data as the second byte transmission value, and when the communication is abnormal, the third byte transmission value is all the bits of the second byte transmission value. Is transmitted as inverted check data.

On the other hand, the sub-computer 1b determines whether the received value from the first byte to the third byte is normal by matching the second byte received value and the third byte received value as the second data. If it is possible and abnormal, writing of the received data is stopped.

(Read mode) The main computer 1a sends the same data including the command C OM from the first byte to the third byte, while the sub computer 1b sends the read data with the first byte in the first byte.
No., and the same read data is returned as second data in the third byte.

In the main computer 1a, it is possible to determine whether the read data is normal or not based on the match between the second byte reception value (first data) and the third byte reception value (second data) from the sub computer 1b.

The communication procedure of each computer 1a, 1b will be specifically described below with reference to the flowcharts of FIGS.

(Communication Procedure of Main Computer 1a) The flowchart of FIG. 1 is a communication routine of the main computer 1a activated at every cycle T of the byte cycle, and the first step S101 is the count value of the transmission counter.
This is a multi-selection step in which conditional branching is performed by M CNT. That is, 0 to 1,2,
Count value M of the transmission counter that counts up to 3
Depending on CNT, steps S101 to S102, S104, S11
Branch to 3, S124.

First, in step S101 described above, the count value M of the transmission counter is
When CNT is “0”, the communication blank section T BLANK
Then, the process branches from step S101 to step S102 to set the communication mode, and then proceeds to step S103 to count up the transmission counter (M CNT ← M CNT + 1),
Exit the routine.

Then, when the next routine is started, and the count value M CNT of the transmission counter is “1” in step S104 and the first data is transmitted, the process branches from step S101 to step S104 to determine the previously set mode, In the base address setting mode, the process branches from step S104 to step S105, in the write mode, from step S104 to step S106, and in the read mode, branches from step S104 to step S107.

First, the base address setting mode will be explained.
In this base address setting mode, step S1
In 05, with 2 bits of command C OM as the high order ,. The upper 2 bits are the lower 6 bits AD of the base address AD BASE
1 byte data including BASE / L is transmitted data T XDATA
Set to (T XDATA ← C OM + AD BASE / L), step S1
Go to 08.

The above base address AD BASE is an address that becomes a reference in advance when addressing the memory space of the sub CPU 20. After setting the base address AD BASE, only the offset address AD OFFSET of less than 1 byte is specified, and the actual physical address is specified. Is specified by the logical sum of the base address AD BASE and the offset address AD OFFSET to reduce the number of communication bytes.

That is, when the sub computer 1b has 8 bits, its address space is 64 Kbytes (0000 to FFF in hexadecimal class).
The specification of F) usually requires byte data, but
If the above-mentioned base address AD BASE is set, then 1
The physical address can be specified by the logical address by the offset address value AD OFFSET less than byte, and the number of communication bytes can be reduced to improve the efficiency in data transfer.

On the other hand, when the write mode is set in step S104, 1 byte of data obtained by adding the offset address AD OFFSET (6 bits) to 2 bits of the command C OM is set in the transmission data T XDATA in step S106 (T XDATA ← C OM + AD
OFFSET) Proceeds to step S108, and in the read mode, at step S107, similarly, add offset address AD OFFSET (6 bits) to 2 bits of command C OM.
Set byte data to send data T DATA (T XDAT
A ← C OM + AD OFFSET), proceed to step S108.

Then, from the above steps S105, S106, S107 to step S1.
When it proceeds to 08, the transmission data T XDATA is changed to the 11th byte data DAT.
The data is stored in the work area of (DATA1 ← T XDATA) RAM12 as A1 and transmitted to the sub computer 1b via SCI14 in step S109, and 1 byte of data is received from the sub computer 1b and the process proceeds to step S109.

In step S110, the data from the sub-computer 1b received in step S109 is checked and the upper 2
When the bit is "00", the sub-computer 1b determines that communication is possible, advances to step S111, counts up the transmission counter (MCNT ← MCNT + 1), and exits the routine.

On the other hand, when the upper 2 bits of the data from the sub computer 1b are "11" in step S110, the sub computer 1b determines that the communication is impossible and branches to step S112 to clear the transmission counter (M CNT ← 0 ), The next cycle is set to blank, and data communication from the first byte is performed again.

Next, the routine is started again, and when the count value M CNT of the transmission counter is “2” in step S101, that is, when the second byte data DATA2 is communicated, a mode determination is performed in step S113, and in the base address setting mode, The process proceeds from step S113 to step S114 and the base address AD B
The upper byte AD BASE / U of ASE is set to the transmission data T XDATA (T XDATA ← AD BASE / U), and the process proceeds to step S116.

When the write mode is set in step S113, the process proceeds from step S113 to step S115, and the write data W DATA to be written in the memory of the already-addressed subcomputer 1b is set in the transmission data T XDATA (T
XDATA ← W DATA), the process proceeds to step S116.

Then, when the process proceeds from step S114 or step S15 to step S116, the transmission data T XDATA is stored as the second byte data DATA2 in the work area of the RAM 12 (DATA ← T DATA) and is transmitted to the sub computer 1b at step S117. , 1-byte data is received from the sub computer 1b, and the process proceeds to step S118.

In step S118, it is checked whether or not the data R XDATA received from the sub computer 1b in step S117 matches the first byte data DATA1 already transmitted to the sub computer 1b. When R XDATA = DATA1, communication is normal. And jumps from step S118 to step S123, and when R XDATA ≠ DATA1 in step S118, communication is not normally performed, and it is determined that correct data was not received by the sub computer 1b. Step
The process proceeds from step S118 to step S119 to set the error flag FLAG1 (FLAG1 ← 1), then proceeds to step S123 to count up the transmission counter (MCNT ← MCNT + 1) and exit the routine.

That is, when the first byte data DATA1 which is the head data of the communication block T XB is transmitted from the main computer 1a, at the same time, the sub computer 1b returns to the main computer 1a a code indicating whether the data can be received,
When the communication is possible, the second byte data DATA2 is transmitted from the main computer 1a according to the communication mode. The sub computer 1b returns the first byte data DATA1 received from the main computer 1a at the transmission timing of the second byte data DATA2 from the main computer 1a. Therefore, in the main computer 1a, the first byte data stored in the work area of the RAM 12 is stored. Whether or not the communication is normally executed can be determined by whether or not the byte data DATA1 and the received data R XDATA from the sub computer 1b match.

On the other hand, in the read mode in step S113, the process proceeds from step S113 to step S120, and the command C OM
1 byte of data, which is the offset address AD OFFSET (6 bits) added to the 2 bits of, is set to the transmission data T XDATA (T XDATA ← C OM + AD OFFSET), and step S121
Send and receive with the sub computer 1b.

In this read mode, the second byte of transmission data
When T XDATA transmits the same data as the first byte data DATA1 and receives the contents of the previously addressed memory from the sub computer 1b, the received data R XDATA is stored in the RAM 12 as the second byte data DATA2 in step S122. Store in work area (DATA2 ← R XDATA), step S123
Count up the transmission counter with (M CNT ← M CNT +
1) Exit the routine.

Further, next, in the communication routine, when the count value M CNT of the transmission counter is “3” in step S101, that is, when the third byte data DATA3 is transmitted, mode determination is performed in step S124, and in the base address setting mode, from step S124. Proceed to step S125, and base address AD B
Set the upper byte AD BASE / U of ASE to the transmission data T XDATA again (T XDATA ← AD BASE / U) and proceed to step S127. In the write mode, proceed from step S124 to step S126 to write data W DATA. Transmission data T XDAT
Set it to A again (TXDATA ← WDATA), and proceed to step S127.

In step S127, it is determined from the value of the error flag FLAG1 whether communication was normally performed last time, and FLAG1 = 0.
That is, when the communication is executed normally, step S129
Jump to and execute transmission / reception to / from the sub computer 1b, and if FLAG1 = 1, that is, if communication is abnormal, the process proceeds from step S127 to step S128, and the transmission data T
All bits of XDATA are inverted, and transmission / reception to / from the sub computer 1b is executed in step S129. That is, if the data communication up to the second byte is executed normally, the third byte data DATA3 transmits the same data as the second byte data DATA2, and if the communication is abnormal, the third byte data DATA3.
Sends data in which all bits of the second byte data DATA2 are inverted.

Next, when proceeding from step S129 to step S130,
Whether or not the communication is normally performed is determined by whether or not the data R XDATA received from the sub computer 1b and the second byte data DATA2 transmitted to the sub computer 1b match.

If the communication is normally performed, the same data as the already transmitted second byte data DATA2 is returned from the sub computer 1b, so that R XDATA = DAT in the above step S130.
When it is A2, it can be determined that the communication of the 3-byte data has been normally executed, the process jumps from step S130 to step S137 to clear the transmission counter (MCNT ← 0) and exits the routine.

If R XDATA ≠ DATA2 in step S130,
Since there is a communication error, the above steps S130 to S1
Go to step 31 and set the error flag FLAG2 (FLAG2 ←
1) Clear the transmission counter in step S137 (M CN
T ← 0) Exit the routine.

On the other hand, if the read mode is selected in step S124, the flow advances from step S124 to step S132 to execute the command C OM.
2 bytes of offset address AD OFFSET (6 bits) is added to 1 byte data to transmit data T XDATA (T XDATA ← COM + AD OFFSET), and this transmit data T XDATA is transmitted to sub computer 1b in step S133. At the same time, it receives 1-byte data from the sub computer 1b.

Then, the process proceeds from step S133 to step S134, and the data R XDATA received from the sub computer 1b is the second byte data DATA already received from the sub computer 1b.
It is determined whether or not it matches 2.

If R XDATA = DATA2 in step S134 above, it means that the communication is normally performed. Therefore, the process proceeds from step S134 to step S135 and the data received from the sub computer 1b is received.
Store R XDATA in the data area of RAM12 as fixed data, go to step S137, clear the transmission counter (M CNT ← 0), and exit the routine. If R XDATA ≠ DATA2, there is a communication error. Then, the process proceeds from step S134 to step S136 to set the error flag FLAG2 (FLA
G2 ← 1), the transmission counter is cleared in step S137 (MCNT ← 0), and the routine exits.

The error flags FLAG1 and FLAG2 are cleared by performing an error check in another routine.

(Communication procedure of the sub computer 1b) On the other hand, in the sub computer 1b, the communication routine shown in FIG. 2 is started each time data is received from the main computer 1a.
Set to TR (TR ← reception interval), then this time fluctuation
In step S202, TR is compared with the set value T SET.

This set value T SET is longer than the cycle T (for example, T = 4 ms) of the byte cycle in the communication of one lock data, and is a value that can identify the blank section T BLANK between the communication blocks T XB (for example, T SET = 6 ms), and when TR> T SET in the above step S202, the reception interval is longer than the cycle T of the normal byte cycle, and the first data reception after the blank section T BLANK, that is, the first It can be determined that the byte data has been received, and step S203
To clear the count value S CNT of the reception counter (S CNT
← 0).

In other words, the number of bytes required for communication can be minimized to improve the data transfer efficiency without requiring special data in order to identify the leading data at the start of communication.

At the transmission timing of the head data from the main computer 1a at this time, a reception permission code SC described later is sent back to inform the main computer 1a whether or not the sub computer 1b is in the communicable state. The data communication of the second byte onward with 1a is started.

Then, when proceeding from step S203 to step S204,
Interpret the upper 2 bits (R XDATA) B7B6 of the received data R XDATA, that is, the command C OM, and (R XDATA) B7B6 = 11,
That is, the command C OM for instructing the base address mode
In the case of, the process proceeds from step S204 to step S205 to set the base address mode and proceeds to step S207, and when (R XDATA) B7B6 = 01, that is, the command C OM for instructing the write mode, the process proceeds from step S204 to step S206. Go to and set to light mode and step
Proceed to S27.

When the process proceeds from step S205 or step S206 to step S207, the received data R XATA is stored in the work area of the RAM 22 as the first byte data DATA1 (DATA1 ← R XDATA), and the received data R XDAT is received in step S208.
Set A to the reply data to the main computer 1a (transmission data from the sub computer 1b) T XDATA (T XDA
TA ← R XDATA), go to step S222 and count up the count value S CNT of the reception counter (S CNT ← S CNT +
1) Exit the routine.

When (R XDATA) B7B6 = 10 in step S204, that is, the command C OM for instructing the read mode,
The procedure proceeds from step S204 to step S209 to set the read mode. In step S210, the memory contents (AD BASE + AD OFFSET) are read from the physical address of the RAM22 determined by the base address AD BASE and the offset address AD OFFSET, and the contents of this memory ( Set AD BASE + AD OFFSET) to the reply data T XDATA to the main computer 1a (T
XDATA ← (AD BASE + AD OFFSET)), similarly step
The receive counter S CNT is incremented in S222 (S CNT
← S CNT + 1) Exit the routine.

The reply data T XDATA set in step S208 or step S210 is returned at the timing of the next second byte data transmission from the main computer 1a. In the base address mode and the write mode, the reply data TXDATA from the main computer 1a is returned. The same check data as 1-byte data DATA1 is returned, and in read mode, the base address AD BASE and offset address A
Contents of RAM22 specified by D OFFSET (AD BASE + AD
OFFSET) is returned.

On the other hand, in step S202, TR ≦ T SET, that is, the second
When it is the data reception of the byte and subsequent bytes, the process branches from step S202 to step S211 and it is determined from the count value S CNT of the reception counter whether the second byte data is received or the third byte data is received.

When S CNT = 1 in the above step S211, that is, when the second byte data is received, the above steps S211 to S2 are performed.
In step S213, the received data R XDATA is stored in the work area of the RAM 22 as the second byte data DATA2 (DATA2 ← R XDATA).

Then, the process proceeds from step S213 to step S214, and the previously received first byte data DATA1 is set as the reply data T XDATA to the main computer 1a (T XDATA ← DA
TA1), in step S222, the reception counter is incremented (SCNT ← SCNT + 1) and the routine exits.

In the read mode in step S212, the process proceeds from step S212 to step S215, and is determined by the base address AD BASE and the offset address AD OFFSET.
From the physical address of RAM22 to the memory contents (AD BASE + AD O
FFSET) is read and the contents of this memory (AD BASE + AD OFF
SET) to the reply data T XDATA to the main computer 1a (T XDATA ← (AD BASE + AD OFFSET), and similarly, in step S222, the reception counter S CNT is incremented (S CNT ← S CNT + 1) and the routine exits. .

On the other hand, if S CNT ≠ 1 in step S211, the third
It is byte data communication, and proceeds from step S211 to step S216 to perform mode determination.When in read mode, jumps from step S216 to step S221.When in base address mode, from the main computer 1a in step S217. The received data R XDATA is compared with the second byte data DATA2 stored in RAM22.

As described above, the data transmitted from the main computer 1a is the same data in the second byte and the third byte when the communication is normally performed, and is the third byte when the communication is abnormal. Since the data of is the data in which all the bits of the data of the second byte is inverted, the above step S2
When R XDATA ≠ DATA2 in 17, there is an abnormality in communication, and therefore the process jumps from step S217 to step S221. When R XDATA = DATA2, communication is normal.
From step S217 to step S218, the second byte data DATA2 is set in the upper byte and the first byte
Byte data (DATA1) 00 that shifts the lower 6 bits of byte data DATA1 to the upper and sets the lower 2 bits to "00"
To the lower byte and set the base address AD BASE (AD BASE ← DATA2 + (DATA1) 00) Step S221
Go to.

If the write mode is selected in step S216, the process proceeds from step S216 to step S219, and similarly, the received data R XDATA from the main computer 1a is compared with the second byte data DATA2 stored in the RAM 22. , R XDA
When TA ≠ DATA2, the above steps S219 to S221
Jump to, and when R XDATA = DATA2, go to step S2 above
The process proceeds from step 19 to step S220, and the received data R XDATA from the main computer 1a is written as the final data in the physical address of the RAM 22 determined by the base address AD BASE and the offset address AD OFFSET ((AD BASE + AD OFF
SET) ← R XDATA) and proceed to step S221.

Then, according to each mode, the above steps S216, S218, S220
From each step of step S221, if the communication is possible, the upper two bits are "00", and if the communication is not possible, the upper two bits are "11".
The reply data to a is set to T XDATA, and the reception counter S CNT is incremented in step S222 (S CNT ← S CNT
+1) Exit the routine.

This reception permission code SC is returned to the main computer 1a at the data transmission timing of the first byte in the next communication block T XB activated by the main computer 1a.

As described above, according to the first aspect of the present invention, in the first computer, one communication block is configured by a plurality of data having the same byte cycle, and each communication block A blank section in a non-communication state that is longer than each data cycle is provided between them, and data is transmitted to the second computer, and the reception interval and the blank section in the non-communication state are identified every time the second computer receives data. When the reception interval is longer than the set value, the data received this time is identified as the data reception of the first byte at the beginning. Without adding a special signal to recognize the top data, it is simply a blank section in a non-communication state that is longer than the byte cycle period of each data in the communication block. You only have to wait, and by a simple method, accurately and reliably recognize the top data in the communication block,
It is possible to secure the reliability of communication while minimizing the number of data by communication, improve the data transmission efficiency, shorten the processing time, and improve the controllability. Further, it is possible to easily cope with the situation without requiring an additional circuit, without changing the hardware configuration, and thus without increasing the cost.

According to the second aspect of the present invention, in addition to the above effects, the first computer transmits the read request data to the second computer, and the second computer reads the data in response to the read request. Send it to computer 1,
When the first computer reads the data from the second computer, the first computer transmits the same three pieces of data including the read request command to the second computer as one communication block, The computer reads the corresponding data from the memory at the first data reception and the second data reception, and transmits the corresponding data as the first data and the second data to the first computer at the next data reception. The first data and the second data received from the second computer are compared with each other, and the data read from the second computer is read only when the two data match in one communication block. Since this data is judged to be valid and stored in the data area of the memory, it can be stored between the computers installed in the vehicle. In the data communication, even when the data in the second computer is transmitted to the first computer in response to a request from the first computer and the data is read by the first computer, the data may change moment by moment. Therefore, it is possible to appropriately judge the validity of the data and obtain the effect that the reliability of the data can be secured. Further, in the first computer, when the first data and the second data transmitted from the second computer are different from each other in one communication block, it is determined that the communication is abnormal and the abnormality is generated. Since the data is recorded, it is possible to easily confirm or specify that a communication error has occurred by connecting an external device and reading the recorded contents during inspection or repair work. Can be improved.

According to the third aspect of the present invention, the first computer transmits the data to be written to the second computer or the data for setting the base address to write the data to the second computer, or the base address. When the setting of 1 is performed, the same data is continuously transmitted from the first computer to the second computer twice, and the second computer receives the first data and
When receiving the data for the first time, the received data are
And the second data, the first computer compares the held value of the first transmitted data with the first data returned from the second computer after the second data transmission, When both data match, it is determined that the communication is normal and the same data is transmitted again as the third data to the second computer. When both data are different, it is determined that the communication is abnormal and all bits of the transmission value are inverted. Send the check data to the second computer. Then, when the second computer receives the third data from the first computer, the second computer compares the data with the second data, and when the first computer determines that the communication is normal, Since the third data is transmitted as the same data, it is determined that both data match and the communication is normal, and the received data is written in the memory, or the base address is set based on the received data. When it is determined that there is a communication error in the computer, the check data with all bits inverted is sent as the third data, so both data do not match. Since the data is rejected without performing the setting of, the communication abnormality detected by the first computer It is possible to inform the computer, and it is possible to improve data reliability when writing data to the second computer or setting the base address, and it is possible to double check the first computer and the second computer. Therefore, erroneous data is not written in the second computer, or the base address is prevented from being set by erroneous data, and the controllability is improved. Further, when the first computer compares the first data and the second data with each other as a result of the comparison, when the two data are different from each other, it is determined that a communication abnormality has occurred and the abnormality is recorded. Similarly to the invention, during inspection or repair work, it is possible to easily confirm or specify that a communication error has occurred by connecting an external device and reading the recorded contents. It is possible to improve the property.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 shows an embodiment of the present invention, FIG. 1 is a flow chart showing a communication procedure of a main computer, FIG. 2 is a flow chart showing a communication procedure of a sub computer, and FIG. 3 is a control device. FIG. 4 is a circuit block diagram of FIG. 4, FIG. 4 is a time chart of clock synchronous communication, and FIG. 5 is an explanatory diagram showing a configuration of a communication block. 1a… Main computer 1b …… Sub computer T XB …… Communication block T BLANK …… Blank area DATA1 …… First byte data DATA2 …… Second byte data DATA3 …… Third byte data T XDATA …… Send data R XDATA ……received data

Claims (3)

[Claims] 1. A data communication method between vehicle-mounted computers, wherein a first computer and a second computer mounted on a vehicle are connected to each other via a serial channel to perform bidirectional communication, wherein the first computer to the second computer. When transmitting data to another computer, the first computer uses one of a plurality of data whose byte cycle is the same period.
In addition to configuring one communication block, a blank section in a non-communication state longer than the above cycle is provided between the communication blocks, and the blank section is transmitted to the second computer. In the second computer, the blank section is transmitted from the first computer. Every time the data is received, the reception interval of the transmission data from the first computer is compared with a preset setting value capable of identifying the blank section longer than the byte cycle of one data. When the reception interval is longer than the above, the data communication method between the vehicle-mounted computers is characterized in that the data received this time is identified as data reception of the first byte at the beginning. 2. A read request data is transmitted from the first computer to the second computer, the second computer reads data according to the read request, and the data is transmitted to the first computer. When doing
In the first computer, one communication block is 3
The same data including a data read command is transmitted three times as the same data to the second computer, and the second computer first receives the data including the data read command from the first computer. At this time, the first data is read from the memory according to the content of this data, and when the same data is received the second time, the first data is transmitted to the first computer and the second data is received. When the second data is read from the memory according to the content of the received data and the same data is received for the third time, the second data is transferred to the first data.
To the computer, the first computer retains the first data transmitted from the second computer after the second data transmission, and retains the first data after the third data transmission. The second transmitted from the second computer
The data read from the second computer is judged to be valid only when both data match, and this data is stored in the data area of the memory. 2. The data communication method between vehicle-mounted computers according to claim 1, wherein the occurrence of the abnormality is recorded as a communication abnormality. 3. A first computer and a second computer mounted on a vehicle are connected by a serial channel to perform bidirectional communication, and the first computer to the second computer.
Data to be written or data for setting a base address to cause the second computer to write the data or set the base address to the computer, the data communication method between vehicle-mounted computers according to the first aspect, The computer transmits the same data twice to the second computer, holds the data at the time of the first data transmission, transmits the data to the second computer, and transmits the data after the second data transmission. The first data sent back from the second computer is compared with the held data, and when both data match, it is determined that the communication is normal and the same data is sent again as the third data to the second computer. , If both data are different, it is judged that there is a communication error and the check data obtained by inverting all bits of the transmission value is 3 When the first computer receives the first data from the first computer, the second computer records the occurrence of an abnormality while transmitting the first data to the second computer.
Then, when the same data is received the second time, the first data is transmitted to the first computer and the second data is used as the second data. When received, the received data is compared with the second data, and when the two data match, it is determined that the communication is normal and the received data is written in the memory, or the base address is set based on the received data. A data communication method between vehicle-mounted computers, characterized in that when the two data are different, it is determined that communication is abnormal and the data is rejected.