JPH07327176A - Bs tuner - Google Patents

Bs tuner

Info

Publication number
JPH07327176A
JPH07327176A JP6141254A JP14125494A JPH07327176A JP H07327176 A JPH07327176 A JP H07327176A JP 6141254 A JP6141254 A JP 6141254A JP 14125494 A JP14125494 A JP 14125494A JP H07327176 A JPH07327176 A JP H07327176A
Authority
JP
Japan
Prior art keywords
tuner
block
section
video
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6141254A
Other languages
Japanese (ja)
Inventor
Naoyuki Ishiguro
黒 直 幸 石
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsumi Electric Co Ltd
Original Assignee
Mitsumi Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsumi Electric Co Ltd filed Critical Mitsumi Electric Co Ltd
Priority to JP6141254A priority Critical patent/JPH07327176A/en
Publication of JPH07327176A publication Critical patent/JPH07327176A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To avoid interference between a tuner section and a video image processing section by forming a signal line to an external connection terminal of a printed circuit board and an earth line to the opposite side. CONSTITUTION:A slot 7 used to separate a tuner block X and a printed circuit board 3 is formed on the front side of the board 3, and a tuning section, a demodulation section and a detection section are arranged and mounted onto the block X. Furthermore, a video image processing section including a video amplifier separating and amplifying a synchronizing signal and a video signal is arranged to a video signal block Y oaf the board 3 and a video output of the video image processing section is outputted to a video terminal 8 arranged to the same side of an external connection terminal 5. The tuner block X and the video signal block Y are interconnected by a signal line 9 formed to the same side of the terminals 5, 8 and an earth line parted from the line 9 with a slot. Then the block X of the board 3 is enclosed by a shield case 4 and the tuning section, the demodulation section and the detection section are completely shielded by the case 4.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はテレビジョンセットやビ
デオテープレコーダ等のAV機器に用いるBSチューナ
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a BS tuner used for AV equipment such as a television set and a video tape recorder.

【0002】[0002]

【従来の技術】周知のように、静止衛星電波を受信する
テレビジョンセットやビデオテープレコーダ等のAV機
器においては、静止衛星電波を検波して映像信号と音声
信号に分離するBSチューナが用いられるが、従来のB
Sチューナは図4及び図5に示すような構造と回路構成
にされている。
As is well known, in an AV device such as a television set or a video tape recorder that receives a stationary satellite radio wave, a BS tuner that detects the stationary satellite radio wave and separates it into a video signal and an audio signal is used. But the conventional B
The S tuner has a structure and a circuit configuration as shown in FIGS.

【0003】即ち、図4に示すように、従来のBSチュ
ーナはBSアンテナ及びテレビジョンセット等のAV機
器にそれぞれ接続される一対のコネクタ1A,2Aを備
えるもので、その回路基板3Aの表面には、図5に示す
ように、チューナ回路を構成する同調部D、復調部F、
検波部Kが配置される。そして、同回路基板3A全体は
シールドケース本体4a、前面カバー4b、裏面カバー
4cからなるシールドケース4A中に収容され、このシ
ールドケース4Aにより同調部D、復調部F、検波部K
の相互間と外部磁界との電・磁気的な分離が図られる。
That is, as shown in FIG. 4, a conventional BS tuner has a pair of connectors 1A and 2A respectively connected to a BS antenna and AV equipment such as a television set, and is provided on the surface of a circuit board 3A thereof. As shown in FIG. 5, the tuning section D, the demodulation section F,
The detection unit K is arranged. The entire circuit board 3A is housed in a shield case 4A composed of a shield case body 4a, a front cover 4b, and a back cover 4c. The shield case 4A allows the tuning section D, the demodulation section F, and the detection section K to be detected.
Electromagnetic and magnetic separation between each other and the external magnetic field is achieved.

【0004】また、前記回路基板の一側には複数の外部
接続用端子5Aが配列され、これらの外部接続用端子5
Aを介してAV機器の映像処理部E及び音声処理部Oに
映像信号及び音声信号が出力される。
A plurality of external connection terminals 5A are arranged on one side of the circuit board, and these external connection terminals 5A are arranged.
The video signal and the audio signal are output to the video processing unit E and the audio processing unit O of the AV device via A.

【0005】[0005]

【発明が解決しようとする課題】ところで、前述したよ
うな構造のBSチューナにおいては、最近の新機能AV
機器の発展に伴って、従来では、AV機器の一部を構成
していた映像信号アンプ部を含む映像処理部Eをも、B
Sチューナの回路基板3Aに搭載することが要請される
ことが多くなっているが、このような要求を満足させた
BSチューナにあっては、1枚の回路基板3Aに映像処
理部Eまでを搭載することになるので、微妙なチューナ
部と映像処理部Eとの間の相互干渉が起き易く、信頼性
の高いBSチューナを得ることが困難であった。また、
映像処理部Eまでを搭載したBSチューナを新たに設計
すると、比較的製造原価の高いシールドケース本体4
a、前面カバー4b、裏面カバー4cの金型を改めて製
作しなければならず、製品原価が非常に割高なものとな
ってしまう問題がある。
By the way, in the BS tuner having the above-mentioned structure, the recent new function AV
With the development of the equipment, the video processing portion E including the video signal amplifier portion, which has conventionally constituted a part of the AV equipment, is
It is often requested that the S tuner is mounted on the circuit board 3A. However, in a BS tuner that satisfies such requirements, one circuit board 3A includes up to the video processing section E. Since it is mounted, a subtle mutual interference between the tuner unit and the video processing unit E is likely to occur, and it is difficult to obtain a highly reliable BS tuner. Also,
If a BS tuner equipped with a video processing unit E is newly designed, the shield case body 4 with a relatively high manufacturing cost
Since the dies for the a, the front cover 4b, and the back cover 4c have to be manufactured again, there is a problem that the product cost becomes very expensive.

【0006】本発明の第1の目的は、前述したような従
来のBSチューナの問題に鑑み、1枚の回路基板に映像
処理部までを搭載したものであって、チュナー部と映像
処理部Eとの間の相互干渉がないBSチューナ構造を得
るにある。また、本発明の第2の目的は、前記第1の目
的を達成できるBSチューナであって、従来用いていた
シールドケースを併用できる映像処理部付BSチューナ
を得るにある。
In view of the problems of the conventional BS tuner as described above, the first object of the present invention is to mount a video processing section on a single circuit board, and the tuner section and the video processing section E are provided. It is to obtain a BS tuner structure without mutual interference between and. A second object of the present invention is to provide a BS tuner that can achieve the first object, and a BS tuner with an image processing unit that can be used together with a shield case that has been used conventionally.

【0007】[0007]

【課題を解決するための手段】本発明によれば、前記第
1の目的は、回路基板の表面を一側の外部接続端子の配
列方向に隣り合ったチューナブロックと映像信号ブロッ
クに分け、受信電波の同調部、復調部、検波部を前記チ
ューナブロックに配置し、前記検波部で検波された映像
信号の増幅処理を行う映像処理部を前記映像信号ブロッ
クに配置すると共に、前記外部接続端子側の信号ライン
及び同信号ラインと反対側のアースラインで前記検波部
と前記映像処理部とを接続したBSチューナにより達成
される。また、前記第2の目的は、前記第1の目的を達
成できるBSチューナであって、前記回路基板のチュー
ナブロックと前記映像信号ブロックの境界部に形成され
たスロットと、同スロットにより区画された前記回路基
板のチューナブロック全体を包囲するシールドケースと
を備えるBSチューナにより達成される。
According to the present invention, the first object is to divide the surface of a circuit board into a tuner block and a video signal block which are adjacent to each other in the arrangement direction of the external connection terminals on one side, and receive them. A radio wave tuning unit, a demodulation unit, and a detection unit are arranged in the tuner block, a video processing unit for amplifying the video signal detected by the detection unit is arranged in the video signal block, and the external connection terminal side is provided. This is achieved by a BS tuner in which the detection section and the video processing section are connected to each other through the signal line and the ground line on the side opposite to the signal line. The second object is a BS tuner that can achieve the first object, and is divided by a slot formed at a boundary portion between the tuner block of the circuit board and the video signal block, and the slot. And a shield case that surrounds the entire tuner block of the circuit board.

【0008】[0008]

【実施例】以下、図1から図3について本発明の実施例
の詳細を説明する。図1から理解されるように、本発明
のBSチューナは、BSアンテナ及びテレビジョンセッ
ト等のAV機器にそれぞれ接続される一対のコネクタ
1,2を備えるもので、その回路基板3の表面は、外部
接続端子5の整列方向に隣り合ったチューナブロックX
及び映像信号ブロックYに分割される。即ち、図3に示
すように、回路基板3の表面には前記チューナブロック
Xと回路基板3を分離させる立て向きのスロット7が形
成され、前記チューナブロックXにはBSアンテナから
の受信信号を入力される同調部D、同同調部Dで同調さ
れた周波数の受信波を処理可能な周波数に復調させる復
調部F、復調波から映像信号及び音声信号を取り出す検
波部Kが配置かつ搭載される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the embodiments of the present invention will be described below with reference to FIGS. As understood from FIG. 1, the BS tuner of the present invention includes a pair of connectors 1 and 2 respectively connected to an AV device such as a BS antenna and a television set, and the surface of a circuit board 3 thereof is Tuner blocks X adjacent to each other in the alignment direction of the external connection terminals 5
And a video signal block Y. That is, as shown in FIG. 3, a vertical slot 7 for separating the tuner block X and the circuit board 3 is formed on the surface of the circuit board 3, and a signal received from a BS antenna is input to the tuner block X. A tuning unit D, a demodulation unit F for demodulating a received wave of a frequency tuned by the tuning unit D to a processable frequency, and a detection unit K for extracting a video signal and an audio signal from the demodulated wave are arranged and mounted.

【0009】また、回路基板3の映像信号ブロックYに
は、図示は省略するけれども、同期信号とビデオの分離
及び増幅を行うビデオアンプを含む映像処理部Eが配置
され、同映像処理部Eのビデオ出力は前記外部接続端子
5と同側に配列されたビデオ端子8に出力される。な
お、前記検波部Kで分離された音声出力は、前記外部接
続端子5の一部からV機器の音声処理部Oに出力される
ことになる。
Further, although not shown in the drawing, the video signal block Y of the circuit board 3 is provided with a video processing section E including a video amplifier for separating and amplifying the sync signal and the video. The video output is output to the video terminal 8 arranged on the same side as the external connection terminal 5. The audio output separated by the detection unit K is output from a part of the external connection terminal 5 to the audio processing unit O of the V device.

【0010】図3から理解されるように、前記チューナ
ブロックXと映像信号ブロックYとの間は、前記外部接
続端子5及びビデオ端子8と同側に形成される信号ライ
ン9、及び、前記スロット7で信号ライン9から離間さ
れたアースライン10で結合される。
As can be seen from FIG. 3, between the tuner block X and the video signal block Y, a signal line 9 formed on the same side as the external connection terminal 5 and the video terminal 8 and the slot. It is connected by a ground line 10 which is separated from the signal line 9 at 7.

【0011】そして、図示実施例のBSチューナの回路
基板3の一部即ちチューナブロックXは、従来と同一の
シールドケース4により包囲され、このシールドケース
4により微妙な同調部D、復調部F、検波部Kの完全な
シールドが行われる。つまり、矩形枠状に製作されるシ
ールドケース本体4aには、前記回路基板3の信号ライ
ン対応部及びアースライン対応部を通過できる切り開き
11が形成され、同シールドケース本体4aの表面及び
裏面が、従来と同様の前面カバー4b及び裏面カバー4
cで覆われる。なお、取り扱う周波数が比較的小さな映
像信号ブロックYは、回路基板3の裏面に全体にアース
電極層(図示せず)を形成するだけで、外乱信号の入力
を防止できる。
A part of the circuit board 3 of the BS tuner of the illustrated embodiment, that is, the tuner block X is surrounded by a shield case 4 which is the same as the conventional one, and the shield case 4 subtly adjusts the tuning section D and the demodulation section F. The detection section K is completely shielded. That is, the shield case body 4a manufactured in the shape of a rectangular frame is formed with slits 11 that can pass through the signal line corresponding portion and the earth line corresponding portion of the circuit board 3, and the front and back surfaces of the shield case body 4a are Front cover 4b and rear cover 4 similar to conventional ones
covered with c. The video signal block Y having a relatively low frequency can be prevented from inputting a disturbance signal only by forming an earth electrode layer (not shown) on the entire back surface of the circuit board 3.

【0012】図示実施例によるBSチューナは、以上の
ような構造であるから、回路基板3の表面に同調部D、
復調部F、検波部K、映像処理部Eを構成する電気部品
を搭載し、同回路基板3のチューナブロックXをシール
ドケース4で覆うことにより完成できる。この完成状態
では、信号ライン9及びアースライン10のみがシール
ドケース4外に引き出されるから、微妙なチューナブロ
ックX全体をシールドケース4で完全にシールドでき
る。また、回路基板3のチューナブロックXは、従来の
BSチューナの回路基板と等大等形状であるから、従来
のシールドケース本体4a、前面カバー4b、裏面カバ
ー4cを流用できるため、仕様変更により高価な金型を
新たに製作する必要はなくなる。
Since the BS tuner according to the illustrated embodiment has the above-described structure, the tuning section D,
The demodulation section F, the detection section K, and the video processing section E are mounted with electrical parts, and the tuner block X of the circuit board 3 is covered with the shield case 4 to complete the process. In this completed state, only the signal line 9 and the ground line 10 are drawn out of the shield case 4, so that the delicate tuner block X can be completely shielded by the shield case 4. Further, since the tuner block X of the circuit board 3 has the same size and shape as the circuit board of the conventional BS tuner, the conventional shield case body 4a, the front cover 4b, and the back cover 4c can be diverted, and therefore the specifications are expensive. It is no longer necessary to manufacture a new mold.

【0013】[0013]

【発明の効果】以上の説明から明らかなように、本発明
によれば、回路基板の外部接続端子側に信号ラインを、
反対側にアースラインを形成するため、微妙なチューナ
部と映像処理部との相互干渉を防止でき、従来のシール
ドケースを併用できるから、映像処理部までをも搭載し
たBSチューナの仕様変更に安価に対応できる効果があ
る。
As is apparent from the above description, according to the present invention, the signal line is provided on the external connection terminal side of the circuit board.
Since the ground line is formed on the opposite side, it is possible to prevent subtle interference between the tuner part and the image processing part, and it is possible to use the conventional shield case together, so it is inexpensive to change the specifications of the BS tuner that also includes the image processing part. There is an effect that can correspond to.

【図面の簡単な説明】[Brief description of drawings]

【図1】一部を切欠いて示す本発明のBSチューナの全
体斜視図である。
FIG. 1 is an overall perspective view of a BS tuner of the present invention shown with a part cut away.

【図2】同BSチューナのブロック線図である。FIG. 2 is a block diagram of the BS tuner.

【図3】同BSチューナに用いる回路基板の平面図であ
る。
FIG. 3 is a plan view of a circuit board used in the BS tuner.

【図4】一部を切欠いて示す従来のBSチューナの全体
斜視図である。
FIG. 4 is an overall perspective view of a conventional BS tuner with a part cut away.

【図5】同BSチューナのブロック線図である。FIG. 5 is a block diagram of the BS tuner.

【符号の説明】[Explanation of symbols]

3 回路基板 4 シールドケース 5 外部接続端子 7 スロット 9 信号ライン 10 アースライン E 映像処理部 D 同調部 F 復調部 K 検波部 X チューナブロック Y 映像信号ブロック 3 circuit board 4 shield case 5 external connection terminal 7 slot 9 signal line 10 earth line E video processing unit D tuning unit F demodulation unit K detection unit X tuner block Y video signal block

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 回路基板の表面を一側の外部接続端子の
配列方向に隣り合ったチューナブロックと映像信号ブロ
ックに分け、受信電波の同調部、復調部、検波部を前記
チューナブロックに配置し、前記検波部で検波された映
像信号の増幅処理を行う映像処理部を前記映像信号ブロ
ックに配置すると共に、前記外部接続端子側の信号ライ
ン及び同信号ラインと反対側のアースラインで前記検波
部と前記映像処理部とを接続したことを特徴とするBS
チューナ。
1. A surface of a circuit board is divided into a tuner block and a video signal block which are adjacent to each other in the arrangement direction of external connection terminals on one side, and a tuning section, a demodulation section and a detection section for received radio waves are arranged in the tuner block. An image processing unit for amplifying the image signal detected by the detection unit is arranged in the image signal block, and the detection unit is provided with a signal line on the external connection terminal side and an earth line on the opposite side of the signal line. And a video processing unit connected to the BS.
Tuner.
【請求項2】 前記回路基板のチューナブロックと前記
映像信号ブロックの境界部に形成されたスロットと、同
スロットにより区画された前記回路基板のチューナブロ
ック全体を包囲するシールドケースとを備えることを特
徴とする請求項1記載のBSチューナ。
2. A slot formed at the boundary between the tuner block of the circuit board and the video signal block, and a shield case surrounding the entire tuner block of the circuit board partitioned by the slot. The BS tuner according to claim 1.
JP6141254A 1994-05-31 1994-05-31 Bs tuner Pending JPH07327176A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6141254A JPH07327176A (en) 1994-05-31 1994-05-31 Bs tuner

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6141254A JPH07327176A (en) 1994-05-31 1994-05-31 Bs tuner

Publications (1)

Publication Number Publication Date
JPH07327176A true JPH07327176A (en) 1995-12-12

Family

ID=15287648

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6141254A Pending JPH07327176A (en) 1994-05-31 1994-05-31 Bs tuner

Country Status (1)

Country Link
JP (1) JPH07327176A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7880817B2 (en) 2005-08-24 2011-02-01 Sharp Kabushiki Kaisha Receiver apparatus for outputting digital video and audio signals and receiver system incorporating the receiver apparatus
US7907218B2 (en) 2005-11-07 2011-03-15 Sharp Kabushiki Kaisha Receiver apparatus and receiver system
US7932957B2 (en) 2005-09-09 2011-04-26 Sharp Kabushiki Kaisha Receiver apparatus and receiver system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7880817B2 (en) 2005-08-24 2011-02-01 Sharp Kabushiki Kaisha Receiver apparatus for outputting digital video and audio signals and receiver system incorporating the receiver apparatus
US7932957B2 (en) 2005-09-09 2011-04-26 Sharp Kabushiki Kaisha Receiver apparatus and receiver system
US7907218B2 (en) 2005-11-07 2011-03-15 Sharp Kabushiki Kaisha Receiver apparatus and receiver system

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