JPH0731647Y2 - Video signal processing circuit - Google Patents

Description

TECHNICAL FIELD The present invention relates to a video signal processing circuit, and more particularly to a video signal processing circuit having a video wiper function in video superimposition.

(Prior Art) In recent years, a television imager is connected to a microcomputer or the like, and character information or the like sent from the microcomputer is superimposed on a broadcast image and displayed on a CRT screen.

The superimposing means for such video signals will be described with reference to FIG.

The video signal S1 of the broadcast video is given to the sync separation circuit 1 and the Y / C separation circuit 2. The sync separation circuit 1 separates the horizontal sync signal H, the vertical sync signal V, and the color sync signal Csync from the input video signal, and supplies these sync signals to the control signal generation circuit 3. As a result, the control signal generation circuit 3 gives a burst flag pulse BFP and a composite blanking pulse C-BLK to the wiper circuit 4, and also gives horizontal / vertical synchronization signals to the microcomputer CPU via the interface circuit 5.

As shown in FIG. 4, for example, the wiper circuit 4 is composed of a monostable multivibrator circuit 41 having a TTL configuration such as LS221 and a timing circuit 42 externally attached thereto. The monostable multivibrator circuit 41 is a burst flag pulse BFP supplied from the control signal generating circuit 3.
In synchronism with the above, a single pulse is generated while the composite blanking pulse C-BLK is applied to clear its output. The pulse width of the single pulse is arbitrarily set by the timing circuit 42. The timing circuit 42 includes a capacitor C, a variable resistor VR, and a resistance R for rush resistance.

The single pulse output from the wiper circuit 4 is applied to three AND gates (not shown) included in the interface circuit 5 as one input of each. On the other hand, as the other input of each of the AND gates, R, G and B signals are individually applied from the microcomputer. Therefore, the R, G, and B signals given during the period when the single pulse is output are given to the control signal generation circuit 3 through the interface circuit 5.

The control signal generation circuit 3 includes a burst flag pulse BF in addition to the RGB signal given from the interface circuit 5.
The P / RGB high-speed changeover switch control signal Ys and the pedestal clamp pulse PCP are given to the RGB mixing encoder circuit 6. The encoder circuit 6 outputs a video signal S2 obtained by superimposing the RGB signal output from the microcomputer on the luminance signal Y and the color signal C supplied from the Y / C separation circuit 2.

Then, the variable resistor VR included in the timing circuit 42 of the wiper circuit 4 is adjusted to change the pulse width of the output pulse, thereby arbitrarily setting the overlapping region of the video signals.

However, in the case of the conventional example having such a configuration, in order to prevent the damage of the monostable multivibrator circuit due to the overcurrent input, it is necessary to connect the rush resistance resistor R having a certain value or more. Therefore, the timing circuit
Even if the value of the variable resistance VR of 42 is minimized, a single pulse having a pulse width corresponding to the resistance value of the anti-rush resistance R is output. Therefore, near the end of the video wiper,
There is a so-called wiper remaining theme, in which some of the text images sent from the microcomputer remain on the CRT screen.

Therefore, in order to solve such a problem, as shown in FIG. 5, a detection circuit 43 for detecting the amount of narrowing down of the variable resistor VR is provided. The detection circuit 43 includes a transistor TR that performs a switching operation depending on the magnitude of the terminal voltage of the variable resistor VR. The transistor TR becomes conductive when the variable resistance VR is narrowed down and the terminal voltage becomes a certain value or more, and the output of the monostable multivibrator circuit 41 is cleared. In this way, when the variable resistance VR is narrowed down to a certain extent or more, the monostable multivibrator circuit is cleared to prevent the wiper residue.

However, such a method not only complicates the configuration of the wiper circuit, but also makes setting the threshold level of the transistor TR cumbersome, and since the set threshold level fluctuates due to temperature changes, the wiper residue is completely removed. Sometimes it couldn't be removed.

(Object of the Invention) The present invention has been made in view of such circumstances, and an object of the present invention is to provide a video signal processing circuit that can relatively easily remove the wiper residue.

(Structure of the Invention) In order to achieve such an object, the present invention has the following features. That is, the video signal processing circuit according to the present invention takes a logical product of a single pulse emitted at a timing related to a scanning signal and an external RGB signal, and
By varying the pulse width of the single pulse, a video signal processing circuit having a wiper function for superimposing and displaying an image on an arbitrary area on a cathode ray tube screen,
The single pulse is output from a monostable multivibrator circuit of TTL configuration which is given an input pulse signal synchronized with the scanning signal, and the monostable multivibrator circuit is a timing for varying the pulse width of the output pulse. A circuit is additionally provided, and this timing circuit includes a variable resistor, a resistance against rush resistance and a first capacitor, and a second capacitor connected in parallel to the resistance against rush resistance, and the second capacitor. The capacitor is set so that the impedance of the timing circuit becomes small with respect to the frequency of the input pulse signal to the monostable multivibrator circuit.

As described above, when the second capacitor is connected in parallel with the resistance against rush resistance, the impedance of the timing circuit becomes small with respect to the frequency of the input pulse signal. Therefore, it is generated when the variable resistance is set to the minimum value. The pulse width of one pulse is extremely narrow. for that reason,
In this case, almost no external RGB signal is given to the monitor TV, so that the wiper residue can be easily removed.

(Embodiment) Hereinafter, the present invention will be described in detail based on an embodiment shown in the drawings. The feature of the present invention resides in the wiper circuit as described above, and other configurations are the same as those in the conventional case described in FIG. 3, so the description of the same parts will be omitted here. First
FIG. 1 is a circuit diagram showing the periphery of a wiper circuit which is a main part of a video signal processing circuit according to an embodiment of the present invention.

The wiper circuit 4'uses the LS221 as the monostable multivibrator circuit 41 of the TTL configuration. Pin 1 which is one input terminal of this monostable multivibrator circuit 41 is grounded, and burst flag pulse BFP is applied from control signal generating circuit 3 to pin 2 which is the other input terminal. The third pin of the circuit 41 is a clear terminal, to which the composite blanking pulse C-BLK is given from the control signal generating circuit 3.

On the other hand, a timing circuit 42 'for varying the pulse width of the output pulse is externally attached to pins 14 and 15 of the circuit 41. The timing circuit 42 'includes a capacitor C1 connected between the 14th and 15th pins of the circuit 41, and a rush resistance resistance R and a variable resistance VR connected in series between the 15th pin and the 5V power supply line. , A capacitor C2 connected in parallel with the resistance R for rush resistance. The capacitor C2 is set so that the impedance of the timing circuit 42 'is sufficiently small with respect to the frequency (horizontal scanning frequency) of the burst flag pulse BFP which is the input pulse of the monostable multivibrator circuit 41.

The output pulse of the wiper circuit 4'is AND gates AND1 to AN.
Given as one input of D3. Also, as the other input of the AND gates AND1 to AND3, for example, an RGB signal is given from a microcomputer. Note that these AND gates are drawn by extracting those included in the interface circuit 5 shown in FIG.

The output terminals of the AND gates AND1 to AND3 are connected to the control signal generating circuit 3, and the control signal generating circuit 3 is connected to the RGB mixing encoder circuit 6, as described with reference to FIG.

Next, the operation of this embodiment will be described.

First, the case where the resistance value of the variable resistance VR of the wiper circuit 4'is set to the maximum value will be described. In this case, the output of the monostable multivibrator circuit 41 rises in synchronization with the rise of the burst flag pulse BFP shown in FIG. 2 (C). Then, its output is cleared in synchronization with the rising edge of the composite blanking pulse C-BLK shown in FIG. Therefore, the monostable multivibrator circuit 41 outputs a pulse having a pulse width including a luminance signal during one horizontal scanning period, as shown in FIG. This pulse is applied to AND gates AND1 to AND3, respectively. Meanwhile, the AND gates AND1 to AN
As the other input of D3, the RGB signal shown in FIG. As a result, this RGB signal passes through the AND gates AND1 to AND3 as it is and is given to the control signal generating circuit 3, as shown in FIG. Then, as described in FIG. 3, this RGB signal together with other control pulses is given from the control signal generation circuit 3 to the RGB mixing encoder circuit 6 so that the RGB signal from the microcomputer is superimposed on the broadcast video signal. The new video signal S2 is output to, for example, a television monitor (not shown).

Next, a case where the resistance value of the variable resistance VR of the wiper circuit 4'is set to the minimum value will be described. In this case, the monostable multivibrator circuit 41 rises in synchronization with the burst flag pulse BFP as shown in FIG. 2 (C), but the pulse width thereof is this monostable multivibrator circuit.
It is determined by the constant of the external timing circuit 42 'of 41.
Then, as described above, since the capacitor C2 is connected in parallel to the resistance R for rush resistance, with respect to the frequency (horizontal scanning frequency) of the burst flag pulse BFP which is the input pulse of this monostable multivibrator circuit 41, The impedance of the timing circuit 42 'is extremely small. Therefore, this monostable multivibrator circuit 41
The pulse width of the output pulse is extremely small as shown in FIG. Therefore, in this case, the RGB signals passing through the AND gates AND1 to AND3 are almost eliminated as shown in FIG. 7G, and the wiper residue does not pose a problem in actual use. In addition, in FIG. 2 (F) (G),
A signal waveform in the case of using the conventional circuit shown in FIG. 4 is shown by a broken line for reference.

In the above embodiment, the LS221 is used as the monostable multivibrator circuit 41 that constitutes the wiper circuit 4 ', but this may be another monostable multivibrator circuit of TTL configuration. Of course.

In addition, in the embodiment, description has been made by taking an example of superimposing images in the horizontal scanning direction. However, the present invention can also be applied to the superposition of images in the vertical direction. In this case, a pulse signal synchronized with vertical scanning is used as an input pulse of the monostable multivibrator circuit that constitutes the wiper circuit. Then, the single pulse generated by this input pulse is given as one input of the AND gate to control the passage of the RGB signal from the microcomputer, whereby the vertical image superimposing region is set.

Furthermore, it goes without saying that the RGB signals described in the embodiments are not limited to being given by the microcomputer, and can be given by other electronic devices.

(Effects of the Invention) As described above, in the video signal processing circuit according to the present invention, by connecting the capacitor in parallel to the rush resistance resistor of the timing circuit, the timing with respect to the frequency of the input pulse signal to the monostable multivibrator circuit Since the circuit impedance is configured to be lower than the impedance on the low frequency side, the wiper residue can be effectively improved with a relatively simple configuration without lowering the resistance value for rush resistance. be able to.

Moreover, according to the present invention, the threshold level setting is not troublesome as in the conventional device, and the wiper residue does not occur due to the temperature change.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an essential part of a video signal processing circuit according to an embodiment of the present invention, FIG. 2 is an operation explanatory diagram of the circuit shown in FIG. 1, and FIG. Common block diagrams, FIG. 4 and FIG. 5 are circuit diagrams showing a configuration of a wiper circuit included in a conventional circuit. 1 ... Synchronous separation circuit, 2 ... Y / C separation circuit, 3 ... Control signal generation circuit, 4, 4 '... Wiper circuit, 5 ... Interface, 6 ... RGB mixed encoder circuit, 41 ... Monostable multivibrator circuit, 42, 42 '... Timing circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-53-142120 (JP, A) JP-A-49-620270 (JP, A) JP-A-57-42268 (JP, A)

Claims (1)

[Scope of utility model registration request] 1. A logical product of a single pulse emitted at a timing associated with a scanning signal and an external RGB signal is obtained, and the pulse width of the single pulse is varied to determine an arbitrary value on a CRT screen. An image signal processing circuit having a wiper function for displaying an image in a region in an overlapping manner, wherein the single pulse is output from a monostable multivibrator circuit of a TTL configuration which is given an input pulse signal in synchronization with the scanning signal Further, the monostable multivibrator circuit is provided with a timing circuit for varying the pulse width of the output pulse, and the timing circuit includes a variable resistor, a rush resistance resistor and a first capacitor, and A second capacitor connected in parallel with the rush resistor, wherein the second capacitor is the monostable multivibrator. A video signal processing circuit, characterized in that the impedance of the timing circuit is set to be small with respect to the frequency of an input pulse signal to the circuit.