JPH07297725A - Band synthesis filter - Google Patents

Abstract

PURPOSE:To reduce the arithmetic quantity of the band synthesis filter by providing an orthogonal transformation section generating a 2N-degree vector from N-sets of division data, 1st and 2nd memory sections generating a 2MN- degree vector and an arithmetic processing section implementing band synthesis to the filter. CONSTITUTION:An orthogonal transformation section 1 applies orthogonal transformation to N-sample data to generate a 2N-degree vector. The first half part 0-N-1 of the 2N-degree vector and the latter half part N-2N-1 are used for a block unit of the processing and when the first half part is stored in the 1st memory section 2, the latter half part is stored in the 2nd memory section 3. Then an arithmetic processing section 4 implements the processing of band synthesis by using the 2MN-degree vector stored in the 1st memory section 2 storing the first half part. Then the latter half part of the block unit is stored in the 1st memory section 2 and the first half part is stored in the 2nd memory section 3 and the arithmetic processing section 4 implements the processing of band synthesis by using the 2MN-degree vector stored in the 1st memory section 3. Thus, the arithmetic quantity for the filter processing and the memory using quantity are reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a band synthesizing filter for synthesizing band division coded signals. Various methods are known in which audio signals, image signals, and the like are divided into bands on the frequency axis and processed. For example, frequency scrambling for frequency multiplexed signal generation, separation, or confidential communication,
Alternatively, there are subband coding of voice and image signals. A polyphase filter bank is known as a means for such band division and combination, and there is a demand for efficient processing in the case of band combination.

[0002]

2. Description of the Related Art As one of compression encoding methods for audio signals and image signals, for example, the international standard MPEG (Moving) is used.
Picture Image Coding Experts Group) is known. The encoding of the audio signal by this MPEG is 3
It is divided into two bands, and adaptive bit allocation is performed by utilizing auditory characteristics.

FIG. 4 is an explanatory diagram of the MPEG audio encoding system. Reference numeral 30 is an encoding unit, 40 is a decoding unit, 31 is a mapping unit, 32 is a quantization / encoding unit, and 33 is a weighting unit based on an auditory model. , 34 is a bit multiplexing unit, 35 is a bit demultiplexing unit, 36 is a dequantization / decoding unit, and 37 is a demapping unit.

The input signal is 32 kHz, 41.1 kH
It is sampled at a sampling frequency of either z or 48 kHz and input to the mapping unit 31, and this time domain sample is divided into 32 bands by a 64-tap polyphase filter bank. In that case, 3
Two samples are input to form a block of 512 samples including an overlap of 480 samples, the 512-block is multiplied by a window function, and then the band division processing by the above-described 64-tap polyphase filter bank is performed. And 32 subband outputs can be obtained.

The quantizing / encoding unit 32 obtains a scale factor for performing full-scale quantization by performing a maximum value search for each of 32 bands, and performs amplitude normalization by this scale factor every 12 samples in each band. To do. A 6-bit scale factor table is used for encoding the scale factor.

The auditory model weighting unit 33 performs weighting by the auditory masking effect. For example, the energy of each subband signal is calculated, and a threshold of the minimum audible limit is added to this value to obtain a masking threshold. The masking threshold value is compared with the peak energy of the subband signal. If the subband signal is lower than the masking threshold value, the subband signal does not need to be transmitted, and the quantization / encoding unit 32 is notified.

The bit multiplexing unit 34 multiplexes coded data of subbands, auxiliary data, and the like into a frame in units of 384 samples, and transmits or stores this coded signal. In that case, for example, the frame structure of layer I is 1
6-bit synchronization bit, 4-bit bit rate information, 2-bit sampling frequency information, 2-bit coding mode, 2-bit copyright information, and 2
It includes bit emphasis presence / absence information, 8-bit bit distribution information, 12-bit scale factor, band-division coded bits, and dummy bits.

The decoding section 40 on the receiving side or the reproducing side of the encoded signal performs the reverse processing of the encoding section 30, and the encoded signal of the encoding section 30 is stored in the bit separation section 35. Then, the auxiliary data and the like and the sub-band coded data are separated, and the dequantization / decoding unit 36 performs a decoding process corresponding to the sub-band. The inverse mapping unit 37 is provided with, for example, a polyphase filter bank similar to the polyphase filter bank in the mapping unit 31, performs band synthesis, and outputs a reproduction output signal (the MPEG audio encoding method is , October 29, 1992
Published by Sangyo Tosho Co., Ltd., supervised by Katsuhiko Shirai, Shigeyuki Umikami, Hirohisa Karabe, Toshi Ikezawa, Toshihiko Matsumura, Fumio Amano, "Applications of Digital Signal Processing," p. 76, p. 77).

FIG. 5 is a flowchart of a conventional band synthesizing filter bank, and shows a main part of a process corresponding to the inverse mapping unit of the MPEG audio encoding system described above.
That is, the arithmetic processing shown in steps (a) to (f) is performed. First, data S [i] (i
= 0, 1, 2, ... N-1) is input (a). Also, the vector Vi of 0-4MN-1 of the previous time is shifted by 2N samples (b). The N-sample input signal input in step (a) is orthogonally transformed by modified discrete cosine transform (MDCT) to generate a vector of 0 to 2N-1, and (c) a vector shifted by 2N samples. It is added to the beginning of Vi to be a vector of 0 to 4MN-1 this time. Note that * is a multiplication symbol, and Sk corresponds to N samples S [i].

Next, the vector Ui is generated (d). This step shows the case of C language expression, and the 2N-order vector obtained by orthogonal transformation is added to the head of the previous vector Vi shifted by 2N samples to generate a new vector Vi for 4MN-1 samples. Then, the first half 0 to N-1 and the second half N to 2N-1 for each 2N sample are selectively extracted to generate a vector Ui.

This vector Ui is multiplied by the window function Di to generate a vector Wi (e). Next, this vector W
Band synthesis processing is performed by convolution calculation of i (f).
By converting the combined output signal Sj into an analog signal, the same output signal as the input signal can be obtained.

FIG. 6 is an explanatory view of the conventional vector generation, in which 0 to N-1 N sample Si corresponding to step (a) of FIG. 5 are input and orthogonal transformation processing is performed. As a result, the 2Nth order vector of 0 to 2N-1 is obtained. In addition, the vector Vi before updating stored in the memory or the like is shifted by 2N samples, and a new 2N sample of 2N is added to the beginning thereof.
Add the next vector. As a result, the vector Vi of the previous 4MN sample is updated.

In this updated vector Vi, the first half 0 to N-1 and the second half N to 2 of the respective 2N-order vectors.
The first half and the second half of N-1 and N-1 are alternately extracted as shown by hatching to generate a vector Ui of 0 to 2N-1. The vector Ui is multiplied by the window function Di to generate a vector Wi, and a band-combined signal Sj can be obtained based on the vector Wi.

Next, when a new 2N-order vector for 2N samples is obtained by the orthogonal transformation, the vector Vi of the previous 4MN sample is updated, and if the first half of each 2N-order vector is extracted last time, the latter half thereof is extracted. , Or if the latter half is extracted, the first half is extracted, the next vector Ui is generated, the vector Ui is multiplied by the window function Di to generate the vector Wi, and the band is calculated by the convolution process of the vector Wi. The signal Sj is obtained by synthesizing, and this is sequentially repeated.

[0015]

The decoding unit in the band division coding system performs the band synthesizing filter process as described above, and executes the band synthesizing filter process in real time using the processor. In this case, how to reduce the calculation amount is important. In the processing of the above-mentioned conventional example, every time N samples of data are input, orthogonal transformation is performed to update the vector Vi, a vector Ui is generated from the vector Vi, and the window function D is applied to the vector Ui.
Since the vector Wi is generated by multiplying i, the process of forming the vector Ui from the vector Vi is relatively complicated, which is one of the causes of an increase in the amount of calculation of the band synthesis filter process. An object of the present invention is to reduce the calculation amount of a band synthesis filter.

[0016]

A band synthesizing filter of the present invention will be described with reference to FIG. 1. An orthogonal transform for orthogonally transforming N pieces of data divided into N bands to generate a 2Nth order vector. The unit 1 and the 2Nth order vector transformed by the orthogonal transforming unit 1 are set as a block unit for processing, and the first half and the second half of the block unit are alternately switched and stored to generate a 2MNth order vector, respectively. First and second
Memory units 2, 3 and the first and second memory units 2, 3
An arithmetic processing unit 4 for performing band combination using the 2MN-order vector in the memory unit that stores the first half of one of the current blocks.

[0017]

The orthogonal transformation unit 1 orthogonally transforms N-sample data into a 2N-order vector, and uses the first half 0-N-1 and the latter half N-2N-1 of this 2N-order vector as a block unit of processing. When the first half is stored in the first memory unit 2, the latter half is stored in the second memory unit 3 and the 2MN-order vector stored in the first memory unit 2 storing the first half is used. Then, the arithmetic processing unit 4 performs band synthesis processing, then stores the second half of the block unit in the first memory unit 2, and stores the first half in the second memory unit 3.
The band synthesizing process is performed by the arithmetic processing unit 4 using the 2MN order vector stored in the second memory unit 3.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The orthogonal transform unit 1 in FIG. 1 is a discrete cosine transform (DCT) or a modified discrete cosine transform (M
DCT) or the like is used to orthogonally transform the data of N samples to generate a 2Nth order vector. The first half 0 to N-1 and the second half N to 2N-1 of the 2Nth order vector are set as block units of processing.

The first and second memory units 2 and 3 can be composed of a random access memory (RAM), a shift register, etc., and are shifted by an Nth-order vector for each orthogonal transformation process. The memory unit that stores the first half of the block unit stores the second half of the block next time. Therefore, the first half and the second half of the block unit are alternately switched and stored in the first and second memory units 2 and 3 to generate the 2MN-order vector.

The arithmetic processing unit 4 performs band combining processing using the 2MN-order vector of the memory unit that stores the first half of the block unit. The arithmetic processing unit 4 and the orthogonal transformation unit 1 can be realized by the arithmetic function of the processor.

FIG. 2 is a flow chart of an embodiment of the present invention, in which N samples of data S [i] (i = 0, 1,
2, ... N-1), and the 2MN-order vector U1i, stored in the first and second memory units 2 and 3,
U2i are each shifted by N samples.

Then, in the band synthesizing process, it is determined whether or not the vector U1i stored in the first memory unit 2 was used last time, and when this vector U1i is used, the orthogonal transformation shown in the step is performed. Then, the first half of the block unit of the 2Nth order vector is stored in the second memory unit 3, and the vector U2i is used as the vector Wi to define the window function D.
i is multiplied to perform band synthesis processing.

When the vector U2i stored in the second memory unit 3 last time is used, the orthogonal transformation shown in the step is performed and the first half unit of the block unit of the 2Nth order vector is stored in the first memory unit 2. Then, the vector U1i is used as the vector Wi and multiplied by the window function Di, and band synthesis processing is performed. Note that steps and are the same orthogonal transformation processing, and the orthogonal transformation processing result can be selected according to the determination result of the step.

FIG. 3 is an explanatory diagram of vector generation according to the embodiment of the present invention, in which data S corresponding to N samples of 0 to N-1.
[I] is input and orthogonally transformed into a 2N-order vector, and the 2N-order vector is used as a block unit of processing, and 0 to N−
For the first half a of 1 and the second half b of N to 2N-1,
As indicated by the solid arrow, when the first half a is stored in the second memory unit 3 to be a _n and the second half b is stored in the first memory unit 2 to be b _n , the second memory unit In 3,
Vector U1i consisting of a _n , b _n-1 , a _n-2 , ...
Are generated, and b _n , a _n−1 , b are stored in the first memory unit 2.
_A vector U2i consisting of _n-2 , ... Is generated. The first and second memory units 2 and 3 perform N samples of shift before storing the first half a or the second half b in block units. Alternatively, the first and second memory units 2 and 3 are configured by shift registers, and the first and second half units b are shifted while shifting the first half a or the second half b in block units.
Can be stored in the memory units 2 and 3.

Then, using the vector U2i of the second memory unit 3 storing the first half a of the current block unit, this vector U2i is multiplied by the window function Di to generate the vector Wi, and this vector Wi is generated. Based on the band synthesis.

The first half a of the 2Nth order vector obtained by the next orthogonal transformation is stored in the first memory unit 2 as a _{n + 1} as shown by the dotted arrow, and the second half b is shown by the dotted arrow. Then, it is stored in the second memory unit 3 to be b _{n + 1} . Therefore, the vector U1i composed of a _{n + 1} , b _n , a _n-1 , b _n-2 , ... Is generated in the first memory unit 2 that stores the first half a of the block unit. Then, using the vector U1i formed by storing the first half a of the current block unit, the vector U1i is multiplied by the window function Di to generate the vector Wi, and the band synthesis is performed by the convolution process of the vector Wi. , Signal S [j] is output.
The above operation can be repeated to perform band combination of band division encoded data.

[0027]

As described above, according to the present invention, when the 2Nth order vector transformed by the orthogonal transformation unit 1 is used as a processing block unit and the first half of the vector is stored in the first memory unit 2, , The latter half is stored in the second memory unit 3, and next time, the latter half of each block is stored in the first memory unit 2 and the first half is stored in the second memory unit 3.
The band is synthesized by the arithmetic processing unit 4 using the 2MN-order vector in the memory unit in which the first half is stored by switching alternately and storing the vectors U1i, U2.
Since i is formed, it is possible to omit the process of generating the vector Ui from the vector Vi every time the band combining process and the memory use as in the conventional example. Therefore, there is an advantage that the calculation amount of the band synthesis filter process and the memory usage amount can be reduced.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of an embodiment of the present invention.

FIG. 2 is a flowchart of an embodiment of the present invention.

FIG. 3 is an explanatory diagram of vector generation according to the embodiment of this invention.

FIG. 4 is an explanatory diagram of an MPEG audio encoding system.

FIG. 5 is a flowchart of a conventional band synthesis filter bank.

FIG. 6 is an explanatory diagram of conventional vector generation.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Orthogonal transformation part 2 1st memory part 3 2nd memory part 4 Arithmetic processing part

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁶ Identification number Internal reference number FI Technical indication location H04B 14/04 Z H04N 7/30 (72) Inventor Naoji Matsuo 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Address within Fujitsu Limited (72) Inventor Yasushi Inamoto 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Fujitsu Limited (72) Inventor, Kiichi Matsuda, 1015 Kamedotachu, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Within Fujitsu Limited

Claims (1)

[Claims] 1. A band synthesizing filter for inputting data divided into N bands and synthesizing the band, wherein N pieces of data divided into the N bands are orthogonally transformed to obtain 2
An orthogonal transformation unit (1) that generates an Nth-order vector and a 2Nth-order vector transformed by the orthogonal transformation unit (1) is used as a processing block unit, and the first half and the latter half of the block unit are alternated. First and second memory units (2) that switch and store to generate vectors of 2MN order, respectively.
(3) and 2M in the memory unit that stores the first half of the current block of one of the first and second memory units (2) and (3)
Arithmetic processing unit (4) for performing band synthesis using Nth order vector
And a band synthesizing filter comprising: