JPH07273006A - Charged particle beam exposing method and device thereof - Google Patents

Abstract

PURPOSE:To conduct a high speed exposing operation and to improve a throughput by a method wherein dot-pattern data are formed in advance, they are stored in a low speed and large capacity storage, and the dot-pattern data are synchronously read out from a plurality of high speed storages. CONSTITUTION:Pattern data are stored in a disc device 301. The pattern data read out from the disc device 301 are stored in a buffer memory 303 by the control of a center controller 302. A data development and transfer control circuit 304 feeds the pattern data read out from the buffer memory 303 to a data development circuit 305, the pattern data are transferred to disc devices 309a to 309j, which are a low speed and large capacity memory storage, from a data transfer circuit 306 through transfer channels 307a to 307j and transfer control circuits 308a to 308j, and the pattern data are stored there. An exposure and transfer control circuit 332 transfers dot-pattern data from all disc devices 309a to 309j, and the data are fed to an output circuit 325.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charged particle beam exposure method and an apparatus therefor, and more specifically, a plurality of formed charged particle beams are desired as a whole while continuously moving a stage on which a sample is mounted. The present invention relates to a charged particle beam exposure method and apparatus for irradiating and exposing a sample surface by controlling the beam shape so that the charged particle beam is deflected by a deflector to perform raster scanning.

In recent years, ICs have been widely applied to various industries such as computers, communications, and device control as their integration and functions have been improved. For example, in DRAM, 1M, 4M, 16
M, 64M, 256M, 1G bits and their integration are progressing. Such high integration is solely due to the progress of fine processing technology. With the increase in the density of such integrated circuits, an exposure apparatus using a charged particle beam such as an electron beam has been developed as a method for forming a fine pattern. In charged particle beam exposure, fine processing of 0.05 μm or less is 0.02 μm
It can be realized with the following alignment accuracy. However, until now, the above-mentioned exposure apparatus has a low throughput, and thus the LSI has a low throughput.
It has been thought that it could not be used for mass production. This is a so-called one-stroke writing electron beam discussion, and is not a result of serious consideration, but is merely determined in view of current commercial devices and productivity.

However, in recent years by the present inventors invention block exposure or blanking aperture array (BAA) exposure method according to the throughput of the order of 1 cm ^2/1 sec can now be expected. Its fineness, alignment accuracy, quick turnaround and reliability are superior to other methods.

In the charged particle beam exposure having the above advantages, it is necessary to efficiently process the exposure pattern data and improve the exposure throughput, as in other exposure methods.

[0005]

2. Description of the Related Art A blanking aperture, which is one of a multi-beam type charged particle beam exposure apparatus for controlling a plurality of formed charged particle beams (for example, electron beams) so as to have a desired beam shape as a whole, will be described below. An electron beam exposure apparatus of array (BAA) exposure type will be described. Here, in the control, whether each beam reaches the sample (ON) or not (OFF) is controlled individually or collectively independently so that the plurality of beams as a whole have a desired beam shape. . The on / off control is sequentially changed according to the pattern to be exposed. On the other hand, the stage on which the sample is mounted is continuously moved in the first direction, and is exposed while being deflected substantially linearly by the one or more deflectors in the first direction or the second direction perpendicular thereto. I do.

As is well known, the BAA has a plurality of groups, each of which is composed of a rectangular opening and two electrodes formed on the opposite side immediately adjacent to the opening, in a zigzag pattern, and one of the two electrodes is formed. By setting the ground potential and setting the other to the ground potential or a certain potential, the trajectory of the electron beam passing through the aperture is controlled. It is controlled whether or not the electron beam that has passed through the BAA passes through the aperture of the aperture plate further inside the optical barrel. Then, the voltage applied to the electrodes of the BAA is controlled in synchronism with the sub-deflector performing a raster scan to expose a desired pattern in the strip-shaped region.

First, scanning will be described. FIG. 5 is a view showing one wafer 10. On the wafer 10,
A plurality of chips are formed. During the exposure, the wafer 10 is continuously and repeatedly moved in the Y direction. Scanning with the electron beam is performed in cell area units. Reference numeral 14 in FIG. 5 indicates one cell area. The cell area is in the deflectable range of the main deflector (for example, about 2 mm) in the X direction, and is smaller than the size of the chip 12 in the Y direction. In the example of FIG. 5, the size of the cell region in the Y direction is equal to the size of the chip 12 in this direction. The electron beam is deflected so as to move in the Y direction while meandering in the X direction (while swinging in the X direction). here,
In principle, since the stage is continuously moving in the Y direction, there is no need to define the size of the cell area in the Y direction. However, from the viewpoint of various correction calculations and efficient processing of data, it is better to divide the Y direction into a certain size. At this time, since it is desired to make the size in the Y direction as large as possible, for example, the chip size is used. When it is preferable to perform the correction calculation with higher accuracy, the size of the cell region in the Y direction is set smaller than the chip size.

Here, the cell stripe is defined. The cell stripe is an area having a size equal to or smaller than an area in which exposure can be performed by one scan of the sub deflector. For example, if the sub-deflector can deflect a maximum of about 100 μm and the width of the BAA is about 10 μm, the cell stripe has a maximum size of about 10 μm in the X direction and 100 μm in the Y direction.

As shown in FIG. 6 by enlarging the black-painted region in FIG. 5, the electron beam is moved in the X direction while being scanned by the sub-deflector in the Y direction for each cell stripe 16. When the cell stripe 16 has the maximum size of 10 μm × 100 μm, the area in which about 10 cell stripes 16 are arranged in the X direction is scanned by the sub-deflector.
Therefore, the area of about 100 μm □ becomes the sub-deflection area. The width in the X direction is about 2 mm, and the deflectable range in continuous movement in the Y direction is the cell region 14 scanned by the main deflector.

The cell stripe 16 has a size of 10 μm × 100.
The maximum is μm, and its size is variable. The variable method is as follows. The size of the BAA is fixed, but in order to reduce the width of the cell stripe, the beam emitted from the opening at the end of the BAA may be constantly turned off.
Further, in order to reduce the length direction, the scan may be shortened, or the scan distance may be constant and the data other than the cell stripe between them may be turned off. Specifically, for a repetitive pattern, the size of the cell stripe is adjusted to the pitch.

FIG. 7 shows an outline of a BAA exposure type electron beam exposure apparatus. Referring to FIG. 7, an electron beam exposure apparatus generally includes an electron optical system 100 that forms an electron beam and focuses the electron beam, and a control system 20 that controls the electron optical system 100.
It consists of 0. The electron optical system 100 includes an electron gun 101 as an electron beam source, and the electron gun 101 emits an electron beam as a divergent electron beam along a predetermined optical axis O.

An electron beam formed by the electron gun 101 is shaped by passing through a beam shaping aperture 102a formed on an aperture plate 102. The aperture 102a is formed in alignment with the optical axis O, and shapes the incident electron beam into a rectangular cross section.

The shaped electron beam is an electron lens 103.
Thus, the blanking aperture array (BAA) is focused on the formed BAA mask 110. that time,
The lens 103 forms an image of the rectangular aperture on the BAA mask 110.
Project on top. A large number of fine apertures are formed on the BAA mask 110 corresponding to a large number of exposure dots drawn on the semiconductor substrate, and an electrostatic deflector is formed in each aperture. The electrostatic deflector is controlled by the drive signal E and allows the electron beam to pass as it is in the non-excited state, but deflects the passing electron beam in the excited state, and as a result, the direction of the passing electron beam deviates from the optical axis O. As a result, as described below, an exposure dot pattern corresponding to the non-excited state aperture is formed on the semiconductor substrate. The electron beam passing through the BAA mask 110 passes through electron lenses 104 and 105 forming a reduction optical system, and then passes through a round aperture 113a formed on a round aperture plate 113, and then an electron lens forming another reduction optical system. By 106 and 107, the image of the BAA mask 110 is focused on a semiconductor substrate 115 held on a movable stage 114, and an image of the BAA mask 110 is formed on the substrate 115. Here, the electron lens 117 acts as an objective lens, and the correction coil 10 for focus correction and aberration correction is used.
8 and 109 and deflectors 111 and 112 for moving the focused electron beam on the surface of the substrate.

An electrostatic deflector 116 is formed between the lens 104 and the lens 105. By driving the deflector 116, the path of the electron beam is from the optical axis O passing through the round aperture 113a of the round aperture plate 113. Removed. As a result, the electron beam can be turned on / off at high speed on the semiconductor substrate. In addition, since the electron beam deflected by the excitation of the electrostatic deflector in the aperture on the BAA mask 110 described above can also pass through the round aperture 113a, it does not reach the semiconductor substrate, and as a result, the substrate On 115, the exposure dot pattern can be controlled.

To control the exposure operation, the electron beam exposure apparatus of FIG. 7 uses a control system 200. Control system 2
00 includes an external storage device 201 such as a magnetic disk device or a magnetic tape device that stores data relating to the element pattern of the semiconductor device to be drawn.

The data stored in the storage device 201 is CP
The data is read out by the U202 and is decompressed by the data expansion circuit 203 to be converted into exposure dot data for turning on and off the individual openings on the BAA mask 110 in accordance with a desired exposure pattern. The electron beam exposure apparatus of FIG. 7 is configured so that each exposure point on the substrate 115 is repeatedly exposed N times with an independent exposure pattern in order to make a subtle correction of the exposure pattern. The expansion circuit 203 is composed of N circuits 203 _{1 to} 203.
Is composed of _N, each of the circuits 203 ₁ ~203 _N is CP
Based on the exposure data supplied from U202, N independent exposure dot pattern data used for the N times of overlapping exposure are generated.

The individual circuit 203 ₁ ~203 _N, the C
A buffer memory 203a that holds the exposure data supplied from the PU 202, and a data expansion unit 203 that generates dot pattern data representing an exposure dot pattern based on the exposure data held in the buffer memory 203a.
b and a canvas memory 203c for holding the dot pattern data expanded by the data expansion unit 203b, and the data expansion circuit 203 converts the dot pattern data held in the canvas memory 203c into
It is supplied to the corresponding output buffer circuit 204. That is, the output buffer circuit 204 includes the N data expansion units 2
03 _{1 to} 203 _N corresponding to N holding circuits 204 ₁ to
204 _N , each holding circuit, eg circuit 2
04 ₁ Total 128 128 corresponding to the opening of the circuit aligned in the X direction on the BAA mask 110 20
4 _{1 to} 204 ₁₂₈ are included. At this time, each of the ₁₂₈ circuits 204 _{1 to} 204 ₁₂₈ stores 1-bit data for turning on / off the opening in the canvas memory 2.
It is supplied from 03c and owns it. Further, the circuits 204 _{1 to} 204 _N convert the held 1-bit data into analog signals by the corresponding D / A converters 205 _{1 to} 205 _N , and then supply the analog signals to the BAA mask 110. As a result, electrostatic deflectors that cooperate with the openings aligned in the Y direction on the BAA mask 110 are sequentially driven.

The electron beam exposure apparatus of FIG. 7 is further supplied with a control signal from the CPU 202 based on the control program stored in the external storage device 201, and operates the data expansion circuit 203 and the output buffer circuit 204, and the data expansion circuit. Data transfer from 203 to buffer circuit 204, and BAA mask 11 by D / A converter 205
An exposure control device 206 for controlling 0 drive is provided. Further, the exposure control device 206 further controls the main deflector 111 and the sub deflector 112 via the main deflector control circuit 207 and the sub deflector control circuit 208, and the electron beam substrate 1
Scan on 15.

The memory 211, which uses the main deflection amount data from the main deflector control circuit 207 as an address, has corresponding correction calculation coefficients GX, GY (gain), RX, RY (rotation), OX, OY (offset), and HX. , HY (trapezoid) are supplied to the correction circuit 208a. Correction circuit 208a
Corrects the sub deflection amount data with these correction calculation coefficients,
It is supplied to the sub deflector 112. Further, the memory 211 uses the main deflection amount data as an address and stores the corresponding correction calculation coefficient D.
The X and DY (distortion) are supplied to the correction circuit 207a. The correction circuit 207a corrects the main deflection amount data with the correction calculation coefficient, and outputs it to the main deflector 111. Further, the memory 211
Is the dynamic stig SX corresponding to the main deflection amount data,
SY and dynamic focus F are stored, and SX, SY, and F corresponding to the main deflection amount data are correction coils 1.
09 and the focus correction coil 108 to be driven.

Further, a refocus control circuit 203e and a refocus data storage memory 203f are provided in order to correct the spread of the beam due to the Coulomb repulsive force generated when focusing the electron beam. The refocusing coil 118 is driven according to the pattern.

Next, the structure of the BAA mask 110 will be briefly described.

Referring to FIG. 8, a drive electrode 121 and a ground electrode 122 are provided so as to sandwich each opening 120. There are 8 openings in one row in the Y direction, for a total of 128 in the X direction
Formed in rows. Therefore, there are 1024 openings in total.
As shown in brackets on the left side of the figure, A1, A2, B
1 and B2 form a pair with two openings each. BAA
The mask 110 forms an electron beam group composed of a plurality of electron beam elements arranged in a matrix corresponding to each aperture group, and each electron beam element has a maximum cell stripe size of 0.08 μm × 0.08 μm on the substrate 115. The exposure dot of the size is exposed. At that time, a maximum of 8 × 128 exposure dots are simultaneously exposed on the substrate 115.

The electron beam elements constituting the electron beam group are scanned in the Y direction in the drawing by the deflector 112, and at each point on the substrate, there are a maximum of 8 exposure dots corresponding to the aperture groups A to H. It is exposed twice. More specifically, an exposure dot row corresponding to the opening row B1 is exposed on the substrate 115 in an overlapping manner with the exposure dot row exposed corresponding to the opening row A1, and an opening is further formed thereon. Row C1,
The exposure dot rows corresponding to D1 are sequentially overlapped and exposed. A similar process is established for the exposure of the opening rows A2, B2, C2, D2. That is, after the exposure dot row corresponding to the opening row A2 is exposed, the exposure dot rows corresponding to the opening rows B2, C2, D2 are successively overlapped and exposed. However, the exposure dots of the opening row A1 and the exposure dots of the opening row A2 are interpolated with each other to form a single exposure dot row aligned in the X direction. By forming the opening rows in each opening group by shifting them by one pitch from each other, it is possible to reduce the Coulomb interaction that occurs when the electron beam elements shaped by the BAA mask 110 come too close to each other. Become. When such Coulomb interaction occurs, the electron beam elements repel each other as described above, and the effective focal length of the electron lens becomes long.

When exposure is performed using the BAA mask, the simplest exposure data is the same as the opening row A1, B1, C.
1, D1, E1, F1, G1, H1 or opening row A
2, B2, C2, D2, E2, F2, G2, and H2 are sequentially placed, and the exposure dots are overlapped and exposed with a desired exposure amount to expose a desired exposure pattern. On the other hand, in the BAA mask 110, each opening group (for example, K1,
By changing the exposure data with (K2, K3, K4), a very delicate control of the exposure pattern is possible. For this reason, the BAA mask 110 shown in FIG. 8 is extremely useful for correcting the so-called proximity effect in which the electron beam is reflected or scattered by the substrate to cause extra exposure. By changing each opening group (channel) and exposure data as described above, the effect of multiple exposure can be performed by one scan, and the proximity effect can be efficiently corrected.

[0025]

While scanning an electron beam composed of minute multi-beams formed by each opening (BAA) of a BAA mask, data for turning each BAA on and off is continuously changed to form a pattern. In the case of exposure, the data amount of dot pattern data for turning each BAA on and off, and the speed of scanning and data ejection are major problems.

Conventionally, since data was sequentially read from the memory and given to the electrodes of each aperture, in order to solve the problem of the amount of data, the memory for storing the data should be as large as practically possible, and the data should be compressed. It corresponds by doing efficiently. However, at present, it is difficult in terms of cost to have dot pattern data for one chip or several chips in a memory. Therefore, if the dot pattern data for one chip cannot be stored in the memory, the data stored in the memory is exposed and then interrupted once, and the data is stored in the hard disk in the form of the pattern data before being expanded into the dot pattern data. While developing the data stored in, or during the exposure, the next dot pattern data is developed and transferred to the memory to perform the exposure again. However, with this method, the throughput of exposure is determined by the capacity of the memory or the speed of development, and high throughput cannot be obtained. In addition, if you do not have enough memory to store the data for one chip and the exposure result is abnormal, the dot pattern data will be lost due to overwriting of subsequent dot pattern data, and data verification cannot be performed. Since the DRAM whose bit unit price is currently low is volatile, there is a problem that it is not suitable to leave the data developed in the dots and expose the same chip again.

As described above, if the dot pattern data is not processed at a very high speed, the throughput becomes lower as compared with the conventional variable rectangle method when the filled pattern is exposed.

Also, since the same data is ejected at different timings, for example, in the openings a and b in FIG. 2, b is 6 holes behind a, the same data is given to b with a delay of 6 clocks. With such a configuration, the number of channels is 1/2
become. If the openings arranged in the scanning direction Y are divided into N (= 4) sets like K1 to K4, the number of channels becomes (the number of columns arranged in the Y direction) × N. Further, considering the openings a and e, since the shots must be taken at positions exactly aligned on the wafer, data must be given to the opening e with a delay of 3 clocks. Conventionally, the read timing was controlled by considering the delay for each channel, but it is several ns.
It is very difficult to control with a deviation of ec, and in order to read all channels at the same time, the method of adding OFF data at the timing of the delay was also used at the data stage, but that data corresponds to which hole. Therefore, there is a problem that data creation becomes complicated because the processing has to be changed.

The present invention has been made in view of the above points,
Dot pattern data creation and exposure can be temporally separated, exposure throughput can be improved, a large amount of dot pattern data can be held, dot pattern data transfer and aperture on / off control can be easily performed, and waiting time It is an object of the present invention to provide a charged particle beam exposure method and an apparatus therefor that can perform high-speed exposure without the need for the above.

[0030]

The invention according to claim 1 is
While continuously moving the stage on which the sample is mounted in the first direction, each of the plurality of openings on the BAA mask is controlled to be turned on / off to control the plurality of charged particle beams to have a desired shape as a whole, In the charged particle beam exposure method of deflecting the charged particle beam to draw a pattern on the sample, dot pattern data for controlling on / off of each of the plurality of openings on the BAA mask is created in advance and stored in a low-speed large-capacity storage device. A storage step of storing, a transfer step of transferring a predetermined amount of dot pattern data from the low-speed large-capacity storage device to a plurality of high-speed storage devices, and a dot pattern data read from the plurality of high-speed storage devices in synchronization And a step of reading out, and each of the plurality of openings is controlled to be turned on / off by the dot pattern data read out in synchronization with each other.

According to a second aspect of the present invention, the high-speed storage device is provided for each channel with an opening to which the same dot data is supplied as one channel.

According to the third aspect of the present invention, the high-speed storage device is provided in pairs for each channel, and the dot pattern data is transferred to one of the channels, and at the same time, the dot pattern data is read from the other.

In the invention described in claim 4, the transfer step is completed when transfer of the dot pattern data to each of the plurality of high-speed storage devices is completed.

The invention according to claim 5 has a conversion step of converting the parallel dot pattern data read in the reading step into serial dot data.

According to the sixth aspect of the invention, the reading step and the converting step are performed independently.

The invention according to claim 7 has an inversion step of inverting the serial dot data converted in the conversion step.

The invention according to claim 8 has a first delay step of delaying the serial dot data in units of channels.

The present invention according to claim 9 has a second delay step of independently delaying the serial dot data delayed by the first delay step in units of apertures in the same channel.

According to the tenth aspect of the present invention, there is a phase correction step of performing phase combination of the serial dot data delayed in the second delay step.

According to the eleventh aspect of the present invention, while continuously moving the stage on which the sample is mounted in the first direction, B
A charged particle beam for controlling a plurality of charged particle beams to have a desired shape as a whole by controlling on / off of each of a plurality of openings on an AA mask, and deflecting the charged particle beams to draw a pattern on a sample. In the exposure apparatus, B
A low-speed large-capacity storage device in which dot pattern data for controlling on / off of each of the plurality of openings on the AA mask is created and stored in advance, and a plurality of predetermined amount of dot pattern data is transferred from the low-speed large-capacity storage device. The high-speed storage device and the plurality of high-speed storage devices synchronously read the dot pattern data to control the on / off of each of the plurality of openings.

According to the twelfth aspect of the present invention, the high-speed storage device is provided for each channel with an opening to which the same dot data is supplied as one channel.

According to the thirteenth aspect of the present invention, the high-speed storage devices are provided in pairs for each channel, and the dot pattern data is transferred to one of them and at the same time, the dot pattern data is read from the other.

In the fourteenth aspect of the present invention, the transfer to the high speed storage device is completed when the transfer of the dot pattern data to each of the plurality of high speed storage devices is completed.

According to a fifteenth aspect of the present invention, there is provided a conversion circuit for converting parallel dot pattern data read from the high-speed storage device into serial dot data.

According to the sixteenth aspect of the present invention, reading from the high speed storage device and fetching into the conversion circuit are performed independently.

According to a seventeenth aspect of the present invention, there is provided an inversion circuit which inverts the serial dot data converted by the conversion circuit.

In the eighteenth aspect of the present invention, there is provided a first delay circuit for delaying the serial dot data in units of channels.

According to a nineteenth aspect of the present invention, there is provided a second delay circuit which independently delays the serial dot data delayed by the first delay circuit in aperture units within the same channel.

According to a twentieth aspect of the present invention, there is provided a phase correction circuit for phase-combining the serial dot data delayed by the second delay circuit.

[0050]

According to the invention of claim 1 or 11, since the dot pattern data is created in advance and stored in the low-speed large-capacity storage device, the dot pattern data creation and the exposure can be separated temporally. Throughput is not restricted by data development, a large amount of dot pattern data can be exposed, and the held dot pattern data can be verified when the exposure result is abnormal. Further, since the dot pattern data is read out in synchronization from a plurality of high-speed storage devices, high-speed exposure is possible and throughput is improved.

In the third or thirteenth aspect of the present invention, since high-speed storage devices are provided in pairs for each channel, writing of the dot pattern data to one side and reading of the dot pattern data from the other side can be performed in parallel. You can
Since there is no waiting time, the speed can be increased.

According to the invention of claim 4 or 14, the dot pattern data is completed when the transfer of the dot pattern data to the plurality of high-speed storage devices is completed, so that the dot pattern data can be read from these in synchronization.

In the sixth or sixteenth aspect of the present invention, since the reading of the high speed storage device and the parallel / serial conversion are performed independently, the same data of the high speed storage device is used when the same dot pattern is repeatedly exposed. Data can be compressed.

In the seventh or seventeenth aspect of the invention, since the dot data is reversed, the positive / negative exposure can be easily reversed.

In the eighth or eighteenth aspect of the invention, since the dot data is delayed on a channel-by-channel basis, there is no need to consider the output timing of dot data between channels, and control is simple.

In the invention of claim 9 or 19, since the dot data of the same channel is delayed for each opening, it is not necessary to consider the output timing of the dot data between the openings of the same channel, and the control becomes simple.

According to the tenth or twentieth aspect of the present invention, since the phases of the data supplied to the respective openings are matched, it is possible to perform highly accurate exposure.

[0058]

1 is a block diagram of an embodiment of the device of the present invention. In the figure, pattern data is stored in the disk device 301. The pattern data read from the disk device 301 under the control of the central controller 302 is stored in the buffer memory 303. The data decompression transfer control circuit 304 supplies the pattern data read from the buffer memory 303 to the data decompression circuit 305, where the pattern data is decompressed to expose the individual openings on the BAA mask 110 according to the exposure pattern. Converted to dot data that turns on and off. The dot pattern data obtained here is transferred from the data transfer circuit 306 to the transfer channel 307 under the control of the control circuit 304.
a to 307j and transfer control circuits 308a to 308j, a disk device 309a to a low-speed and large-capacity storage device.
309j is transferred and stored in each.

Here, in the BAA 110 shown in FIG. 8, there are 128 × 8 (= 1024) openings, but if the dot data given to the opening a is delayed by 6 opening widths and given to the opening b, the row of openings is formed. A1 and B1, A2 and B2, C1 and D1, C
Since the same data can be used to control two apertures for 2 and D2, respectively, the number of independent channels is 1024/2 (=
512). If the exposure accuracy can be lowered, the dot data given to the opening a is delayed by three openings and given to the opening e, further delayed by three openings and given to the opening b, and further delayed by three openings and the opening f is given. , And the number of independent channels in this case is 1024/4 (= 256).

If the dot pattern data is ejected to the BAA 110 at a frequency of 400 MHz, about 20 8-inch wafers can be exposed per hour, and therefore one sheet can be exposed for 180 seconds. A chip to be exposed has a width of 20 mm, and a band-shaped region having a width of 2 mm and capable of being exposed by moving the stage in one direction as shown in FIG. 5 is called a frame. To expose one chip, expose 10 frames in one wafer. become. When the frame in one chip is called a chip frame, one chip frame has a size of 2 × 20 mm □, and the dot data in it requires 4 times the data when 4 channels are controlled.
It is Gbit. Since one chip is composed of 10 chip frames, it is sufficient if dot pattern data for one chip frame can be transferred in 18 seconds. Therefore, 25 Gbit
/ 18 sec = 174 Mbyte / sec data transfer rate is required, and if a hard disk device with a data transfer rate of 20 Mbyte / sec is used, the disk device 309
10 units of a to 309j may be provided in parallel and transferred in parallel.

Since the BAA 110 has 512 independent channels, ten disk devices 309a to 309j are provided.
Each of them stores dot pattern data for about 52 channels.

By the way, in the refocus control, the larger the current density of the electron beam, that is, the on-numerical aperture of the BAA 110, the larger the correction amount for suppressing the spread of the beam due to the Coulomb repulsive force. Therefore, when expanding the dot pattern data, the data expanding circuit 305 generates refocus data for refocus control from the number of on-bits of the dot pattern data, and the data transfer circuit 306.
To the disk device 312 via the transfer channel 320 and the transfer control circuit 321.

The dot pattern data is expanded in units of 16 cell stripes shown in FIG.
a to 309j, at this time, a description of the on-numerical aperture per cycle, which is the source of the refocus data, is created, and the refocus data is created for each cell area 14 (called a band) to create a disk device. Transfer to 312. Thereby, the disk devices 309a to 309j and 3
22 stores dot pattern data and refocus data for one chip.

The disk device 309a is a transfer control circuit 30.
Through 8a, 52 channels × 2 injection memories 310A _1a , 310B _{1a to} 310, which are high-speed storage devices.
A _52a, is connected to the 310B _52a, and is connected to the parallel-serial conversion output circuit 312 _1a ~312 _52a through the injection memory 310A _1a ~311 _52j paired with each other.
The other nine disk devices have the same configuration, and the disk device 3
09j is an injection memory 31 through the transfer control circuit 308j.
0A _1j, 310B _1j ~310A _52j, is coupled to 310B _52j, which are connected to the selector 311 _1j ~311 parallel-serial conversion output circuit through _52j 312 _{1j ~312 52j.} Further, the disk device 320 transmits a pair of refocus memories 323A through the transfer control circuit 321.
323B, refocus memory 323A, 3
23B is connected to the output circuit 325 via the selector 324.

In response to a command from the exposure control circuit 330, the exposure transfer control circuit 332 controls the transfer control circuits 308a to 308j and 321 to control all the disk devices 309a to 309.
From j, for example, one of the pair of ejection memories 310A _{1a to} 310A
To transfer the refocus data for one chip frame from the disk device 322 to refocus the memory 323A causes transfer the 1-chip frame of the dot pattern data A _52a to 310A _1j ~310A _52j.

At this time, the disk devices 309a-309
Since the transfer timings from j and 322 are shifted due to the lack of a disk, the transfer control circuits 308a to 308j and 321 which have completed the transfer respectively send an end signal to the exposure control circuit 330 via the exposure transfer control circuit 332. send.

The exposure control circuit 330 controls the memory reading after the completion signal is returned from all the transfer control circuits 308a to 308j, 321. By this control, the exposure transfer control circuit 332 causes the one ejection memory 3 of the pair.
10A _1a ~310A _52a to 310A _52j ~310A
P / S output circuit at the same time through the dot pattern data to read the selector 311 _1a ~311 _52a to 311 _1j ~311 _52j from _52j 312 _{1a ~312 52a} to 312
To supply to _{1j ~312 52j.} Further, at the same timing as this, refocus data is read from one refocus memory 323A of the pair and supplied to the output circuit 325 through the selector 324.

Further, the exposure control circuit 330, after performing the above memory read control, instructs the exposure transfer control circuit 332 to transfer data to the other memory of the pair.

[0069] The command by the exposure transfer control circuit 332 transfers control circuit 308a~308j and the other injection memory 310B _1a pairs from all disk device 309a~309j controls the 321 ~310B _52a to 310B _52j
～310B _52j 1 to transfer the refocus data for one chip frame from the disk device 322 to refocus the memory 323B with to transfer the chip frame of the dot pattern data.

The SEM / MD control circuit 335 is for performing control during scanning electron microscope (SEM) operation or mark detection (MD) operation.

In this way, the dot pattern data is created in advance and the low-speed large-capacity storage device, that is, the disk device 309
Since it is stored in a to 309j, it is possible to temporally separate the creation of dot pattern data and the exposure, and it is possible to expose a large amount of dot pattern data without the exposure throughput being restricted by data expansion. Further, it is possible to verify the held dot pattern data when the exposure result is abnormal. In addition, a plurality of injection memories 310A _{1a to} 310B, which are high-speed storage devices, are used.
_Since the dot pattern data is read synchronously from _52j , high-speed exposure is possible and throughput is improved.

Further, the injection memories 310A _{1a to} 310B
_{Since 52j} is provided in pairs for each channel, writing of dot pattern data to one side and reading of dot pattern data from the other side can be performed in parallel, and waiting time does not occur, so that speedup can be achieved.

Further, the ejection memories 310A _{1a to} 310B
_It is completed when the transfer of the dot pattern data to _52j is completed, so that the dot pattern data can be read from these in synchronization.

FIG. 2 shows a block diagram of the P / S output circuit. In the figure, 64-bit parallel dot pattern data read from the ejection memory and passed through the selector is supplied to the parallel / serial converter 350. The parallel / serial converter 350 has a built-in register, stores this dot pattern data in the register, serializes it sequentially, and outputs it at a frequency of 400 MHz, for example. This serial data is supplied to the inversion / non-inversion switching circuit 352.

The inversion / non-inversion switching circuit 352 as an inversion circuit, based on the control signal supplied from the central controller 302, does not invert the polarity of the serial data output from the selector 351 or inverts the polarity of the serial data to delay the inter-channel delay circuit. 353. Since the inversion / non-inversion switching circuit 352 is provided, the positive / negative inversion of the exposure can be easily controlled by the central controller 302, which is very effective in the positive / negative inversion exposure for the proximity effect correction.

The serial data delayed by the inter-channel delay circuit 353 which is the first delay circuit is supplied to the intra-channel delay circuits 354 and 355 which are the second delay circuit, and the serial data delayed here is phase-corrected. Circuit 3
Selectors 358,3 after being delayed by 56,357 respectively.
It is supplied to the drive electrode 121 of each opening of the BAA 110 through the D / A converter 205 via 59. The inter-channel delay circuit 353 is set with the inter-channel delay amount from the central controller 302. For example, in the P / S output circuit of the channel that controls the openings a and b in FIG.
Is 0, and in the P / S output circuit of the channel that controls the openings e and f, the delay amount of the delay circuit 353 is 3 injection clocks (the injection clock has a frequency of 400 MHz) and controls the openings c and d. In the P / S output circuit of the channel to be used, the delay amount of the delay circuit 353 is 12 injection clocks. In-channel delay circuits 354 and 355 are set with a delay amount from the central controller 302 between the openings a and b (or c, d or e and f) of the same channel. For example, the openings a and b are separated by 6 openings. Therefore, the delay amount of the delay circuit 354 of each channel is 0, and the delay amount of the delay circuit 355 is 6
It is the injection clock. By this setting, the data as shown in FIG. 3B is supplied to the opening a in synchronization with the ejection clock shown in FIG. 3A, and the data shown in FIG. It is supplied to the opening Cc.
Further, the data shown in FIG. 3 (B) is delayed by 3 emission clocks and the data as shown in FIG. 3 (D) is supplied to the opening e, which is delayed by 6 emission clocks and the data shown in FIG. 3 (E) is opened. is supplied to f. Further, the data shown in FIG. 3 (F) is supplied to the opening c after being delayed by 12 emission clocks from the data in FIG. 3 (B), and the data shown in FIG. It is supplied to the opening d.

The phase correction circuits 356 and 357 are set with the delay amount from the central controller 302. This delay amount is set in units of about 1/10 of the emission clock cycle, and the phase of the data output to the aperture of the same channel is matched.

As described above, since the dot data is delayed on a channel-by-channel basis, there is no need to consider the output timing of dot data between channels, and the control becomes simple.
Further, since the dot data of the same channel is delayed for each opening, it is not necessary to consider the output timing of the dot data between the openings of the same channel, and the control becomes simple.
Further, since the phases of the data supplied to the respective openings are matched, highly accurate exposure becomes possible.

The selectors 358 and 359 are supplied with 1-bit SEM / MD data and a selection control signal from the SEM / MD control circuit 335, and select the SEM / MD data during the SEM / MD operation according to the selection control signal. During normal exposure, the serial data from the phase correction circuits 356 and 357 is selected and output.

[0080] The output circuit of FIG. 1 325 outputs synchronously the refocus data supplied via the selector 324 to output the dot data from the P / S output circuit 312 _1a ~312 _52a to 312 _1j ~312 _52j Then, it is supplied to the electronic lens 109 and the strength of the electronic lens 109 is adjusted appropriately.

By the way, the exposure control circuit 330 is shown in FIG.
The ejection memory 31 receives the memory read signal CW1 shown in FIG.
0A _1a , ... After reading the dot pattern data A shown in FIG. 4B, the P / S output circuits 312 _1a ,. To get into. Further, the dot pattern data B is read from the ejection memories 310B _1a , ... With the memory read signal CW2, and the dot pattern data B is taken in by the control signal CR2. The P / S output circuits 312 _1a ,. 35
It is taken into 0. Further, when the dot pattern data B is repeatedly exposed, the exposure control circuit 330 does not generate a memory read signal, and the capture control signal CR3.
CR4 is generated, whereby the ejection memory 310B _1a , ...
The dot pattern data B read from the P / S
The output circuits 312 _1a , ... Are repeatedly loaded into the respective parallel / serial converters 350.

In this way, the ejection memories 310A _{1a to} 310A
A _52j, 310B _1a ~310B _52j reads and P / S
Since the output circuits 312 _1a , ... Are taken in independently of the respective parallel / serial converters 350, the same data in the ejection memory is used when the same dot pattern is repeatedly exposed, so that data compression is possible.

The disk device 301 of FIG. 1 corresponds to the external storage device 201 of FIG.
Corresponds to the CPU 202, and the buffer memory 303 corresponds to the buffer memory 203a. Data expansion circuit 305
Is the data expansion unit 203b and the refocus control circuit 20.
3e, the disk devices 309a to 309j correspond to the canvas memory 203c, and the ejection memory 310A _1a.
～310B _52j and the selector 311 _1a ~311 _52j and P / S output circuit 312 _1a ~312 _52j corresponds to the output buffer circuit 204. The disk device 322 and the refocus memories 323A and 323B correspond to the refocus data storage memory 203f.

[0084]

As described above, according to the invention of claim 1 or 11, since the dot pattern data is created in advance and stored in the low-speed and large-capacity storage device, the dot pattern data is created and exposed in a time-consuming manner. , The throughput of exposure is not regulated by data development, and a large amount of dot pattern data can be exposed. Also, when the exposure result is abnormal, the held dot pattern data can be verified. Can be done. Further, since the dot pattern data is read out in synchronization from a plurality of high-speed storage devices, high-speed exposure is possible and throughput is improved.

According to the invention of claim 3 or 13,
Since a pair of high-speed storage devices is provided for each channel, writing of dot pattern data to one side and reading of dot pattern data from the other side can be performed in parallel, and no waiting time is generated, so that the speed can be increased.

According to the invention of claim 4 or 14,
Since the transfer of the dot pattern data to the plurality of high-speed storage devices is completed when all are completed, the dot pattern data can be read from these in synchronization.

According to the invention of claim 6 or 16,
Since the reading of the high-speed storage device and the parallel / serial conversion are performed independently, when the same dot pattern is repeatedly exposed, the same data of the high-speed storage device is used, so that data compression is possible.

According to the invention of claim 7 or 17,
Since the dot data is reversed, the positive / negative of the exposure can be easily reversed.

According to the invention of claim 8 or 18,
Since the dot data is delayed on a channel-by-channel basis, there is no need to consider the output timing of dot data between channels, and control is simple.

According to the invention of claim 9 or 19,
Since the dot data of the same channel is delayed for each opening, it is not necessary to consider the output timing of the dot data between the openings of the same channel, and the control becomes simple.

Furthermore, according to the tenth or twentieth aspect of the invention, since the phases of the data supplied to the respective openings are matched, highly accurate exposure is possible, which is extremely useful in practice.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the device of the present invention.

FIG. 2 is a block diagram of a P / S output circuit.

FIG. 3 is a signal timing chart for explaining the operation of the present invention.

FIG. 4 is a signal timing chart for explaining the operation of the present invention.

FIG. 5 is a diagram showing a scanning method.

FIG. 6 is a diagram showing a scanning method.

FIG. 7 is a diagram showing an overall configuration of an exposure apparatus.

FIG. 8 is a diagram showing a configuration of a blanking aperture array.

[Explanation of symbols]

100 electron optical system 101 electron beam source 102, 102a electron beam shaping section 103, 104, 105, 106, 107 electron lens 108 focus correction coil 109 stig correction coil 110 BAA mask 111 main deflector 112 sub-deflector 113 round aperture plate 113a Round aperture 114 Moving stage 115 Substrate 116 Blanking deflector 200 Exposure control system 201 External storage device 202 CPU 203, 203 _{1 to} 203 _N Data expansion circuit 203a Buffer memory 203b Data expansion unit 203c Canvas memory 203d Address counter 203e Refocus circuit 203f register 203g bit selection circuit 203h latch circuits _{204,204 1 ~204 N, 204 1 ~204} 128
BAA data storage and output circuit 205, 205 _{1 to} 205 _N BAA drive circuit 206 Exposure control circuit 207 Main deflection control circuit 207a Distortion correction circuit 207b Stig correction circuit 207c Focus correction circuit 208 Sub deflection control circuit 209 Stage control circuit 210 Autoloader control circuit 211 registers 301, 309a to 309j, 322 disk device 302 central controller 303 buffer memory 304 data expansion transfer control circuit 305 data expansion circuit 306 data transfer circuit 307a to 307j, 320 transfer channel 308a to 308j, 321 transfer control circuit 310A _{1a to} 310B _52j injection memory 311 _1a ~311 _52j, 324,351 selector 312 _1a ~312 _52j P / S output circuit 325 output circuit 350 parallel / serial Le converter 352 inverting / non-inverting switching circuit 353 to 355 delay circuits 356 and 357 phase correction circuit

Front Page Continuation (72) Inventor Hiroshi Yasuda 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited

Claims (20)

[Claims] 1. A plurality of charged particle beams have a desired shape as a whole by controlling on / off of a plurality of openings on a BAA mask while continuously moving a stage on which a sample is mounted in a first direction. In the charged particle beam exposure method in which the charged particle beam is deflected to draw a pattern on the sample, dot pattern data for on / off controlling each of the plurality of openings on the BAA mask (110) is created in advance. And storing in a low-speed large-capacity storage device (309a to 309j), and a predetermined amount of dot pattern data from the low-speed large-capacity storage device (309a to 309j) to a plurality of high-speed storage devices (310A _{1a to} 310B). _52j ) and a plurality of high-speed storage devices (310A _{1a to} 310A).
B _52j ), a step of reading out dot pattern data in synchronism with each other, and ON / OFF control of each of the plurality of apertures is carried out by the dot pattern data read out in synchronism. 2. The high speed storage device (310A _{1a to} 31A)
2. The charged particle beam exposure method according to claim 1, wherein 0B _52j ) is provided for each channel with an opening to which the same dot data is supplied as one channel. 3. The high-speed storage device (310A _{1a to} 31A)
0B _52j ) are provided in pairs for each channel, and transfer dot pattern data to one of them at the same time.
3. The charged particle beam exposure method according to claim 2, wherein dot pattern data is read from the other side. Wherein said transfer step, charged particles of claim 1, wherein the complete when the dot pattern data transferred to each of the plurality fast storage device (310A _1a ~310B _52j) husband was completed Beam exposure method. 5. The charged particle beam exposure method according to claim 1, further comprising a conversion step (350) of converting parallel dot pattern data read in the reading step into serial dot data. 6. The charged particle beam exposure method according to claim 5, wherein the reading step and the converting step are performed independently. 7. The charged particle beam exposure method according to claim 6, further comprising an inversion step (352) of inverting the serial dot data converted in the conversion step. 8. The charged particle beam exposure method according to claim 6, further comprising a first delay step (353) of delaying the serial dot data in units of channels. 9. A second delay step (354, 355) for independently delaying the serial dot data delayed by the first delay step for each aperture unit in the same channel. 8. The charged particle beam exposure method according to item 8. 10. The second delay step (354, 35)
10. The charged particle beam exposure method according to claim 9, further comprising a phase correction step (356, 357) for phase-combining the serial dot data delayed in 5). 11. While continuously moving a stage on which a sample is mounted in a first direction, each of a plurality of apertures on a BAA mask is on / off controlled to form a plurality of charged particle beams into a desired shape as a whole. In the charged particle beam exposure apparatus which controls the above-mentioned operation and deflects the charged particle beam to draw a pattern on the sample, dot pattern data for ON / OFF controlling each of the plurality of openings on the BAA mask (110) is created in advance. storage of low-speed large-capacity stored Te and (309a~309j), a plurality of high-speed storage device to be transferred a predetermined amount of the dot pattern data from the storage device (309a~309j) of the low-speed large-capacity (310A _1a ~ 310B _52j ) and the plurality of high speed storage devices (310A _{1a to} 310A).
B _52j ), the dot pattern data is read out in synchronism, and each of the plurality of apertures is controlled to be turned on and off. 12. The high-speed storage device (310A _1a- 3A).
_12. The charged particle beam exposure apparatus according to claim 11, wherein the 10B _52j ) is provided for each channel with an opening to which the same dot data is supplied as one channel. 13. The high speed storage device (310A _1a- 3A).
13. The charged particle beam exposure apparatus according to claim 12, wherein the 10B _52j ) are provided as a pair for each channel, and the dot pattern data is transferred to one of the channels and the dot pattern data is read from the other simultaneously. 14. The high-speed storage device (310A _1a- 3A).
10B _52j ) is transferred to a plurality of high-speed storage devices (31
0A _1a ~310B _52j) charged particle beam exposure apparatus according to claim 11, wherein the dot pattern data to the respective transfer is characterized in that to complete when completed. 15. The high-speed storage device (310A _1a- 3)
The conversion circuit (350) for converting parallel dot pattern data read from the 10B _52j ) into serial dot data.
2. The charged particle beam exposure apparatus according to 2. 16. The high-speed storage device (310A _1a- 3A)
10B _52j ) and the conversion circuit (35
16. The charged particle beam exposure apparatus according to claim 15, wherein the incorporation into 0) is performed independently. 17. An inversion circuit (352) for inverting serial dot data converted by the conversion circuit (350).
The charged particle beam exposure apparatus according to claim 16, further comprising: 18. The charged particle beam exposure apparatus according to claim 16, further comprising a first delay circuit (353) for delaying the serial dot data in units of channels. 19. A second delay circuit (354, 35) that independently delays the serial dot data delayed by the first delay circuit (353) in aperture units within the same channel.
The charged particle beam exposure apparatus according to claim 18, further comprising 5). 20. The second delay circuit (354, 35)
20. The charged particle beam exposure apparatus according to claim 19, further comprising a phase correction circuit (356, 357) for phase-combining the serial dot data delayed in 5).