JPH07240700A - Inverse spread spectrum circuit - Google Patents

Abstract

PURPOSE:To generate a spread code by the use of a simple configuration and implement inverse spread spectrum by using the code. CONSTITUTION:A phase of a reception signal subject to spread spectrum processing is compared with a phase of an output signal from a 1st multiplier 18 at a phase comparator 13. An output depending on the phase difference is fed to a VCXO 15 via an LPF 14. After an output signal of the VCXO 15 is subjected to frequency division by means of a frequency divider 16 and the result is applied to a spread code generation circuit 17 as a clock signal. The generated spread code is multiplied by an output signal of the VCXO 15 with a 1st multiplier 18 and the product is applied to the phase comparator 13. Thus, the spread code is synchronously with the reception signal and the spread code and the 2nd multiplier 19 are multiplied at a 2nd multiplier 19, in which inverse spread spectrum processing is implemented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a spectrum despreading circuit for despreading a signal that has been spectrum spread by a predetermined code.

[0002]

2. Description of the Related Art Conventionally, various wireless communication systems have been proposed, and a spread spectrum communication system is one of them. In this spread spectrum communication system (particularly, direct spread system), the transmission side multiplies the primary modulation signal modulated by the information signal by a spread code to obtain a spread spectrum signal. Then, the spectrum-spread signal is wirelessly transmitted. On the other hand, on the receiving station side, the received signal is despread by multiplying it by a spreading code, the received signal is returned to a primary modulated signal, and this is demodulated to obtain an information signal. As described above, in the spread spectrum communication method, since the spread spectrum signal is wirelessly communicated, it is possible to perform communication while eliminating interference with radio communication by radio waves of a predetermined frequency.

Here, in the spread spectrum communication system, the received signal must be despread. For this despreading, the spreading code generated on the receiving side must be multiplied by the spreading code in the received signal (reception spreading code) in synchronization. As a circuit for despreading such a received signal, there is one called a DLL (delay lock loop) as shown in FIG. In FIG. 2, the received signal whose frequency has been converted by the frequency conversion circuit (1) is the multiplier (2).
And (3) and multiplied by the first PN code from the PN (pseudo noise) code generator (6) and the second PN code one bit before the first PN code, respectively. Multiplier (2)
The outputs of (3) and (3) are detected by the envelope detectors (4) and (5), respectively, and then applied to the comparator (7), and the output according to the comparison result of the comparator (7) is LPF ( It is applied to a VCXO (voltage controlled crystal oscillator) (9) via a low pass filter (8). Furthermore, VCXO (9)
The output signal of is applied to the PN code generator (6). The first PN code is delayed by T / 2 in the delay circuit (10) and then applied to the multiplier (11) to be multiplied by the received signal to perform spectrum despreading. Note that T is the time corresponding to one bit of the PN code.

By the way, the envelope detectors (4) and (5)
The output of is as shown in FIG. 4 (a) and (b), respectively.
It is a triangular wave which becomes high level when synchronized and becomes 0 when the output is shifted by 1 bit or more. The output of the comparator (7) to which both outputs are applied is the waveform as shown in FIG. Becomes The point (a) in FIG. 4C is an intermediate point between the two outputs of the PN code generator (6). Therefore, in the circuit of FIG. 2, the VCXO (9) is set so that the output level of the LPF (8) becomes 0 level such as the point (a) of FIG. 4C.
The frequency of the output signal of changes, and it becomes a lock state.

[0005]

However, in the circuit as shown in FIG. 2, since the outputs of the envelope detectors (4) and (5) become 0 when the cycle is out of one bit or more, the VCXO
It takes a long time for the circuit of FIG. 2 to become in a synchronous state because the input signal of (9) is lost. Therefore, since a circuit such as a sliding correlator is added so that the circuit of FIG. 2 is brought into a synchronized state in a short time, there is a problem that the circuit becomes complicated.

Further, in FIG. 2, two multipliers (2) are provided.
Since two loops using (3) and (3) are configured, if the loop gains are different, an offset occurs in the output signal of the comparator (7). Therefore, even if the DLL in FIG. 2 is locked, the point (a) in FIG. 4C is 2 in the PN code generator (6).
Since it was not in the middle of the output synchronization point, the PN code was not synchronized with the received signal and the spectrum despreading could not be performed correctly.

Further, when a received signal having a strong electric field strength is received, the outputs of the envelope detectors (4) and (5) are changed to those shown in FIG.
The waveform becomes as shown in (d), and it becomes difficult to detect the synchronization point.
Therefore, it is necessary to provide an AGC circuit for adjusting the electric field strength of the received signal to an appropriate level so that the output becomes a triangular wave output. Therefore, there is a problem that the circuit of FIG. 2 becomes complicated.

[0008]

The present invention has been made in view of the above points, and in a spectrum despreading circuit for despreading a signal spread spectrum by a spread code,
A controllable oscillator, a spread code generating circuit for generating a spread code based on the clock, to which an output signal of the oscillator is applied, and a first multiplier for multiplying the spread code by the output signal of the oscillator. And a phase comparator for comparing the phases of the output signal of the first multiplier and the received signal to generate a control signal for the oscillator, and a second multiplier for multiplying the received signal and the spread code. It is characterized by having and. Further, the phase comparator, the oscillator, and the first multiplier form a PLL.

[0009]

According to the present invention, the output signal of the first multiplier and the received signal are applied to the phase comparator, and the phases of both signals are compared. The output signal of the phase comparator according to the comparison difference is applied to the oscillator to control the oscillator. The output signal of the oscillator is applied as a clock to the spread code generation circuit, and the spread code generation circuit generates the spread code. The spreading code is applied to the first multiplier and is multiplied by the output signal of the oscillator, and is also applied to the second multiplier and is multiplied by the received signal. Since the spreading code is synchronized with the received signal, the received signal can be correctly spectrum despread.

[0010]

FIG. 1 is a diagram showing an embodiment of the present invention,
(13) is a phase comparator, (14) is an LPF, and (15) is a VCX controlled by the output signal of the LPF (14).
O, (16) is a frequency divider that divides the output signal of the VCXO (15), (17) is a spreading code generation circuit that generates a spreading code, and (18) is a spreading code and the output signal of the VCXO (15). A first multiplier for multiplying by, a (19) second multiplier for multiplying a spread code by a received signal, and (20) a second multiplier (1
It is a primary demodulation circuit for demodulating the output signal of 9). The same circuits as those in the related art are denoted by the same reference numerals as those in the related art, and description thereof will be omitted.

Next, the operation of FIG. 1 will be described with reference to the waveform chart of FIG. A signal in which a predetermined spreading code is generated at the transmitting side in synchronization with or asynchronously with a carrier signal and the primary modulation signal is spectrum-spread by the spreading code is applied to the frequency converter (1) via the antenna on the receiving side. It In the frequency converter (1), the received signal is converted into, for example, a low frequency so that it can be easily processed by the circuit in the subsequent stage.
The frequency-converted signal SPS (FIG. 3A) is applied to the phase comparator (13) and the second multiplier (19). Here, the signal SPS is a signal obtained by multiplying an information signal by a spread code, for example, a PN code as described above. If the sine wave information signal is multiplied by a PN code consisting of "1" or "0", The waveform is as shown in 3 (a).

In the phase comparator (13), the signal SPS
And the phase of the output signal of the first multiplier (18) are compared,
An output signal is generated according to the phase difference. Phase comparator (1
The output signal of 3) is smoothed in the LPF (14),
It is applied to the VCXO (15) as a control signal. VCX
A sine wave signal CS (FIG. 3B) is generated from O (15), and the frequency of the signal CS changes according to the control signal.
The output signal of the VCXO (15) is not limited to a sine wave,
It may be a rectangular wave, a triangular wave, or the like.

The signal CS is then applied to the frequency divider (16) and the first multiplier (18). The signal CS applied to the frequency divider (16) is frequency-divided at a predetermined frequency division ratio and then applied to the spread code generation circuit (17). The spread code generating circuit (17) is composed of, for example, an n-bit shift register, and circulates and shifts the recorded data according to the output signal of the frequency divider (16) applied as an input clock. , A PN code as an extension code (FIG. 3 (c))
From the leftmost shift register. The PN code is further applied to the first and second multipliers (18) and (19).

In the first multiplier (18), VCXO
The signal CS from (15) is multiplied by the PN code from the spread code generating circuit (17). Since the PN code is generated based on the signal CS, the PN code is synchronized with the signal CS. Therefore, if the PN code of the signal DS (FIG. 3 (d)) generated from the first multiplier (18) is the same as the PN code of the transmission side, the spectrum-spread signal, that is, the same signal as the reception signal SPS. become. The signal DS is shown in FIG.
Generated as a square wave from the first multiplier (18),
It is applied to the phase comparator (13). Therefore, in the phase comparator (13), the received signal SPS and the first multiplier (1
The output signal DS of 8) is compared in phase. The phase comparator (13), the LPF (14), the VCXO (15) and the multiplier (18) form a PLL, and the PLL is the phase comparator (1
It operates so that the phases of the two input signals SPS and DS of 3) are synchronized. If the signal SPS and the signal DS are synchronized, the PN code is received from the spread code generator (7) by the received signal SP.
It will be synchronized with S.

In the second multiplier (19), the received signal S
The spectrum despreading is performed by multiplying the PS and the PN code. Since the PN code is synchronized with the received signal by the operation as described above, the second multiplier (1
In 9), despreading is performed correctly, and the despread signal is demodulated by the primary demodulation circuit, so that an information signal can be correctly obtained.

By the way, the PN code on the receiving side is the P code on the transmitting side.
If it is different from the N code, the signal DN becomes a completely different signal from the received signal SPS. Therefore, the signal DN and the signal SP
Even if S and S are applied as input signals to the phase comparator (13), the phases are not synchronized with each other, and the PN code from the spread code generation circuit is not synchronized with the received signal SPS. Therefore, the receiver has its own P
Only a received signal having a PN code equal to the N code can be despread, and it has its own discrimination capability.

Since a widely known PLL method is used to synchronize the received signal and the spread code, the circuit configuration of the spectrum despreading circuit can be simplified. Then, by shortening the lockup time of the PLL, the time until the synchronization can be shortened. Further, as the phase comparator (13), since the duty of the received signal is not 50%, it is preferable to use an edge detection type digital phase comparator.

[0018]

According to the present invention, since the same signal as the received signal is generated and the phases of the signal and the received signal are matched, the spread code is synchronized with the received signal.
Even if the received signal and the PN code are deviated from each other by 1 bit or more, a difference occurs, so that the circuit of the present application can be brought into a synchronized state in a short time, and a simple circuit can be configured.

Further, since there is only one loop for matching the phases of the received signal and the same signal, the problem of offset caused by the difference in loop gain does not occur.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing a conventional example.

FIG. 3 is a waveform diagram showing output waveforms of respective parts of FIG.

FIG. 4 is a waveform diagram showing output waveforms of respective parts of FIG.

[Explanation of symbols]

 13 phase comparator 14 LPF 15 VCXO 16 frequency divider 17 spreading code generation circuit 18 first multiplier 19 second multiplier

Claims (2)

[Claims] 1. A spectrum despreading circuit for despreading a signal spread spectrum by a spread code, wherein a controllable oscillator and an output signal of said oscillator are applied as a clock, and a spread code is generated based on said clock. A spreading code generating circuit, and a first multiplying the spreading code and an output signal of the oscillator
A multiplier, a phase comparator for comparing the phases of the output signal of the first multiplier and the received signal, and generating a control signal for the oscillator, and a second comparator for multiplying the received signal by the spread code. A spectrum despreading circuit comprising a multiplier. 2. The spectrum despreading circuit according to claim 1, wherein the phase comparator, the oscillator, and the first multiplier form a PLL.