JPH07240651A - Pie filter - Google Patents

Abstract

PURPOSE:To obtain a pie filter where packaging density is improved by arranging a chip capacitor incoporating plural capacitor elements on one side of a part interposed with a circuit board and arranging a ferrite chip based on the other side. CONSTITUTION:Between two capacitor elements 10 and 11 incorporated in a chip capacitor 100, the inductor element 27 incorporated in a ferrite chip base 200 is arranged, and a pie filter circuit is formed as a whole. Thus, the ferrite chip bead 200 and the chip capacitor 100 are arranged at the correspondent location of the front and back surfaces of the circuit board and are connected to each other through holes 34a and 34b. As a result, the packaging space is saved by one capacitor as compared with a case where three elements of two capacitors and one ferrite based are arranged on the circuit board, the front and back surfaces of the circuit board are used so that a pie shape filter which is formed in a compact shape can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pie-type filter used as a countermeasure against noise in electronic equipment.

[0002]

2. Description of the Related Art Conventionally, electronic parts such as capacitors, ferrite beads, and T-shaped EMI filters have been sold as countermeasures against high frequency noise in electronic equipment.
MI filters are not sold. This is a pie type EMI
It is not because there is no demand for filters, but when dielectrics that compose capacitors and magnetic bodies that compose ferrite beads are laminated and fired at the same time, cracks may occur due to the difference in contraction rate between the dielectrics and magnetic bodies. This is due to reasons such as manufacturing difficulty and cost. For this reason, when a pie-type noise filter is conventionally required, a pie-type filter configured by arranging two capacitors and one ferrite bead on a substrate is used.

[0003]

Therefore, it is impossible to increase the board mounting density by constructing a pie filter by arranging two capacitors and one set of ferrite beads on the board as described above. Was holding. The present invention is
In view of the above circumstances, it is an object of the present invention to propose a pie filter having an improved packaging density.

[0004]

A pie filter according to the present invention that achieves the above object comprises: (1) a circuit board (2) a chip mounted on one surface of the circuit board and containing a plurality of capacitor elements. Capacitor (3) A ferrite chip bead mounted on the other surface of the circuit board, which is connected to the chip capacitor through the through hole of the circuit board and which has an inductor formed with the plurality of capacitor elements to form a pie filter circuit. It is characterized by having.

[0005]

The pi-type filter of the present invention has a pi-type filter formed by disposing a chip capacitor containing a plurality of capacitor elements on one side of the circuit board as described above and arranging ferrite chip beads on the other side. It is possible to increase the mounting density for one capacitor, and by using both sides of the circuit board, a small pie filter is constructed.

[0006]

EXAMPLES Examples of the present invention will be described below. FIG. 1 is a diagram showing each green sheet of a chip capacitor having two capacitor elements built therein, FIG. 2 is an external perspective view thereof, and FIG. 3 is an equivalent circuit diagram thereof. 4 shown here
Sheets of green sheets 1 to 4 are prepared. The green sheets 1 to 4 are formed by printing a dielectric slurry on a polyester base sheet by a doctor blade method and drying. The dielectric material used here is P
bO, La ₂ O ₃ , ZrO ₂ , and TiO ₂ are wet-mixed,
Pb _0.88 La _0.12 Zr _0.7 T, which is a powder having an average particle size of 0.1 μm pulverized in a wet mill after firing at 1150 ° C. for 2 hours.
i _0.3 O _0.08 .

Of the four green sheets 1 to 4, the green sheets 2 and 3 are printed and dried with a dielectric material, and then a conductive paste is applied by a doctor blade method so that each of them has the shape shown in the drawing. After printing and drying, the internal electrodes 5, 6a, 6b are formed. Among these internal electrodes 5, 6a, 6b, the pair of internal electrodes 5, 6a sandwiching the dielectric and the pair of internal electrodes 5, 6b respectively cause the capacitor elements 10, 1 in the equivalent circuit shown in FIG.
1 is configured.

The four green sheets 1 to 4 formed as described above are laminated with each other, integrated by thermocompression bonding, and then fired at 1300 ° C. for 1 hour to obtain a sintered body. The sintered body is barrel-polished to expose the internal electrodes 5, 6a, 6b from the side surface of the sintered body, and a conductive paste containing Ag as a main component is applied to the exposed portions of the internal electrodes 5, 6a, 6b. By coating, as shown in FIG. 2, electrodes 7 and 8 connected to the internal electrodes 6a and 6b, respectively, and electrodes 9a and 9b connected to the internal electrode 5 are thus formed. As a result, a chip capacitor having the shape shown in FIG. 2 having two built-in capacitor elements is completed.

FIG. 4 is a diagram showing each green sheet of ferrite chip beads, FIG. 5 is an external perspective view thereof, and FIG. 6 is an equivalent circuit diagram thereof. Here, the three illustrated green sheets 21 to 23 are prepared. These green sheets 21 to 23 are formed by printing a magnetic slurry on a polyester base sheet by a doctor blade method and drying. The magnetic material used here is Ni
Wet-mix O, ZnO, CuO, and Fe ₂ O ₃ to obtain 100
Average particle size of 0.1
μm is the _{powder, Ni 0.14 Zn 0. 22 Cu 0.06} Fe 0.96
It has a composition of O _1.88 .

Of these four green sheets 21 to 23, after the magnetic material is printed and dried on the green sheet 22, a conductive paste is printed and dried by the doctor blade method so as to have the shape shown in the drawing. Then, the internal electrode 24 is formed. The inner electrode 24 is surrounded by a magnetic material and constitutes an inductor element 27 shown as an equivalent circuit in FIG.

The three green sheets 21 to 23 formed as described above are laminated with each other, integrated by thermocompression bonding, and then fired at 870 ° C. for 2 hours to obtain a sintered body. The sintered body is barrel-polished to expose the internal electrode 24 from the side surface of the sintered body, and a conductive paste containing Ag as a main component is applied to the exposed portion of the internal electrode 24. As shown, the electrodes 25 and 26 connected to the internal electrode 5 are formed. As a result, the ferrite chip beads having the shape shown in FIG. 5 in which the inductor element is incorporated are completed.

7 to 9 are a plan view, a side view, and a back view, respectively, showing a state in which the chip capacitor 100 and the ferrite chip beads are arranged on the circuit board. Signal conductor patterns 31a and 31b having the illustrated shapes are formed on the front surface 30A of the circuit board 30, and signal conductor patterns 32a and 32b and ground conductor patterns 33a and 33b having the illustrated shapes are formed on the back surface 30B. Has been formed. Each signal conductor pattern 31a, 31 on the surface 30A
b and the signal conductor patterns 32a and 33b on the back surface 30B
Are through holes 34a formed in the circuit board 30,
They are connected to each other by a conductor filled in 34b. On the front surface 30A of the circuit board 30, the ferrite chip beads 200 are arranged so as to straddle the two signal conductor patterns 32a and 32b, and the electrodes 25 and 26 and the signal conductor patterns 32a and 32b are connected by soldering, respectively. Has been done. Further, on the back surface 30B of the circuit board 30, the two-element chip capacitor 100 is arranged so as to straddle the two signal patterns 32a and 32b and the two ground conductor patterns 33a and 33b, and the electrodes 7 and 8 are respectively arranged. The electrodes 9a and 9b are soldered to the signal conductor patterns 32a and 32b, respectively, and the electrodes 9a and 9b are connected to the ground conductor pattern 3 respectively.
Solder connection is made to each of 3a and 33b.

FIG. 10 is an equivalent circuit diagram of the chip capacitor 100 and the ferrite chip bead 200 connected as shown in FIGS. The inductor element 27 incorporated in the ferrite chip bead 200 is arranged between the two capacitor elements 10 and 11 incorporated in the chip capacitor 100, and a pie filter circuit is formed as a whole.

As shown in this embodiment, since the ferrite chip beads 200 and the chip capacitors 100 are arranged at corresponding positions on the front surface 30A and the rear surface 30B of the circuit board 30 and are connected to each other through the through holes 34a and 34b,
Compared to arranging 3 elements of 2 capacitors and 1 ferrite bead on the circuit board, the mounting space for 1 capacitor is not necessary, and the front and back of the circuit board are used to form a compact pie filter. To be done.

[0015]

As described above, according to the present invention,
A pi-type filter with high packaging density is constructed.

[Brief description of drawings]

FIG. 1 is a diagram showing each green sheet of a chip capacitor having two capacitor elements built therein.

FIG. 2 is an external perspective view of a chip capacitor.

FIG. 3 is an equivalent circuit diagram of a chip capacitor.

FIG. 4 is a diagram showing each green sheet of ferrite chip beads.

FIG. 5 is an external perspective view of a ferrite chip bead.

FIG. 6 is an equivalent circuit diagram of a ferrite chip bead.

FIG. 7 is a plan view showing a state in which a chip capacitor and ferrite chip beads are arranged on a circuit board.

FIG. 8 is a side view showing a state in which a chip capacitor and ferrite chip beads are arranged on a circuit board.

FIG. 9 is a rear view showing a state in which a chip capacitor and ferrite chip beads are arranged on a circuit board.

FIG. 10 is an equivalent circuit diagram of a chip capacitor and a ferrite chip bead connected as shown in FIGS.

[Explanation of symbols]

 1,2,3,4,21,22,23 Green sheet 5,6a, 6b, 24 Internal electrode 7,8,9a, 9b, 25,26 Electrode 10,11 Capacitor element 27 Inductor element 30 Circuit board 30A Circuit board Front surface 30B Circuit board back surface 31a, 31b, 32a, 32b Signal conductor pattern 33a, 33b Ground conductor pattern 34a, 34b Through hole 100 Chip capacitor 200 Ferrite chip beads

Claims (1)

[Claims] 1. A circuit board, a chip capacitor mounted on one surface of the circuit board and containing a plurality of capacitor elements, and a through hole of the circuit board mounted on the other surface of the circuit board. A pie-shaped filter comprising: a ferrite chip bead, which is connected to the chip capacitor via the inductor and is formed with the plurality of capacitor elements to form a pi-shaped filter circuit.