JPH07199866A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To provide a liquid crystal display device capable of reproducing an image having an excellent image quality and whose power consumption is small in spite of adopting a signal line inversion driving. CONSTITUTION:In the liquid crystal display device provided with plural signal lines 1 (1-1, 1-2,...) and signal lines 2 (2-1, 2-2,...) for writing an image signal on pixel electrodes arranged in a matrix and with signal line drivers 10, 20 inverse-driving lines being adjacent each other with respect to these signal lines 1, 2, semiconductor switches 5 composed of TFTs are respectively connected in between signal lines (in between 1-1 and 2-1, in between 1-2 and 2-2,...) at every adjacent two signal lines 1, 2 and these switches 5 are turned on in a period when the image signal is not inputted to signal lines.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to a signal line inversion drive type liquid crystal display device.

[0002]

2. Description of the Related Art In recent years, liquid crystal displays have become higher in resolution (increasing the number of pixels), and drive frequencies have become faster. Under such circumstances, a common reversal drive in which the common electrode is swung in the opposite direction to the polarity of the image for the purpose of lowering the voltage of the driving IC to support a high speed signal (Japanese Patent Laid-Open No. 55-28).
No. 649) and a power supply level shift drive (Japanese Patent Application No. 4-48313) that shifts the power supply voltage in synchronization with the polarity of the image.

However, in the common inversion drive, since a large capacity common has to be driven in a horizontal drive cycle (15 to 30 microseconds), power consumption increases. In addition, the power supply level shift drive requires driving a large power supply capacity, so a powerful drive circuit is newly required, and it is not applicable to driving that needs to drive the power supply at high speed such as dot inversion. difficult. Therefore, at present, only the signal line inversion drive is performed. This signal line inversion drive has a characteristic that lateral crosstalk, which is caused by an increase in common resistance when a screen is enlarged, is less likely to occur.
Since vertical crosstalk is likely to occur due to FT leakage, the required specifications for TFT characteristics become strict.

Further, as a method for solving such a problem, there has been proposed a method in which a switch is provided inside the driving IC with a constant power supply to switch the signal line to be driven for each field (Japanese Patent Laid-Open No. 3-51887). Issue, Japanese Patent Application 1-
188299). However, even if such a method is used, when dot inversion drive capable of achieving high image quality is realized by combining signal line inversion and line inversion, the polarity must be inverted for each line, resulting in increased power consumption. Or the number of outputs from the upper and lower drive ICs is doubled, which makes it difficult to mount.

[0005]

As described above, the conventional liquid crystal display device which performs the signal line inversion drive has a problem that the power consumption increases and the image quality deteriorates due to horizontal crosstalk or vertical crosstalk. It was

The present invention has been made in consideration of the above circumstances. An object of the present invention is to provide a liquid crystal display device which employs signal line inversion driving and which can reproduce an image of high quality with low power consumption. To do.

[0007]

In order to solve the above problems, the present invention employs the following configurations. That is, the present invention provides a liquid crystal display device including a plurality of signal lines for writing image signals in pixel electrodes arranged in a matrix and a means for inverting and driving those adjacent to these signal lines, It is characterized in that a semiconductor switch is provided between every two adjacent signal lines which are driven in reverse.

Here, the following are preferred embodiments of the present invention. (1) In the case of color display, the semiconductor switch must be connected between the signal lines for writing the same color signal. (2) The semiconductor switch is formed by connecting two semiconductor switches in series between the adjacent one signal line and the other signal line, and the connection point of these semiconductor switches is connected to the pixel electrode. (3) One of the two semiconductor switches of (2) is an n-channel MOS transistor and the other is a p-channel MOS transistor, and the gates of the respective transistors are commonly connected and connected to the scanning line. (4) The semiconductor switch shall be conductive during the period when the image signal is not input to the signal line. (5) The semiconductor switch must be a MOS transistor (TFT) formed of polysilicon or single crystal silicon. (6) Form the signal line driver integrally with polysilicon or single crystal silicon and the display portion.

[0009]

According to the present invention, by the operation of the semiconductor switch between the adjacent signal lines, the power consumption for driving the signal lines for each field or frame can be reduced, and vertical crosstalk and horizontal crosstalk can be prevented. Even in the dot inversion driving method that can reduce the power consumption, the power consumption can be reduced.

Further, the semiconductor switch is made of polysilicon M.
It is possible to deal with even when the pitch of the signal line becomes fine by forming the OS transistor and further forming the signal line driver integrally with the polysilicon. Further, the configuration in which p-channel and n-channel MOS transistors are combined as a semiconductor switch makes it possible to reduce vertical crosstalk even in signal line inversion driving.

[0011]

EXAMPLES First, before explaining the examples, it is examined what factors determine the power consumption of the drive circuit (module circuit) of the liquid crystal display device. Here, the power consumption does not include the power consumption due to the bias current flowing in a direct current.

The drive circuit is basically divided into a signal line drive circuit, a buffer circuit, a control signal generation circuit, a common drive circuit, and a gate line drive circuit. Each of these will be described in detail below. (1) Signal line drive circuit This is a drive IC for driving a signal line, and can be divided into a digital system and an analog system. However, since the OA image is digital, power consumption is improved for the digital system with good consistency. consider.

The digital type driving IC is basically a shift register for determining a signal sampling time, a latch circuit for latching a digital signal, a D / A conversion circuit for converting a digital signal into an analog signal, and an output for driving a signal line. It consists of a buffer. Here, the factors that determine the power consumption are the latch circuit and the output buffer, so only these two are considered.

[0014] Maximum power consumption P ₁ of the latch circuit, C ₁ input equivalent capacitance to an image signal, the input equivalent capacitance regarding sampling clock C _ck, the sampling frequency of the image when the _{f s, P 1 = (C} 1 + 2C represented by _{ck) × f s / 2 ×} V 1 2 ... (1).

The maximum power consumption P _ob of the output buffer is P _ob = N _h × C _s × f _h × V, where C _s is the signal line capacitance, f _{h is the} horizontal drive frequency, and N _h is the number of horizontal pixels. _s represented by the ^2/2 ... (2). (2) Buffer circuit The buffer circuit is a part that receives an input digital signal, performs noise removal and waveform shaping, and supplies a stable signal to the signal line drive circuit. Therefore, consider it. Maximum power consumption P of buffer circuit
_b, when the input equivalent capacitance of the circuit to a clock f _s C _bc, the input equivalent capacitance of the circuit relating to image signals and _{C bp, P b = (2C} bc + C bp) × f s / 2 × V b 2 ... ( It is represented by 3). (3) Control signal generation circuit This is basically a gate array, and the internal frequency differs depending on the signal, but since the power consumption mainly related to the sampling clock f _{s of the} image is considered to be an important factor, The maximum power consumption P _ga of the entire gate array is P _ga = (2C _gac + C _gap ) × f _s , where C _gac is the equivalent internal capacitance of the circuit for the clock f _s and C _gap is the input equivalent capacitance of the circuit for the image signal. / 2 × V _ga ² (4) (4) Common drive circuit This is for driving the common capacitance C _c, and the maximum power consumption P _c of the common drive circuit is f _{C at the} common drive frequency (in the case of common inversion, f _c is Half of horizontal driving frequency f _h ), P _c = C _c × f _c × V _c ² (5) (5) Gate line drive circuit This is for driving the capacitance C _{g of the} gate line,
The maximum power consumption P _g of the gate line drive circuit is expressed by P _g = C _g × f _g × V _g ² (6), where f _g (normally the horizontal drive frequency f _h ) is the gate line drive frequency. To be done. (6) Power Consumption of Entire Circuit From the above, the power consumption P _{a11 of the} entire circuit is as follows: P _a11 = P ₁ + P _ob + P _b + P _ga + P _c + P _g = (C ₁ + 2C _ck ) × f _s / 2 × V _{1 ^{2 + N h × C s ×}} f h × V s 2/2 + (2C bc + C bp) × f s / 2 × V b 2 + (2C gac + C gap) × f s / 2 × V ga 2 + C c × f _c × V _c ² + C _g × f _h × V _g ² Here, if the common is a constant voltage and N _h × C _s >> C _g , then P _a11 = (C ₁ + 2C _ck + 2C _bc + C _bp + 2C _gac + C
_gap ) × f _s / 2 + V ² + N _h × C _s × f _h / 2 × V ² = P _a11 (C, f, V) (7), and the capacitance C and the driving frequency f (horizontal frequency and image clock There is a relationship between the frequency) and the voltage V.

The present invention reduces power consumption for driving the signal line expressed by the equation (2). That is, in the case of dot inversion, since the polarity of the signal voltage must be inverted for each line, f _h becomes larger than 15 kHz in the equation (2), and power consumption increases. So (2)
The power consumption is reduced by lowering V _s in the equation. Below, the effect is examined based on an Example. (Embodiment 1) FIG. 1 is a diagram showing a main configuration of a liquid crystal display device according to a first embodiment of the present invention. A plurality of signal lines driven by the signal line drivers 10 and 20 are arranged, and a plurality of scanning lines driven by the gate driver 40 are arranged in a direction orthogonal to these. A pixel electrode is arranged at each intersection of the signal line and the scanning line via a switching element (for example, TFT).

The structure up to this point is the same as that of a conventional general device, but in this embodiment, in addition to this, a semiconductor switch for short-circuiting adjacent signal lines is installed. That is, for every two adjacent signal lines, the semiconductor switch 5 connected between these signal lines is provided. The semiconductor switch 5 is, for example, a MOS transistor (TFT) formed of a polysilicon film.

The present embodiment is a signal line inversion driving method for driving adjacent signal lines with opposite polarities. That is, every other signal line is connected to different signal line drivers 10 and 20, and the signal line 1 (1-1, 1-2, ...) In a certain field.
Is driven by the positive polarity, and the signal line 2 (2-1, 2-2, ...)
Are driven with a negative polarity, the signal line 1 is driven with a negative polarity, and the signal line 2 is driven with a positive polarity in the next field.

The operation of the present apparatus thus configured will be described. First, driving of the signal lines 1 and 2 will be described as an example. A signal having a positive polarity is written in the signal line 1 and a signal having a negative polarity is written in the signal line 2, and the signal line capacitances C1 and C
It is assumed that the electric charges Q1 and Q2 are held in 2.

Usually, this charge is wastefully discarded when the next drive of the opposite polarity is performed, but in this embodiment, paying attention to the fact that the adjacent signal lines are signals of opposite polarities, Power consumption can be reduced by using the charge to cancel the adjacent charge.

That is, the semiconductor switch 5 is turned on and the adjacent signal lines 1 and 2 are short-circuited while the image signal is not input to the signal line. The potential V _sb of each signal line after being short-circuited is V _sb = (Q1 + Q2) / (C1 + C2), and for example, the common potential is 0 and the driving voltage is -5 to 5V.
When shaking up to: Q1 = -Q2 C1 = C2. That is, assuming that the adjacent signal lines have opposite polarities and signals of the same level are applied, V _sb = 0.

Therefore, since it is necessary to drive the signal line capacitance from -5V to 5V normally from an initial value of 0V, V _s in the equation (2) can be halved, and as a result, As the power consumption is 1 / when the power supply voltage is not changed
2, it can be reduced to a maximum of 1/4 when changed.
However, this is a case where the adjacent signal voltages have a strong correlation, and when there is no correlation, the effect is slightly diminished.

Further, when the definition becomes high and the signal line interval becomes narrow, it is desirable to form this switch in the panel. Therefore, it is suitable to form it in polysilicon which can be formed on a glass substrate. Furthermore, if the signal line driver itself is also made of polysilicon, the frame size of the panel module can be made smaller, which is even more effective. (Embodiment 2) FIG. 2 is a diagram showing a main configuration of a color liquid crystal display device according to a second embodiment of the present invention. Normally, in a color liquid crystal panel, RGB color filters are attached to each pixel, and adjacent pixels have different colors. FIG. 2 shows an example of a vertical stripe arrangement of RGB, and in this case, it is more effective to connect the same color filters having a strong correlation with a switch.

Therefore, in this embodiment, the signal lines for writing the same color signal are inverted and driven by adjacent ones, and RG
Between the signal lines for writing the same color signal of B, for example, between 1-1 and 1-2 (R), between 2-1 and 2-2 (G), 3-1 and 3-. The semiconductor switches 5 are inserted between (2) (2) (not shown). Even with such a configuration, the same effect as that of the first embodiment can be obtained.

The RGB array is not necessarily limited to the vertical stripes shown in FIG. 2, but can be applied to other arrays (delta array, G checkered RB array, etc.). (Embodiment 3) FIG. 3 is a diagram showing a configuration of a main part of a liquid crystal display device according to a third embodiment of the present invention. In this embodiment, each pixel is provided with two semiconductor switches 5, and the signal lines 1 and 2 are connected through the switches 5. One of the switches 5a is an n-channel MOS transistor, and the other 5b is a p-channel MOS transistor.

In such a configuration, each switch 5
In the characteristics of a and 5b, if the threshold value of the n-channel is Vthn and the maximum voltage of the image signal is Vmax, then Vthn ≧ Vmax, the threshold value Vthp of the p-channel and the minimum value V of the image
Let min be the condition that Vthp ≤ Vmin is satisfied. In this case,
As shown in, when a voltage Von that satisfies Vonn ≧ Vthn is applied, only the n-channel MOS transistor is turned on, and the image signal is written from the n-channel MOS transistor. Next, as shown in FIG. 4, by providing Voff between the positive polarity signal and the negative polarity signal, both the n-channel and p-channel MOS transistors can be turned off. Next, a voltage of Vonp≤Vthp is applied to turn on the p-channel MOS transistor, and a signal of opposite polarity is input to the pixel.

That is, in the structure of FIG. 3, when driven as shown in FIG. 4, a signal can be input from the right signal line 2 at one time and from the left signal line 1 in the next field. The line driver always needs to drive signals of the same polarity. Moreover, since the polarities of the signal lines around the pixels are always the same in terms of image quality, LCDs with low power consumption and high image quality do not have vertical crosstalk caused by normal signal line inversion or horizontal crosstalk due to common inversion. Can be realized.

The present invention is not limited to the above-described embodiments, and various modifications can be carried out without departing from the scope of the invention. For example, the pixel driving method is not limited to the one described in the embodiment, and can be applied to various driving methods as long as it is a method of driving the signal line in reverse.

[0029]

As described above in detail, according to the present invention, by providing the semiconductor switch between the adjacent signal lines that are driven to be inverted, the electric charge accumulated in the capacitance of the signal line which has been wasted up to now can be effectively used. , Or by providing a switch for switching the input to a positive polarity signal line and a negative polarity signal line for each pixel, a signal of the same polarity is always added to one signal line, resulting in a significant reduction in power consumption. be able to. Also, by making the switch with polysilicon, C
To reduce the connection pitch, which was a problem with OG and TAB,
By using a semiconductor fine process such as LSI,
Can be resolved.

Further, by using the p-channel and n-channel MOS transistors, it is possible to write codes of different polarities in the pixels even if the polarities of the signal lines are the same, so that the withstand voltage of the driver for driving the signal lines can be increased. It is possible to realize low cost and low power consumption. Furthermore, since the leak current in each pixel can be made equal in positive and negative polarities, crosstalk can be greatly reduced.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of a main part of a liquid crystal display device according to a first embodiment.

FIG. 2 is a diagram showing a main configuration of a liquid crystal display device according to a second embodiment.

FIG. 3 is a diagram showing a main configuration of a liquid crystal display device according to a third embodiment.

FIG. 4 is a diagram showing an outline of gate drive waveforms in a third embodiment.

[Explanation of symbols]

 1, 2, 3 ... Signal line 5 ... Semiconductor switch 10, 20 ... Signal line driver 40 ... Gate driver

Claims (1)

[Claims] 1. A plurality of signal lines for writing an image signal to pixel electrodes arranged in a matrix, a means for inverting and driving adjacent ones of these signal lines, and every two adjacent signal lines. And a semiconductor switch connected between the signal lines, the liquid crystal display device.