JPH07160545A - Performance measuring method for information processor - Google Patents

Abstract

PURPOSE:To decide the normal/defective condition of a device without being affected even when the time setting of a part to be measured per control clock tauis changed into any value excepting for a designed value. CONSTITUTION:Execution time P5 per instruction is measured by executing a specified instruction for which the number of control clocks required for processing the instruction is exactly discriminated, and time P6 per control clock cycle tau is calculated from the measured execution time. On the other hand, execution time per instruction is measured by executing an instruction to be measured, this execution time per instruction to be measured is converted to the number of control clocks per instruction to be measured by using the time P6 per control clock cycle, and this number of control clocks is compared with an expected value decided as the designed value so that the normal/ defective condition of the device can be decided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for measuring the performance of an information processing device. 2. Description of the Related Art In recent years, with the increase in performance, speed, and scale of computer systems, the configuration of logic circuits that realizes them has become extremely complicated.

In a device constructed by combining such logic circuits, there are a great many logic circuits that function in the process of processing an instruction, and whether or not each instruction operates with a control clock according to the logical design is determined by a control signal. It takes a lot of work to create a time chart for and visually inspect it.

Therefore, there is a need for a technique capable of verifying that the processing of each instruction operates according to the logic design with less labor.

[0004]

11 to 14 are views showing a conventional example. In FIGS. 11 to 14, 2 is a measuring unit, 3 is an instruction control mechanism (measured unit), 4 is a time mechanism, and 5 is a time mechanism. Is a loop counter,
Reference numeral 6 indicates a time storage register, and 7 indicates a memory.

§1: General Description of Prior Art Conventionally, in an information processing apparatus, generally, as a method for verifying that the processing of each instruction operates according to a logical design value, the instruction processing process is checked. At the same time, the method of measuring the performance was taken.

The above performance is measured by the number of executions of instructions (τ:
It is the cycle of the control clock. In this case, it refers to the number of control clocks required for execution.) And the number of arithmetic operations per unit time are measured and compared with the designed logical value to verify the logical design. And the normality of the device.

This performance measurement is performed by a program-like method, but the method is basically based on obtaining the elapsed time from the time when the instruction processing is started to the time when the instruction processing is ended.

Based on the measured elapsed time, the arithmetic processing performance per unit time or the number of instruction executions per unit time is converted and compared with a designed logical value.
It can be verified whether the processing of each instruction operates according to the logical design value. Hereinafter, an example of the performance measuring method of the information processing apparatus that has been conventionally performed will be specifically described.

§2: Description of Configuration of Information Processing Device--See FIG. 11 FIG. 11 is a configuration diagram of a conventional device. As shown in the figure, the information processing device (for example, CPU) includes a measurement unit 2, a command control mechanism (measurement target unit) 3, a time mechanism 4, a loop counter 5,
A time storage register 6, a memory 7, etc. are provided. Functions and the like of the above-mentioned respective parts are as follows.

The measuring unit 2 performs various measuring processes and the like (details will be described later). The instruction control mechanism 3 is a hardware (measurement target portion) to be measured, and is a mechanism for controlling the execution of instructions. Therefore, the instructions described below are executed under the control of this instruction control mechanism.

The time mechanism 4 is a mechanism (clock) for measuring time. : The loop counter 5 is a loop counter used for work during measurement.

The time storage register 6 is a register for storing time information (current time) at the time of measurement. : The memory 7 stores data such as design expected values and actual measurement result values measured by the measuring unit.

§3: Processing explanation with a flow chart
12 to 14, FIG. 12 is a conventional measurement processing flowchart 1, FIG. 13 is a conventional measurement processing flowchart 2, and FIG. 14 is a conventional measurement processing flowchart 3. The conventional measurement process will be described below with reference to FIGS.

The processing described below is the processing of the measuring unit 2. Further, S1 to S17 indicate processing steps. The method described below includes an execution time measurement loop that does not include the instruction under test (process A enclosed by a dotted line in the figure) and an execution time measurement loop that includes the instruction under measurement (a process enclosed by a dotted line in the figure). Based on the fact that the difference in the elapsed time of (B)) is the number of times of execution of the measured instruction, the execution time of the measured instruction is calculated, and the calculation performance value when the measured instruction is executed can be calculated. Looking for.

The symbols used in the following processing are defined as follows. P1: "initial value of time" at the start of the instruction loop that does not include the measured instruction. P2: Elapsed time after the specified number of times of P9 loop processing.

P3: "Initial value of time" at the start of the instruction loop including the instruction to be measured. P4: Elapsed time after the specified number of times of P9 loop processing. P8: Calculation processing performance of the measured instruction.

P9: Number of loops. (1): Description of Process A ... See FIG. 12 Process A is an addition instruction (instruction to add 1 to the loop counter)
Is executed a prescribed number of times and the elapsed time is measured. In this case, the execution time of the add instruction is very short. Therefore, since the measurement error occurs when the addition instruction is executed once, the addition instruction is executed plural times and the elapsed time (execution time) is measured as described above.

In this process, first, the measuring unit 2 reads the current time from the time mechanism 4 and saves the current time in the time storage register 6 as the initial value P1 of the time (S).
1). Then, the value of the loop counter 5 is set to 0 (clear) (S2).

Next, 1 is added to the loop counter 5 (S3). That is, the add instruction for incrementing by 1 is executed.
The value of the loop counter 5 is set to the specified number P
Repeat until 9 is reached (S4). In this way, the process of "adding 1 to the loop counter 5" is executed the specified number of times P9.

After that, when the value of the loop counter 5 reaches the specified number P9, the measuring unit 2 reads the current time from the time mechanism 4, and the current time and the initial time saved in the time storage register 6 are initialized. From the difference with the value P1, the elapsed time P
2 is obtained and the value is saved in the memory 7 (S5).

By the above processing, the elapsed time P2 when the addition instruction (instruction to add 1 to the loop counter) is executed a prescribed number of times is obtained. (2): Description of Process B ... See FIG. 13 Process B is a process of executing the command to be measured and the same addition command as the process A a specified number of times and measuring the elapsed time.

Subsequent to the processing of S5, the measuring unit 2 reads the current time from the time mechanism 4 and saves the current time in the time storage register 6 as the initial value P3 of the time (S6). Then, the value of the loop counter 5 is set to 0 (clear) (S7).

Next, the command to be measured is executed (command control mechanism 3
(Executed under the control of) (S8). Then, 1 is added to the loop counter 5 (S9). This process is repeated until the value of the loop counter 5 reaches the specified number P9 (S10).

After that, when the value of the loop counter 5 reaches the specified number P9, the measuring section 2 reads the current time of the time mechanism 4, and the current value of the time and the time saved in the time storage register 6. The elapsed time P4 is calculated from the difference from the initial value P3 of S1 and is saved in the memory 7 (S1).
1).

By the above processing, the execution time P4 when the measured instruction and the addition instruction (instruction to add +1 to the loop counter) are executed a prescribed number of times is obtained. (3): Post-processing ... See FIG. 14 In the post-processing, the arithmetic processing performance of the command to be measured is obtained based on the data measured in the processing A and the processing B, and evaluated by comparing with the design expected value. Processing.

Following the processing of S11, the measuring unit 2 reads the elapsed times P4 and P2 stored in the memory 7.
Then, the difference (P4-P2) is used as the loop counter 5
Is divided by the prescribed number of times P9, and the value is obtained as the execution time P5 per instruction for the instruction to be measured and saved in the memory 7.

That is, in the measuring section 2, P5 = (P4−
P2) / P9 is calculated to obtain the value of P5, and this value is saved in the memory 7 (S12). Further, the number of operations processed by one instruction is specified by the instruction, and from the number of operations of the command to be measured (the number of operations of the instruction for which P5 is obtained), the operation processing of a unit time (for example, 1 second) The performance P8 is calculated (S13).

After the processing of S13 is completed, the measuring section 2 reads the design expected value stored in advance in the memory 7 and compares it with the calculated processing performance P8. Then, it is determined whether the arithmetic processing performance P8 is equal to the design expected value (S1).
4). As a result, if it is not the design expected value, an error notification is given (S15).

Further, in the processing of S14, the arithmetic processing performance P8
However, when it is determined that the design expected value is met, the measurement data including the arithmetic processing performance P8 is stored in the memory 7. After that, the measuring unit 2 determines whether or not the measurement target instruction has completed the measurement (S16), and when the measurement is complete, terminates the process. However, if all the processing is not completed, the measuring unit 2 changes the measured instruction (changes the measured instruction used in S8 to another instruction) (S17), and returns to the processing of S6. Process.

[0030]

SUMMARY OF THE INVENTION The above-mentioned conventional device has the following problems. In the above conventional method, based on the measured elapsed time, it is converted as the arithmetic processing performance per unit time or the number of executed instructions per unit time, and it is verified whether the processing of each instruction is operating according to the logical design. is doing.

Therefore, in the pass / fail judgment at the time of verification,
The control clock period (τ) used to calculate the design value that is the reference for comparison, and the control clock period (τ) during actual measurement
It is an absolute requirement that and have the same value.

However, under actual device test conditions, the control clock is designed to have a reference value by testing the margin of the logic circuit with respect to the control clock period (τ) or by other requirements (performance improvement, etc.). Often not.

When a performance test is carried out by the conventional method under such a test environment, the comparison between the logical design value and the actual measured value results in a mismatch, resulting in a "device abnormality" as a verification result.

The present invention solves such a conventional problem, and even when the time setting per control clock 1τ of the instruction control mechanism (measured part) is changed to a value other than the design value,
An object of the present invention is to make it possible to determine the quality of the device without being affected by the influence.

[0035]

FIG. 1 is a diagram for explaining the principle of the present invention. In FIG. 1, the same parts as those in FIGS. 11 to 14 are designated by the same reference numerals. Further, 2 is a measuring unit, 3 is an instruction control mechanism (measured unit), 4 is a time mechanism, and 8 is a data storage unit.

In order to solve the above problems, the present invention has the following configuration. : In the method of measuring the performance of an information processing device, in which the processing performance of each command of the information processing device is measured and the quality of the device is judged from the result, the number of control clocks required to process the instruction is accurately determined. The specified instruction is executed, the execution time per instruction (P5) is measured, and the time per control clock cycle (τ) of the device (P6) is determined from the measured execution time (P5). A method for evaluating the performance of an information processing apparatus, which compares the time per control clock cycle (P6) with an expected value set as a design value to judge the quality of the apparatus.

In the configuration, the measured instruction is executed and the execution time per instruction (P15) is measured,
Execution time per instruction of this measured instruction (P15)
Is converted into the number of control clocks per instruction (P17) of the instruction to be measured using the time (P6) per control clock cycle (τ) actually measured by the execution of the specific instruction,
A method for evaluating the performance of an information processing apparatus, wherein the control clock number (P17) is compared with an expected value determined as a design value to determine the quality of the apparatus.

In the configuration, the ratio between the time (P6) per control clock cycle (τ) actually measured by the execution of the specific instruction and the expected time per control clock cycle defined as the design value is obtained. Correction coefficient (P21)
The execution time per instruction (P15) of the measured instruction to be measured is converted into a design value by the correction coefficient (P21) to obtain a corrected design value (P22). Information processing for determining the quality of the device by obtaining the arithmetic processing performance (P23) by the corrected design value of the unit time from the number of operations processed in the time and comparing this value with the expected value set as the design value. Equipment performance evaluation method.

[0039]

The operation of the present invention based on the above construction will be described with reference to FIG. When the measurement unit 2 performs the measurement, the command control mechanism (measured unit) 3 executes the command, reads the time information from the time mechanism 4, and uses the design expected value stored in the data storage unit 8. Then, processing such as measurement, calculation, and quality judgment is performed.

First, as in the above configuration, a specific instruction whose number of control clocks required to process the instruction is known exactly is executed, and the execution time per instruction (P5) is measured. Then, from the measured execution time (P5), the time (P) per control clock cycle (τ) of the device
6) is obtained and the quality of the device is determined.

In the method of the above construction, the time (P) per control clock cycle (τ) of the actually measured device is
6) is used for processing. Therefore, even if the time setting per control clock 1τ of the instruction control mechanism (measured part) 3 is changed to a value other than the design value, it is possible to determine the quality of the device without being affected by the change.

Further, as in the above configuration, the control clock 1τ of the instruction control mechanism (measured part) 3 is obtained by obtaining the arithmetic processing performance (P23) based on the corrected design value of the unit time.
Even if the hit time setting is changed to a value other than the design value, the correction can be performed, so that the quality of the device can be determined without any influence.

[0043]

Embodiments of the present invention will be described below with reference to the drawings. (Description of Embodiment 1) FIGS. 2 to 8 are views showing an embodiment of the present invention. In FIGS. 2 to 8, the same components as those in FIGS. 1 and 11 to 14 are designated by the same reference numerals. There is. Further, 9 is a calculation register, 10 is a design expected value storage file, and 11 is an actual measurement result value storage file.

§1: Description of the configuration of the information processing device--see FIG. 2 FIG. 2 is a device configuration diagram of the first embodiment. Hereinafter, the configuration of the information processing apparatus used in the first embodiment will be described with reference to FIG.

As shown in the figure, the information processing apparatus includes a measuring unit 2, an instruction control mechanism (measured unit) 3, a time mechanism 4, a loop counter 5, a time storing register 6, an arithmetic register 9,
A design expected value storage file 10, an actual measurement result value storage file 11 and the like are provided. Functions and the like of the above-mentioned respective parts are as follows.

The measuring unit 2 is a unit (implemented by a measuring program or the like) that performs various measuring processes (details will be described later). The instruction control mechanism 3 is a hardware (measurement target portion) to be measured, and is a mechanism for controlling the execution of instructions. Therefore, the instructions described below are executed under the control of this instruction control mechanism.

The time mechanism 4 is a mechanism (clock) for measuring time. : The loop counter 5 is a counter used for work at the time of measurement, for example, a register used as a loop counter.

The time storage register 6 is a register for temporarily storing time information (current time) at the time of measurement. : The calculation register 9 is used to calculate the measurement result.
It is a work register that stores various data.

The design expected value storage file 10 stores data such as design expected values (for example, a semiconductor memory). The data such as the expected design value is, for example,
It is stored in a storage medium such as a magnetic disk, a magnetic tape, or a flexible disk, and at the time of measurement, necessary data is read from the storage medium to store a design expected value storage file 1
Store in 0.

The actual measurement result value storage file 11 is a file (a storage medium such as a semiconductor memory) for storing the data of the actual measurement result of the measuring unit 2. §2: Explanation of "time of control clock 1τ" measurement process
-Refer to FIG. 3 FIG. 3 is a processing flowchart for measuring the “time of the control clock 1τ” of the first embodiment. Hereinafter, based on FIG.
The “time of control clock 1τ” measurement process will be described. Note that S21 to S33 represent processing steps.

This process is a process for measuring the time per control clock 1τ from the execution time of a specific instruction whose execution τ number n (τ: control clock cycle) is clear by the same method as the conventional example.

In this case, the measured "time P6 per control clock 1τ" is the set value at the time of measurement of the instruction control mechanism 3 which is the hardware to be measured and is a known value. In this example, the known value is the expected value.

As an instruction whose execution τ number is clear, for example, a no-operation instruction (NOP: NO-OPERATIO)
N), etc., always use an instruction that is completed with a constant number of τ without being affected by the internal state of the processor.

Further, the number of loops when measuring the execution time per instruction is several thousand to tens of thousands of loops depending on the accuracy of the time mechanism used for measurement and the execution time of one instruction. Further, the symbols used in the following processing are defined as follows.

P1: "initial time value" at the start of an instruction loop that does not include the measured instruction. P2: Elapsed time after the specified number of times P9 loop. P3: “Initial time value” at the start of the instruction loop including the measured instruction.

P4: Elapsed time after the specified number of times P9 loop. P5: Execution time per instruction of an instruction whose execution τ number is clear. P6: Time per measured control clock 1τ.

P9: Number of loops. (1): Description of Process A1 Process A1 is a process of executing an addition instruction (instruction to increment the loop counter by +1) a prescribed number of times P9 and measuring the elapsed time P2. In this case, the execution time of the add instruction is very short. Therefore, since the measurement error occurs when the addition instruction is executed once, the addition instruction is executed plural times and the elapsed time (execution time) is measured as described above.

In this process, first, the measuring unit 2 reads the current time from the time mechanism 4 and saves the current time in the time storage register 6 as the initial value P1 of the time (S).
21). Then, the value of the loop counter 5 is set to 0 (clear) (S22).

Next, 1 is added to the loop counter 5 (S23). Then, this process is repeated until the value of the loop counter 5 reaches the specified number P9 (S2).
4). That is, "add 1 to the loop counter 5".
The process is repeatedly executed the specified number of times P9.

After that, when the value of the loop counter 5 reaches the specified number P9, the measuring unit 2 reads the current time from the time mechanism 4, and the current time and the initial time of the time saved in the time storage register 6 are set. From the difference with the value P1, the elapsed time P
2 is obtained, and the value is saved in the measurement result value storage file 11 (S25).

By the above processing, the elapsed time P2 when the addition instruction (the instruction to increment the loop counter by +1) is executed the specified number of times P9 is obtained. (2): Description of Process B1 Process B1 includes an instruction whose execution τ number n is clear and the process A1.
This is a process of executing the same addition instruction as for the specified number of times P9 and measuring the elapsed time P4.

Subsequent to the processing of S25, the measuring unit 2 reads the current time from the time mechanism 4, and saves the current time in the time storage register 6 as the initial value P3 of the time (S26). Then, the value of the loop counter 5 is set to 0 (clear) (S27).

Next, an instruction whose execution τ number n is clear is executed (executed under the control of the instruction control mechanism 3) (always nτ) (S
28). Then, 1 is added to the loop counter 5 (S
29). This process is repeated until the value of the loop counter 5 reaches the specified number P9 (S30).

After that, when the value of the loop counter 5 reaches the specified number P9, the measuring unit 2 reads the current time of the time mechanism 4, and the current value at that time and the time saved in the time storage register 6. The elapsed time P4 is calculated from the difference from the initial value P3 of (calculated using the calculation register 9),
The value is saved in the measurement result value storage file 11 (S
31).

By the above processing, the elapsed time P4 when the instruction whose execution τ number n is clear and the addition instruction (instruction for incrementing the loop counter by +1) are executed the specified number of times P9 is obtained. (3): Post-processing The post-processing is processing for measuring the time P6 per 1τ of the control clock based on the data measured in the processing A1 and the processing B1.

Subsequent to the processing of S31, the measuring section 2 stores the elapsed time P4 stored in the actual measurement result value storage file 11.
And P2 are read. And the difference (P4-P2)
Is divided by the specified number P9 of the loop counter 5, and the value is obtained as “execution time P5 per instruction” of the instruction whose execution τ number n is clear, and saved in the actual measurement result value storage file 11 (S32).

That is, in the measuring section 2, P5 = (P4−
P2) ÷ P9 is calculated to obtain the value of P5, and this value is saved in the measurement result value storage file 11. Further, a value obtained by dividing the value of P5 by n (P5 ÷ n) is calculated as the time P6 per 1τ of the control clock (P6 = P5 ÷
n), this value P6 is saved in the measurement result value storage file 11 (S33). By the above processing, the time P6 per 1τ of the control clock is obtained.

§3: Description of processing for obtaining “τ number of measured instruction” ... See FIGS. 4 to 6. FIG. 4 is a flowchart of processing for obtaining “τ number of measured instruction” of the first embodiment. 5 is “τ of the command to be measured” of the first embodiment.
FIG. 6 is a processing flowchart 2 for obtaining the “number”, and FIG.

The process of obtaining the "τ number of the command to be measured" will be described below with reference to FIGS. Note that S41 to S
55 indicates a processing step. The symbols used in the following processing are defined as follows.

P15: Execution time per instruction of measured instruction P17: Number of τ per instruction of measured instruction (1): Description of processing A2 ... See FIG. 4. Processing A2 is addition instruction (loop counter). This is a process in which an instruction (+1) is executed a prescribed number of times P9 and the elapsed time P2 is measured.

In this process, first, the measuring unit 2 reads the current time from the time mechanism 4 and saves the current time in the time storage register 6 as the initial value P1 of the time (S).
41). Then, the value of the loop counter 5 is set to 0 (clear) (S42).

Next, 1 is added to the loop counter 5 (S43). Then, this process is repeated until the value of the loop counter 5 reaches the specified number P9 (S4).
4). That is, "add 1 to the loop counter 5".
The process is repeatedly executed the specified number of times P9.

After that, when the value of the loop counter 5 reaches the specified number P9, the measuring unit 2 reads the current time from the time mechanism 4, and the current time and the initial time of the time saved in the time storage register 6 are read. From the difference with the value P1, the elapsed time P
2 is obtained and the value is saved in the measurement result value storage file 11 (S45).

By the above processing, the elapsed time P2 when the addition instruction (the instruction to increment the loop counter by +1) is executed the specified number of times P9 is obtained. (2): Description of the process B2 ... See FIG. 5 The process B2 is a process of executing the instruction to be measured and the same addition instruction as the above-described step A2 for a specified number of times P9 and measuring the elapsed time P4.

Subsequent to the processing of S45, the measuring unit 2 reads the current time from the time mechanism 4 and saves the current time in the time storage register 6 as the initial value P3 of the time (S46). Then, the value of the loop counter 5 is set to 0 (clear) (S47).

Next, the instruction to be measured (instruction different from the specific instruction) is executed (executed under the control of the instruction control mechanism 3).
Yes (S48). Then, 1 is added to the loop counter 5 (S49). This process is repeated until the value of the loop counter 5 reaches the specified number P9 (S5).
0).

After that, when the value of the loop counter 5 reaches the specified number P9, the measuring unit 2 reads the current time of the time mechanism 4, and the current value at that time and the time saved in the time storage register 6. The elapsed time P4 is calculated from the difference from the initial value P3 of (calculated using the calculation register 9),
The value is saved in the measurement result value storage file 11 (S
51).

By the above processing, the execution time P4 when the measured instruction and the addition instruction (instruction to increment the loop counter by +1) are executed the specified number of times P9 is obtained. (3): Post-processing ... See FIG. 6. The post-processing is processing for measuring the “τ number of measured instruction” based on the data measured in the processing A2 and the processing B2.

Subsequent to the processing of S51, the measuring unit 2 sets the elapsed time P4 stored in the measured result value storage file 11 to P4.
And P2 are read. And the difference (P4-P2)
Is divided by the specified number of times P9 of the loop counter 5, and the value is obtained as “execution time per instruction P15” of the instruction to be measured (the measuring unit 2 calculates using the calculation register 9) and measured. The result value storage file 11 is saved (S52).

That is, in the measuring section 2, P15 = (P4
-P2) / P9 is calculated to obtain the value of P15, and this value is saved in the actual measurement result value storage file 11. Also,
Value obtained by dividing the value of P15 by the value of P6 (P15 ÷ P6)
Is calculated by calculation as “number of τ per instruction of measured instruction” P17 (P17 = P15 ÷ P6), and this value P17 is saved in the actual measurement result value storage file 11 (S53).

After the processing of S53, the measuring section 2 determines whether or not all the measured instructions have been completed (S54). As a result, if all are not completed, the command to be measured is changed (S55) and the process from S46 is repeated.

If it is determined in the process of S54 that all the measured instructions have been completed, the process ends. With the above processing, the “τ number of measured instruction” can be measured.

§4: Description of Process for Obtaining "Calculation Performance of Command Under Test"-See FIG. 7 FIG. 7 is a flowchart of a process for determining "calculation performance of command under test" of the first embodiment. Hereinafter, the process of obtaining the arithmetic performance of the measured instruction will be described with reference to FIG. Note that S6
1 to S65 indicate processing steps. Further, the symbols used in the following processing are defined as follows.

P21: A ratio (design value / actually measured value P6) between the design value of the time per τ of the control clock and the actually measured value P6 (see FIG. 3). The value of P21 is defined as a "correction coefficient".

P22: The time of one instruction is set to the correction coefficient P21.
Is a value (corrected design value) converted by the design value. P23: A value obtained by converting the calculation performance per unit time into a design value.

The measuring section 2 firstly reads the design value of the time 1τ read from the design expected value storage file 10 and the measured value P.
A ratio of 6 (design value / actually measured value P6) is calculated and obtained, and this value is set as a "correction coefficient" (S61).

Then, the actually measured execution time P15 of the instruction to be measured is multiplied by the correction coefficient P21 (P15 × P21) to convert the actually measured value into a design value to obtain a corrected design value P22 ( S62).

After that, since the number of operations processed by one instruction is specified by the instruction, the unit time (for example, 1 second) is calculated from the number of operations processed within the time of the corrected design value P22.
The calculation processing performance P23 is calculated based on the corrected design value of (S
63). The calculated data and the like are stored in the measurement result value storage file 11.

Subsequently, the measuring section 2 determines whether or not all the measured instructions have been completed (S64). If not, the measured instruction is changed (S65), and the process of S62 is executed. Repeat.

When it is determined in the process of S64 that all the measured instructions have been completed, the process is completed.
Through the above processing, the “arithmetic performance of the command under measurement” can be obtained.

As described above, by obtaining the corrected design value, even if the time setting per control clock 1τ is changed to a value other than the design value, the changed value is corrected by the above processing. , It is not affected. Therefore,
If the hardware operates according to the design value, it always matches the design expected value.

§5: Description of "Pass / Fail Judgment" Processing ... FIG.
Reference FIG. 8 is a flowchart of the “good / bad determination” processing according to the first embodiment. Hereinafter, the “good / bad determination” processing will be described with reference to FIG. Note that S71 to S79 represent processing steps.

In this process, first, the measuring unit 2 measures "time P6 per control clock 1τ" (see the process in FIG. 3) (S71) and reads the design expected value from the design expected value storage file 10. .

Then, the "time P6 per control clock 1τ" measured in the process of S71 is compared with the design expected value, and the "time P per control clock 1τ" is compared.
It is determined whether "6" matches the design expected value (S7).
2).

In this determination, it is not determined whether the two completely match, but a certain error is considered and it is determined whether they match within the allowable range. as a result,
If it is determined that it is different from the design expected value, an error notification is given (S73).

If the measured "time P6 per control clock 1τ" in the process of S72 matches the design expected value, the τ number P17 of the instruction is measured (see the processes of FIGS. 4 to 6). Yes (S74).

Then, the measuring section 2 determines whether or not the instruction τ number P17 matches the design expected value after the processing of the above S74 (this determination is also made within a certain allowable range, similarly to the above). (Yes) (S75). As a result, if it does not match the design expected value, an error notification is given (S76).

In the process of S75, the instruction τ number P1
When it is determined that 7 matches the expected value, the arithmetic processing performance P23 is measured (see the processing of FIG. 7) (S77). Subsequently, after the processing of S77 is completed, the measuring unit 2 determines whether the τ number P17 of the instruction matches the design expected value (S7).
8). As a result, if it is determined that the design expected value does not match, an error notification is given (S79).

If it is determined in step S78 that the value matches the design expected value, the process ends. As described above, the “good / bad determination” is performed. (Explanation of Second Embodiment) FIGS. 9 and 10 are views showing a second embodiment. The second embodiment will be described below with reference to FIGS. 9 and 10.

The second embodiment described below is the same as the first embodiment.
This is an example in which the "execute measurement instruction in a loop" portion that was performed in the processing of is changed. Instead, in the second embodiment, as many measurement instructions as the number corresponding to the measurement accuracy (thousands to tens of thousands instructions depending on the measurement accuracy of the time mechanism) are expanded and prepared.

The difference between the numbers of execution instructions is the processing for obtaining the execution time of one instruction based on the logic that the difference is the execution time of the difference. The details will be described below. §1: Description of processing for obtaining “time of control clock 1τ” ... See FIG. 9. FIG. 9 is a flowchart of processing for obtaining “time of control clock 1τ” of the second embodiment. Hereinafter, based on FIG.
The process of obtaining the “time of the control clock 1τ” will be described.
Note that S81 to S88 represent processing steps.

First, the measuring section 2 reads the current time from the time mechanism 4 and stores this current time in the time storage register 6 as an initial value P1 of the time (S81). Subsequently, the prepared x specific instruction having a clear execution τ number is executed (always nτ) (S82).

After that, in the measuring section 2, the elapsed time P is calculated from the difference between the current value of the time read from the time mechanism 4 and the initial value P1 of the time stored in the time storage register 6.
2 is obtained and saved in the measurement result value storage file 11 (S83).

Next, the measuring section 2 reads the current time from the time mechanism 4 and saves the current time in the time storage register 6 as the initial value P3 of the time (S84). Then, prepared x + y "commands with a clear execution τ number n"
Is executed (always nτ) (S85).

Next, in the measuring section 2, the elapsed time P4 is obtained from the difference between the current value of the time read from the time mechanism 4 and the saved initial value P3 of the time, and this value is measured. The data is saved in the value storage file 11 (S86).

Then, the difference between P4 and P2 is the difference in the number of instructions y
A value obtained by dividing by is obtained, and this value is saved in the actual measurement result value storage file 11 as "time P5 per instruction" of the instruction whose execution τ number n is clear (S87).

Finally, the value of P5 is divided by n to obtain a value,
This value is set as “time P6 per 1τ of the control clock”, and this value is saved in the measurement result value storage file 11 (S88). Through the above processing, "1 of control clock
The time P6 per τ is calculated.

§2: Description of Process for Obtaining “Tau Number of Measured Command” —See FIG. 10. FIG. 10 is a process flowchart for determining “τ number of measured command” in the second embodiment. The process of obtaining the “τ number of measured instruction” will be described below with reference to FIG. Note that S9
1 to S100 indicate processing steps.

The measuring section 2 saves the initial value P1 of the time (S91). Then, the prepared x measured instructions are executed (S92). Next, the elapsed time P2 is calculated from the difference between the current value of time and the saved initial value P1 of time.
And save it in the measurement result value storage file 11 (S
93).

After that, the measuring section 2 saves the initial value P3 of the time (S94). Then, the prepared x + y measured instructions are executed (S95). After that, time of day 4
The elapsed time P4 is obtained from the difference between the current value of the time read from the table and the saved initial value P3 of the time, and this value is saved in the actual measurement result value storage file 11 (S9).
6).

After the processing of S96, the measuring unit 2
The value obtained by dividing the difference between P4 and P2 by the difference y in the number of instructions is
It is determined as "time per instruction P15" of the command to be measured, and this value is saved in the measurement result value storage file 11 (S97).

After the processing of S97 is completed, the measuring unit 2
A value obtained by dividing the value of 15 by P6 is obtained as the "number of τ per instruction of the measured instruction", and this value is saved in the actual measurement result value storage file 11 (S98).

Thereafter, the measuring section 2 determines whether or not all the measured instructions have been completed (S99). If it is determined that all the measured instructions have not been completed, the measured instructions are changed. (S100), the process from S94 is repeated. If it is determined in step S99 that all the measured instructions have been processed, the process ends.

[0114]

As described above, the present invention has the following effects. : The time (P6) per control clock 1τ of the instruction control mechanism, which is the hardware to be measured, is accurately measured, and the quality of the device is determined using this measured value.

Therefore, even if the time setting per control clock 1τ of the instruction control mechanism (measured part) is changed to a value other than the design value, the quality of the device can be judged without being affected by the change.

Therefore, as in the conventional case, the logical design value and
There is no chance of a mismatch in the comparison with the actual measurement value, resulting in a "device abnormality" as a verification result. : Calculation processing performance based on corrected design value of unit time (P2
By determining 3), the command control mechanism (measured part) 3
Even when the time setting per control clock 1τ is changed to a value other than the design value, the correction can be performed, so that the quality of the device can be determined without any influence.

[Brief description of drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is a device configuration diagram of a first embodiment.

FIG. 3 is a processing flowchart for measuring “time of control clock 1τ” according to the first embodiment.

FIG. 4 is a processing flowchart 1 for obtaining a “τ number of measured instruction” according to the first embodiment.

FIG. 5 is a processing flowchart 2 for obtaining “τ number of measured instruction” according to the first embodiment.

FIG. 6 is a processing flowchart 3 for obtaining a “τ number of measured instruction” according to the first embodiment.

FIG. 7 is a processing flowchart for obtaining “arithmetic performance of measured instruction” in the first embodiment.

FIG. 8 is a flowchart of a “good / bad determination” process according to the first embodiment.

FIG. 9 is a processing flowchart for obtaining “time of control clock 1τ” according to the second embodiment.

FIG. 10 is a processing flowchart for obtaining a “τ number of measured instruction” according to the second embodiment.

FIG. 11 is a configuration diagram of a conventional device.

FIG. 12 is a flowchart 1 of a conventional measurement process.

FIG. 13 is a flowchart 2 of a conventional measurement process.

FIG. 14 is a flowchart 3 of a conventional measurement process.

[Explanation of symbols]

 2 measuring unit 3 command control mechanism (measured unit) 4 time mechanism 8 data storage unit

Claims (3)

[Claims] 1. A method for measuring performance of an information processing apparatus, which measures processing performance of an instruction of an information processing apparatus and judges whether the apparatus is good or bad from the result, wherein the number of control clocks required for processing the instruction is By executing a specific instruction that is known accurately, the execution time per instruction (P5) is measured, and from the measured execution time (P5), the time per control clock cycle (τ) of the device ( P6) is obtained, and the time per control clock cycle (P6) is compared with an expected value determined as a design value to determine the quality of the device, and a performance evaluation method for the information processing device. 2. The performance evaluation method for an information processing apparatus according to claim 1, wherein the instruction to be measured is executed, the execution time per instruction (P15) is measured, and the instruction per instruction to be measured is Execution time (P15)
Is converted into the number of control clocks per instruction (P17) of the instruction to be measured using the time (P6) per control clock cycle (τ) actually measured by the execution of the specific instruction. P17) is compared with an expected value set as a design value to judge the quality of the device, and a performance evaluation method for the information processing device. 3. The performance evaluation method for an information processing apparatus according to claim 2, wherein a time (P6) per control clock cycle (τ) actually measured by the execution of the specific instruction and a value determined as a design value are set.
The ratio of the time per control clock cycle to the expected value is obtained and defined as a correction coefficient (P21), and the execution time per instruction (P21) of the actually measured instruction is measured.
15) is converted into a design value by the correction coefficient (P21) to obtain a corrected design value (P22), and the calculation based on the corrected design value per unit time is calculated from the number of calculations processed within the time of the corrected design value (P22). Processing performance (P2
3) The method for evaluating the performance of an information processing apparatus, characterized in that the quality of the apparatus is determined by obtaining this value and comparing this value with an expected value determined as a design value.