JPH0690270A - Digital line terminating device - Google Patents

Abstract

PURPOSE:To realize mutual extension between plural lines of a Y interface system and I interface lines by performing ALM conversion in an alarm processing part to input the output of the alarm detecting part of the I interface system and that of each line of the interface system to an alarm inserting part to each line of the Y interface system and that of the I interface system respectively. CONSTITUTION:An alarm detecting part 2 of the I interface system discriminates between the alarm of the I interface system and data through a line 22, and the alarm of the I interface system is transferred to an alarm processing part 60 through a line 23. ALM conversion (degeneracy/pseudo transfer) is performed in the alarm processing part 60. An alarm inserting part 6 of one of respective lines of the Y interface system receives the alarm of this line from the alarm processing part 60 through a line 28 and inserts it to data. The output of an alarm detecting part 12 of one of respective lines of the Y interface system is inputted to an alarm inserting part 19 of the I interface system in the same manner.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital line terminal device.

[0002]

2. Description of the Related Art Conventionally, two types of interfaces, known as a Y interface and an I interface, are known as interfaces in a digital line terminating device, and have no alarm processing unit (a part for performing ALM conversion (degeneration / pseudo transfer)). Therefore, it is not possible to multiplex the signals of a plurality of lines of the Y interface system and connect them to the I interface system line, and to divide the signals of the I interface system and connect them to the plurality of Y interface system lines. It was

[0003]

The above-mentioned conventional digital line terminating device has a problem that a plurality of lines of the Y interface system and one line of the I interface system cannot be connected to each other (mutual data communication).

The present invention has been made in view of the above-mentioned conventional circumstances, and therefore an object of the present invention is to provide a novel digital line terminating device capable of solving the above-mentioned problems inherent in the prior art. To do.

[0005]

To achieve the above object, a digital line terminating device according to the present invention comprises an I interface system frame synchronization unit, an I interface system frame pattern insertion unit, an I interface system alarm detection unit, and an I interface system alarm detection unit. Interface system alarm insertion section, clock transfer section from I interface system clock to in-apparatus clock, clock transfer section from in-apparatus clock to I interface system clock, and data division for dividing I interface system data into each line of Y interface system Section and a data multiplexing unit for multiplexing each line data of the Y interface system to the I interface system line, and a Y interface system alarm detection unit in a certain one of the Y interface system lines
Interface system alarm insertion section, clock transfer section from internal clock to Y interface clock, clock transfer section from Y interface clock to internal clock, Y interface frame synchronization section, and Y
Similarly to the interface frame pattern insertion section, the Y interface system alarm detection section, the Y interface system alarm insertion section, and the clock transfer section from the internal clock to the Y interface system clock of the other one line in each Y interface system line. And a Y interface system frame synchronization unit and a Y interface system frame pattern insertion unit, and an alarm processing unit that outputs the I interface system alarm detection unit and the Y interface system. It is characterized in that ALM conversion (degeneration / pseudo-transfer) is performed in which the output of the alarm detection unit of each line is input to the alarm insertion unit for each Y interface system line and the I interface system alarm insertion unit.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail with reference to the accompanying drawings with reference to the accompanying drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention.

Referring to FIG. 1, the frame synchronization unit 1 is I
Frame synchronization of the input data from the interface side line via the line 21 is performed, the I interface type alarm detection unit 2 separates the I interface type alarm from the data via the line 22, and the I interface type alarm is the line 23.
The data is transferred to the alarm processing unit 60 via the
Is transferred to the in-apparatus clock transfer section 3 via the I / O system, and the phase is changed from the clock extracted from the I interface data to the in-apparatus clock.

The data division unit 4 divides the data into one line in each line of the Y interface system via the line 25, and the clock transfer unit 5 of one line in each line of the Y interface system forms the line 26. The phase is changed from the internal clock to the clock of one of the lines of the Y interface system via the.

One alarm insertion unit 6 in each line of the Y interface system transfers the data of one line in each line via the line 27 and one data in each line in the Y interface system via the line 28. The alarm of the line is transferred from the alarm processing unit 60 and the data is present in each line of the Y interface system 1
The alarms of one line are included, and the frame pattern insertion unit 7 of one line in each Y interface system frame pattern sets the frame pattern to the data of one line in each Y interface system line via the line 29. It is inserted, and data and a Y interface system alarm are sent to one of the Y interface system lines via the line 30.

Similarly, the clock transfer unit 8 of the other one of the Y interface system lines is connected to the line 31.
The internal clock is changed to the clock of one other line in the Y interface system via the line, and the other one alarm insertion unit 9 in each line of the Y interface system is connected to each line via the line 32. Data of the other one line of the Y interface system is transferred to the data of the other one line of the Y interface system via the line 33 from the alarm processing unit 60. Incorporate the alarm of one line of.

The frame pattern inserting section 10 for inserting the Y interface system frame pattern into the other one line in each line, the frame pattern to the data of the other one line in each Y interface system line via the line 34. , And sends data and a Y interface system alarm to the other one of the Y interface system lines via the line 35.

The synchronizing unit 11 of one line of each Y interface frame line synchronizes the frame of the input data from one line of each Y interface system line via the line 41, and performs the synchronization of each line of the Y interface system. There is one
The alarm detection unit 12 of one line performs the alarm and data classification of one line in each line of the Y interface system via the line 42.

The alarm of one of the lines of the Y interface system is transferred to the alarm processing unit 60 via the line 43, and the data is transferred to the internal clock transfer unit 13 where the data is transferred via the line 44. Phase change is performed from the clock extracted from the data of one of the Y interface system lines to the in-device clock.

Similarly, the synchronization unit 14 of the other line in each line of the Y interface system allows the line 46 from the other line in each line of the Y interface system.
The frame of the input data is synchronized via the alarm detection unit 1 of the other line in each line of the Y interface system.
5, the alarm and data of one of the other lines of the Y interface system are divided through the line 47.

Other 1 in each line of the Y interface system
The alarms of one line are transferred to the alarm processing unit 60 via the line 48, and the data are transferred to the clock transfer unit 16 to the internal clock via the line 49. Here, the other 1 in each line of the Y interface system is transferred. The phase is changed from the clock extracted from the data of one line to the internal clock.

The data multiplexing unit 17 multiplexes the data of each line via the lines 41 and 50, and the I interface clock transfer unit 18 changes the internal clock to the I interface clock via the line 51. Change the phase of.

The I interface alarm inserting section 19 transfers data via the line 52, transfers the I interface alarm from the alarm processing section 60 via the line 53, and incorporates the I interface alarm into the data. The interface frame pattern inserting section 20 inserts the I interface frame pattern into the data via the line 54,
Data and I interface alarms are sent to the I interface via the line 55.

FIG. 2 is a block diagram showing an embodiment of the alarm processing unit 60 shown in FIG.

The operation in the alarm processing unit of one of the Y interface system lines will be described.

Terminal side → Terminal side → DSU via line 71 when an input line disconnection in the direction of DSU (digital line terminating device) or loss of synchronization detection unit (hereinafter referred to as TE REC unit 61) is detected The data is transferred by the transfer unit at the time of failure in the direction (hereinafter, referred to as TE SEND transfer unit 67).

When the input side disconnection or loss of synchronization in the subscriber side → DSU direction is detected by the detecting section (hereinafter referred to as LINE SEND detecting section 63), the DS is connected via the line 72.
Failure during the transfer portion between U~DSU (D CE N OT R EA
DY: hereinafter referred to as DNR transfer unit 68).

[0023] In network side at the user-network interface, part (1.5M A Larm to detect that has been lost Layer 1 capability of the terminal direction I NDICA
TION S SIGNAL: Hereinafter, referred to as 1.5M AIS detection unit 64), D is detected via the line 73.
The data is transferred by the NR transfer unit 68.

When the 1.5M logical path out-of-synchronization detecting unit (hereinafter, referred to as 1.5M REC detecting unit 65) detects it, the DNR transfer unit 68 transfers it via the line 74.

When the network side of the user / network interface detects the loss of the layer 1 capability toward the subscriber (hereinafter referred to as 1.5M BAIS detection section 66). , And is transferred by the DNR transfer unit 68 via the line 75.

The data terminal device is a state when the transfer of the disorder or or unavailable (DTE U NCONTROLLED
N OT R EADY: below, to send the always "0" (referred to as the time of normal) in the referred to as UNR transfer unit).

The portion DTE transfers whether in communication (S tatus: hereinafter, referred to as S transfer unit) (referred to means in communication) always "1" at sending a. Terminal side → D
When a failure detection unit in the SU direction (hereinafter, referred to as TE SEND detection unit 62) detects it, TE is detected via the line 76.
When REC is detected, when TE SEND is detected, 1.5M A
When IS is detected, 1.5M REC is detected Transfer unit (hereinafter K
x transfer unit 69).

Similarly to the above, the alarm processing of the other lines in each line of the Y interface system is also performed.

[0029]

As described above, according to the present invention,
It is possible to obtain the effect that mutual connection (mutual data communication) can be achieved by connecting the Y interface type plural channel line and the I interface line to the digital line terminal.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing an embodiment of an alarm processing unit shown in FIG.

[Explanation of symbols]

1 ... I interface system frame synchronization unit 2 ... I interface system alarm detection unit 3 ... In-device clock transfer unit 4 ... Data division unit 5 ... Y interface system Clock transfer unit to one line in each line 6 ... Y interface system Alarm insertion part of one line in each line 7 ... Y interface system Frame pattern of one line in each line each channel insertion part 8 ... Y Clock transfer part of one other line in each interface system 9 ... Y Alarm insertion part of one other line in each interface line 10 ... Frame pattern insertion part of one other line in Y interface system 11 ... Frame synchronization part 12 of one line in each Y interface line 12 ... Alarm detection unit of one line in each line of Y interface system 13 ... One time in each line In-apparatus clock transfer section 14 ... In each of the Y interface system lines, the other 1 line frame synchronization section 15 ... In the Y interface system lines, the other 1 line alarm detection section 16 ... In the Y interface system lines, the other 1 line Internal device clock transfer section 17 ... Data multiplexing section 18 ... I interface system clock transfer section 19 ... I interface system alarm insertion section 20 ... I interface system frame pattern insertion section 21 ... I interface line-I interface system frame synchronization Inter-unit line 22 ... I interface system frame synchronization unit-I interface system alarm detection unit inter-connection line 23 ... I interface system alarm detection unit-alarm processing unit connection line 24 ... I interface system alarm detection unit-internal clock transfer unit connection line 25 ... Clock transfer unit in the device-Day Inter-division line 26 ... Data division unit-Y interface system each line of one line clock transfer unit inter-line line 27 ... Y interface system of each line One line clock transfer unit-Y interface system of each line 1
Line between alarm insertion units of one line 28 ... Alarm processing unit-Y interface system One of each line
Line between alarm insertion parts of one line 29 ... Part of inserting the alarm insertion part-Y interface frame pattern of one line in each Y interface system line into one line of each line 30 ... Y interface system frame pattern Part to be inserted into one line in each line-Y interface system One line in each line 31 ... Data division unit-Y interface system Line between clock transfer units of other one line in each line 32 ... Y interface system Clock transfer unit-Y interface system line between the other one line alarm insertion unit line 33 ... Alarm processing unit-Y interface system line each other line between the alarm insertion unit line 34 ... Y interface system each In the line Other 1 line alarm insertion part-Y interface system frame pattern in each line Other Part to be inserted into one line 35 ... Part to insert the Y interface system frame pattern into each other line-One other line in each Y interface system 41 ... One of each Y interface system lines Line-Y
Interface system pattern pattern Line between inter-sync parts of one line 42 ... Y interface system pattern pattern Synchronous part of one line among each line-line between alarm detection parts of one line among each line of Y interface system 43 ... Alarm detection unit-alarm processing unit line of one line in each Y interface system line 44 ... Alarm detection unit of one line in each Y interface system line-in-device clock transfer unit line 45 ... In-device Line between clock transfer unit-data multiplex unit 46 ... Data multiplex unit-Line between I interface system clock transfer units 47 ... I interface system clock transfer unit-Line between I interface system alarm insertion units 48 ... Alarm processing unit- I interface system alarm insertion section line 49 ... I interface system alarm insertion section-I interface system Line between inter-frame pattern insertion unit 50 ... I interface system frame pattern insertion unit-I interface system line 60 ... Alarm processing unit 61 ... TE REC detection unit 62 ... TE SEND detection unit 63 ... LINE SEND detection unit 64 ... 1.5M AIS detection unit 65 ... 1.5M REC detection section 66 ... 1.5M BAIS detection section 67 ... TE SEND transfer section 68 ... DNR transfer section 69 ... Kx transfer section 71 ... TE REC-TE SEND line 72 ... LINE SEND-DNR line 73 ... 1.5M AIS-DNR line 74 ... 1.5M REC-DNR line 75 ... 1.5M BAIS-DNR line 76 ... TE SEND-Kx line

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI technical display location H04L 7/00 A 7928-5K 12/02

Claims (1)

[Claims] 1. An I interface frame synchronization section and I
Interface system frame pattern inserter, I interface alarm detector, I interface alarm inserter, and I
A clock transfer unit from the interface system clock to the internal clock, a clock transfer unit from the internal clock to the I interface system clock, a data division unit that divides the I interface data into each Y interface system line, and each Y interface system line Data multiplexer for multiplexing data to I interface system line, Y interface system alarm detection unit, Y interface system alarm insertion unit, and device internal clock to Y interface system clock in one of the Y interface system lines Of the Y interface system clock to the in-device clock, the Y interface system frame synchronization unit, and the Y interface system frame pattern insertion unit, as well as the other one of the Y interface system lines. Interface system alarm detection unit, Y interface system alarm insertion unit, clock transfer unit from internal clock to Y interface system clock, clock transfer unit from Y interface system clock to internal clock, Y interface system frame synchronization unit, and Y interface The system includes a system frame pattern insertion unit, and the alarm processing unit outputs the output of the I interface system alarm detection unit and the output of the alarm detection unit of each line of the Y interface system to the alarm insertion unit of each line of the Y interface system and the I interface system alarm. A digital line terminating device characterized by performing ALM conversion (degeneration / pseudo-transfer) to be inputted to an inserting section.