JPH0670336A - White level signal control circuit - Google Patents

Abstract

PURPOSE:To properly change a voltage at a white level signal suppression level corresponding to both of a screen midposition and a screen circumferential part. CONSTITUTION:A white signal level control circuit 1 suppresses a white level signal and outputs a resulting composite video signal b1 to a cathode of a picture tube 12 via a video amplifier 11 while a white signal level is changed with a voltage V11 at a connecting point P11 between a horizontal deflection coil Lh1 and an S-shaped correction capacitor C1 in a horizontal output circuit 21 with respect to an input composite video signal a1 from a video signal processing circuit led to an input terminal 2. An output composite video signal b1 is shaped to be a sinusoidal curve in which the signal level is decreased for the scanning period when an electron beam of the picture tube 12 is deflected toward the screen circumferential part and increased for the scanning period when the electron beam of the picture tube 12 is deflected toward the screen center. Thus, the voltage for the white signal suppression level is properly changed to both the screen midposition and the screen circumferential part.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a white signal control circuit used in a video display device such as a television receiver and a monitor television, and more particularly, it suppresses an appropriate white signal in both the central portion and the peripheral portion of the screen. And a white signal control circuit capable of performing.

[0002]

2. Description of the Related Art Generally, in a video circuit of a television receiver, a signal having a high degree of modulation is fed to the cathode of a picture tube when a steady image is received or channels are switched, and an abnormal current is output to a horizontal output circuit (high voltage generating circuit). ) Or a picture tube, or a white signal suppression circuit that prevents a white signal of a certain level or more from being transferred to the cathode for the purpose of preventing white characters on the screen from blurring. .

FIG. 3 is a circuit diagram showing such a conventional white signal control circuit.

In FIG. 3, a white signal control circuit 51 suppresses a white signal with respect to an input composite video signal a2 from a video signal processing circuit guided to an input terminal 52 and outputs a video amplifier 61 as an output composite video signal b2. It is supplied to the cathode of the picture tube 62 through.

The white signal control circuit 51 will be described in more detail. The input terminal 52 has a PNP transistor Tr5.
1 is connected to the base. As a result, the input terminal 5
The input composite video signal a2 led to 2 is given to the base of the PNP transistor Tr51.

On the other hand, the power supply voltage V51 is applied to the input terminal 53.
Has been led. This input terminal 53 has resistors R51 and R
52 is connected to the reference potential point via the series connection of 52, and via the resistor R53, the PNP transistor Tr51,
Connected to the emitter of Tr52. The collectors of the PNP transistors Tr51 and Tr52 are connected to the reference potential point. The resistors R51 and R52 lead the voltage V52 indicating the white signal suppression level as a fixed bias from the connection point P51 by dividing the power source V51. Resistance R
The connection point P51 between 51 and R52 is a PNP transistor T
It is connected to the base of r52. As a result, the voltage V52 is applied to the base of the PNP transistor Tr52. A connection point P52 between the emitters of the PNP transistors Tr1 and Tr2 and the resistor R53 is connected to the anode of the diode D51. The cathode of the diode is a resistor R5
It is connected via 4 to the reference potential point. With this connection, the cathode of the diode D51 outputs the composite video signal b2 in which the white signal is suppressed.

FIG. 4 is a timing chart for explaining such an operation of the white signal control circuit 51 by taking as an example the case where the video signal of the input composite video signal a2 exceeds the white signal suppression level, and FIG. Showing the composite video signal a2,
FIG. 4B shows the output composite video signal b2.

In FIG. 4A, the input composite video signal a
2 has a video signal 71 in the scanning period and a horizontal synchronizing pulse 72 in the retrace period, as shown by the solid line. During the blanking period, the front porch 73 and the back porch 74 before and after the horizontal synchronizing pulse are at the pedestal level. The black level in the video signal 71 during the scanning period is set at the same position as the pedestal level.

Such an input composite video signal a2 is PNP.
When the input composite video signal a2 is supplied to the base of the transistor Tr51 and is smaller than the voltage V52 indicating the white signal suppression level, the PNP transistor Tr2 is supplied.
Since 52 is turned off, the input composite video signal a2 is directly converted to the input composite video signal b2, and the video amplifier 6
However, when the input composite video signal a2 becomes equal to or higher than the voltage V52 indicating the white signal suppression level, the connection point P
Since the voltage of 52 exceeds the voltage V52, the PNP transistor Tr52 is turned on. As a result, the portion 75 of the voltage V52 or higher shown in FIG.
As in the blanking period shown in (b), the white signal 76 with a constant voltage V52 is obtained.

According to the conventional white signal control circuit 51 as described above, the white signal is suppressed by cutting the portion of the input composite video signal a2 which is equal to or higher than the voltage V52, so that an abnormal current causes a horizontal output circuit. (High voltage generating circuit) and the picture tube, and it is possible to prevent the white characters on the screen from blurring.

By the way, in the picture tube of the conventional television receiver, since the hocus of the electron beam is aligned with the central part of the screen, the non-distance of the deflected beam is longer than the central part of the screen, and the hocus shift occurs in the peripheral part of the screen. Was occurring.

FIG. 5 is an explanatory view for explaining such a hocus shift.

In FIG. 5, reference numeral 81 is a picture tube screen, and bright points 82 and 83 are image-displayed in the central portion and the peripheral portion of the screen 81, respectively. Here, a high sharpness is obtained at the bright spot 82 in the central portion of the screen where the hocus of the electron beam is perfectly matched, but the flight distance of the deflected electron beam is longer than that in the central portion of the screen. 8
In No. 2, bleeding (halo) phenomenon occurs around the periphery 84, and the sharpness of white is lowered. Therefore, if the white signal suppression level is set to a high level so that the bright spot 82 in the central portion of the screen produces a white shine above a certain level, the halo phenomenon becomes large in the peripheral portion of the screen and the sharpness of white is reduced. Will be lost.

In response to this, if the white signal suppression level is set to be low so as to reduce the halo phenomenon at the peripheral portion of the screen, the brightness at the central portion of the screen will be insufficient.

[0015]

The conventional white signal control circuit described above sets the white signal suppression level in correspondence with both the central portion of the screen where the hocus is perfectly aligned and the peripheral portion of the screen where the hocus is misaligned. It was difficult to obtain, the brightness at the center of the screen was insufficient, and a large halo phenomenon occurred at the periphery of the screen.

It is an object of the present invention to eliminate the above-mentioned problems and provide a white signal control circuit capable of appropriately changing the voltage of the white signal suppression level corresponding to both the central portion of the screen and the peripheral portion of the screen. To do.

[0017]

According to a first aspect of the present invention, there is provided a white signal control circuit for controlling a white signal so that the voltage of the white signal of a video signal supplied to a picture tube does not exceed a white signal suppression level. A white signal control circuit for suppressing a white signal control circuit, comprising circuit means for changing the voltage of the white signal suppression level corresponding to at least one of a horizontal period and a vertical period of a picture tube.

[0018]

According to this structure, the circuit means for changing the voltage of the white signal suppression level is provided corresponding to at least one of the horizontal period and the vertical period of the picture tube.
It is possible to appropriately change the voltage of the white signal suppression level corresponding to both the screen central portion and the screen peripheral portion.

[0019]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram showing an embodiment of a white signal control circuit according to the present invention.

In FIG. 1, a white signal control circuit 1 outputs a white signal suppression level to a horizontal output circuit 2 with respect to an input composite video signal a1 from a video signal processing circuit guided to an input terminal 2.
In the state where the voltage is changed by the voltage V11 at the connection point P11 between the horizontal deflection coil Lh1 of No. 1 and the S-shaped correction coil C1, the white signal is suppressed and the video amplifier 1 is output as the output composite video signal b1.
It is supplied to the cathode of the picture tube 12 via 1.

The white signal control circuit 1 will be described in more detail. The input terminal 2 is connected to the base of the PNP transistor Tr1. On the other hand, the power supply voltage V1 is led to the input terminal 3. This input terminal 3 has a resistor R1,
It is connected to the reference potential point via the series connection of R2, and is also connected to the PNP transistors Tr1 and Tr via the resistor R3.
Connected to the two emitters. PNP transistor Tr
The collectors of 1 and Tr2 are connected to the reference potential point.
The connection point between the resistors R1 and R2 is the PNP transistor Tr2.
Connected to the base of. PNP transistor Tr1, T
A connection point P2 between the emitter of r2 and the resistor R3 is connected to the anode of the diode D1. The cathode of the diode D1 is connected to the reference potential point via the resistor R4 and is also connected to the input terminal of the video amplifier 11. The configuration of the white signal control circuit 1 up to this point is similar to that of the conventional white signal control circuit 53 of FIG.

The difference in this embodiment is that the resistors R1,
The connection point P1 of R2 is connected to the connection point P11 of the horizontal deflection coil Lh1 and the S-shaped correction coil C1 via the capacitor C2 and the resistor R5.

Next, the horizontal output circuit 21 will be described in more detail.

The drive pulse c1 generated from the output for horizontal deflection is guided to the input terminal 22. The drive pulse c1 guided to the input terminal 22 is NP
It is supplied to the base of the N-transistor Tr11. NPN
The emitter of the transistor Tr11 is connected to the reference potential point and the cathode of the damper diode D11. The emitter of the NPN transistor Tr11 is connected to the anode of the damper diode D11 and also to the input terminal 23 to which the DC voltage V12 is supplied via the primary winding of the flyback transformer. N
A resonance capacitor C11 is connected in parallel to the collector-emitter path of the PN transistor Tr11, and S
The series connection of the character correction capacitor C1 and the horizontal deflection coil Lh1 is connected in parallel.

The connection point between the S-shaped correction capacitor C1 and the horizontal deflection coil Lh1 is connected to the connection point between the resistors R1 and R2 via the resistor R5 and the capacitor C2 of the white signal control circuit 1. The flyback transformer 21 has the primary winding L1.
The pulse voltage generated in the pulse voltage is boosted and the high voltage pulse voltage is output from the secondary winding L2.

The secondary winding L2 of the flyback transformer is
A plurality of anode / cassette paths of the winding L21 and the diode D21 are alternately connected from the low voltage side terminal to the high voltage side terminal.

Secondary winding L2 of flyback transformer 24
The high voltage side terminal of the cathode ray tube 12 is connected via the diode D12.
Connected to the anode of. The pulse voltage from the high voltage side terminal of the secondary winding L2 of the flyback transformer 21 is rectified and smoothed by a rectification smoothing circuit composed of a diode D12 and a stray capacitance generated by the anode of the picture tube 12, and the anode of the picture tube 12 is rectified and smoothed. Is supplied to.

Secondary winding L2 of flyback transformer 24
The low-voltage side terminal of is connected to the reference potential point via the capacitor C12 that bypasses the AC component in the horizontal deflection, and is supplied with the power supply voltage V13.
Connected to.

Here, the voltage obtained by dividing the voltage V1 by the resistors R1 and R2 is set as a voltage V21, and the horizontal deflection coil Lh1
Assuming that a voltage V22 is a voltage obtained by attenuating the AC component of the voltage V11 at the connection point P11 between the S-shaped correction coil C1 and the S-shaped correction coil C1 to some extent via the resistor R5 and the capacitor C2, the white signal control circuit
The voltage V2 at the connection point P1 between the resistors R1 and R2 in is the voltage V21 plus the voltage V22. A voltage V2 (V21 + V22) indicating the white signal suppression level is applied to the base of the PNP transistor Tr2. Accordingly, from the cathode of the diode D1 of the white signal control circuit 1, in a state where the white signal suppression level is changed by the voltage V11 at the connection point P11 between the horizontal deflection coil Lh1 of the horizontal output circuit 21 and the S-shaped correction coil C1, The composite video signal b2 in which the white signal is suppressed is output.

FIG. 2 is a timing chart for explaining the operation of the white signal control circuit 1 by taking the case where the video signal of the input composite video signal a1 exceeds the white signal suppression level as an example, and FIG. 2 (a) is horizontal. The voltage V11 at the connection point between the deflection coil Lh1 and the S-shaped correction coil C1 is shown, FIG. 2B shows the input video signal a1, and FIG. 2C shows the output composite video signal b1.

In FIG. 2A, the horizontal deflection coil Lh
The voltage V11 at the connection point between 1 and the S-shaped correction coil C1 is a sinusoidal curve that is maximum when the electron beam is deflected upward and is deflected to the center of the screen in synchronization with the 1H (horizontal) period of the picture tube 12. Has become.

In FIG. 2B, the input composite video signal a
1 has a video signal 31 in the scanning period and a horizontal synchronizing pulse 32 in the retrace line period, as shown by the solid line. During the blanking period, the front porch 33 and the back porch 34 before and after the horizontal synchronizing pulse 32 are at the pedestal level. The black level in the video signal 31 is set at the same position as the pedestal level.

On the other hand, the voltage V2 indicating the white signal suppression level indicated by the broken line is obtained by adding the constant voltage V21 obtained by dividing the voltage V1 by the resistors R1 and R2 to the voltage V22 obtained by attenuating the AC component of the voltage V11. Become.

When the input composite video signal a1 is supplied to the base of the PNP transistor Tr1 and the input composite video signal a1 is smaller than the voltage V2 indicating the white signal suppression level, the PNP transistor Tr2 is turned off. The input composite video signal a1 is output as it is as shown in the blanking period shown in FIG.
Is converted into a video signal and is supplied to the video amplifier 11. When the input composite video signal a1 becomes equal to or higher than the voltage V2 indicating the white signal suppression level, the voltage at the connection point P2 exceeds the voltage V2, so the PNP transistor Tr2 is turned on, and the input composite video signal a1 becomes The voltage V shown in FIG.
Two or more parts 35 are cut, and the output composite video signal b1
Is a sine that decreases when the electron beam of the picture tube 12 is deflected to the peripheral portion of the screen and increases when the electron beam is deflected to the central portion of the screen as in the blanking period shown in FIG. It becomes a curve 36.

According to such an embodiment, since the voltage V2 indicating the white signal suppression level becomes a high level in the central portion of the screen where the focus of the electron beam is perfectly matched,
In the peripheral portion of the screen where a high sharpness is obtained and the flight distance of the deflected electron beam is longer than the central portion of the screen, the voltage V2 indicating the white signal suppression level becomes a low level, so that the halo phenomenon can be suppressed and the white phenomenon can be suppressed. It is possible to prevent a decrease in sharpness. As described above, in the embodiment shown in FIG. 1, the voltage of the white signal suppression level can be appropriately changed in correspondence with both the center portion of the screen and the peripheral portion of the screen, so that the image quality of the entire screen can be improved.

In the embodiment of FIG. 1, the voltage of the white signal suppression level is changed only in response to the horizontal cycle, but the voltage of the white signal suppression level is changed in accordance with the vertical cycle in addition to the horizontal cycle. By doing so, a higher effect can be obtained.

[0038]

According to the present invention, since the voltage of the white signal suppression level can be appropriately changed corresponding to both the central portion of the screen and the peripheral portion of the screen, the image quality of the entire screen of the picture tube can be improved. Can be improved.

[0039]

[Brief description of drawings]

[0040]

FIG. 1 is a circuit diagram showing an embodiment of a white signal control circuit according to the present invention.

[0041]

FIG. 2 is a timing chart showing the operation of the white signal control circuit of FIG.

[0042]

FIG. 3 is a circuit diagram showing a conventional white signal control circuit.

[0043]

FIG. 4 is a timing chart showing the operation of the white signal control circuit of FIG.

[0044]

FIG. 5 is an explanatory diagram illustrating a hocus shift of a television receiver using a conventional white signal control circuit.

[0045]

[Explanation of symbols]

 1 White signal control circuit 12 Picture tube 21 Horizontal output circuit C2 capacitor R5 resistance

Claims (2)

[Claims] 1. A white signal control circuit that suppresses a white signal so that the voltage of the white signal of a video signal supplied to a picture tube does not exceed a white signal suppression level. A white signal control circuit comprising circuit means for changing the voltage of the white signal suppression level corresponding to at least one of them. 2. A white signal control circuit for suppressing a white signal so that the voltage of the white signal of a video signal supplied to a picture tube does not exceed a white signal suppression level. A white signal control circuit comprising circuit means for changing the voltage of the white signal suppression level in accordance with the voltage at the connection point of the letter correction coil.