JPH0669505A - Thin-film transistor - Google Patents

Abstract

PURPOSE:To make a transistor small-sized in a state that a discontinuity is prevented. CONSTITUTION:Two contact layers 106a, 106b are formed to cover the edges of a semiconductor layer 104 in a direction perpendicular to the isolation direction. As a result, the semiconductor layer 104 is not exposed and it is not discontinued when it is etched. In addition, since the edges of the semiconductor layer 104 are covered, a channel current can flow into, and flow out form, the side face of a channel region situated in the direction perpendicular to the isolation direction. As a result, the minimum distance of a conductive route for the channel current becomes substantially shorter than a channel length decided by the magnitude of a channel protective film 105, the channel current is conducted much in a short route in its conductive distance, and an effective channel length becomes short. Consequently, the transistor can be made small in a state that a discontinuity is not caused.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor used as a switching element for an active matrix substrate used in a liquid crystal display device or the like.

[0002]

2. Description of the Related Art Liquid crystal display devices, which have the characteristics of thinness and low power consumption, have been attracting attention as display devices that replace CRTs. Above all, an active matrix driving type liquid crystal display device using a thin film transistor array has advantages such as high response speed of liquid crystal and high display quality.

FIG. 5 (a) is a plan view showing a conventional inverted stagger type thin film transistor formed on an active matrix substrate, and FIG. 5 (b) is a sectional view taken along the line CC 'of FIG. 5 (a). Show. The thin film transistor includes a gate bus line 302 and a source bus line 307 formed on a glass substrate 301 which is an insulating substrate so as to intersect with each other.
Of these, it is formed on the gate electrode 302a branched from the gate bus line 302. Specifically, a gate insulating film 303 is laminated on the glass substrate 301 so as to cover the gate electrode 302a, and a semiconductor layer 304 is formed on the gate insulating film 303 above the gate electrode 302a. Further, a channel protective film 305 is formed on the semiconductor layer 304. A contact layer 306a is formed over one end (left side) of the channel protection film 305 in the CC ′ line direction over the semiconductor layer 304, and a contact over the other end (right side) over the semiconductor layer 304. A layer 306b is formed, and a source electrode 307a is formed over one (left side) contact layer 306a and over the gate insulating film 303.
The source electrode 307a is a portion formed by branching from the source bus line 307. A drain electrode 308 is formed on a portion of the other (right side) contact layer 306b extending from the gate insulating film 303.

That is, in the above thin film transistor,
In the direction orthogonal to the CC ′ line direction, the semiconductor layer 30
4 and the channel protection film 305 thereon are formed to have the same size, and the contact layer 306a,
306b has the same size.

By the way, in the case of this thin film transistor,
The size of the channel region formed in the semiconductor layer 304 depends on the size and shape of the channel protective film 305 formed thereon. The channel length at this time is determined by the separation distance L1 between both ends of the channel protective film 305 in the CC ′ line direction.

[0006]

Therefore, in order to miniaturize the thin film transistor, it is conceivable to shorten the channel length L1 or to omit the formation of the channel protective film 305. However, when the channel length L1 is shortened to reduce the size as in the former case, the channel protective film 305 is used.
If the misalignment of the photomask used for the formation of the semiconductor layer occurs, the semiconductor layer 304 may be exposed and the wiring may be broken during etching. On the other hand, in the case of omitting the formation of the channel protective film 305 and downsizing, it is necessary to form the semiconductor layer 304 thickly. As a result, the gap in the semiconductor layer 304 increases, and the source electrode 307 and the drain electrode 3 are formed.
There is a problem that 08 is likely to be broken.

The present invention has been made to solve the problems of the prior art, and an object of the present invention is to provide a thin film transistor which can be downsized while preventing the occurrence of disconnection.

[0008]

In the thin film transistor of the present invention, a gate electrode is formed on one side of a gate insulating film, and a semiconductor layer and a channel protective film are formed on the other side in this order and facing the gate electrode. In a thin film transistor formed by interposing a contact layer between the semiconductor layer and the source electrode and between the semiconductor layer and the drain electrode, the contact layer is formed so as to cover an end surface of the semiconductor layer, The minimum distance of the conduction path of the current flowing in and out of the semiconductor layer via the contact layer is set to be smaller than the width of the channel protective film, thereby achieving the above object.

In the thin film transistor of the present invention, a gate electrode is formed on one side of the gate insulating film, and a semiconductor layer and a channel protective film are formed on the other side in this order and opposite to the gate electrode. Two contact layers are formed apart from each other on the channel protective film and covering the channel protective film and the semiconductor layer, and further, the source electrode extends from one contact layer to the gate insulating film and the source electrode extends from the other contact layer to the gate insulating film. A thin film transistor having a drain electrode formed thereon, wherein each of the two contact layers is in a direction orthogonal to a separated direction,
The structure is formed so as to reach the gate insulating film through the end faces of the channel protective film and the semiconductor layer, thereby achieving the above object.

In the thin film transistor of the present invention, a gate electrode is formed on one side of the gate insulating film, and a semiconductor layer is sandwiched on the other side by two contact layers facing the gate electrode and separated from each other. Is being formed,
A channel protective film is formed on the semiconductor layer, and a source electrode is formed from the end of the channel protective film to the semiconductor layer while passing over one of the contact layers, and on the other contact layer. A thin film transistor in which a drain electrode is formed from an end portion of the channel protective film to a semiconductor layer in a state of passing through, and each of the two contact layers is formed longer than the semiconductor layer in a direction orthogonal to a separation direction. The above object is achieved thereby.

The above-mentioned contact layer may be formed by implanting impurity ions, or may be formed by using a material in which impurities are mixed in advance.

[0012]

In the thin film transistor of the present invention, each of the two contact layers is formed so as to cover the end face of the semiconductor layer or be longer than the semiconductor layer in the direction orthogonal to the separating direction. Therefore, the end surface of the semiconductor layer in the above direction is covered with the contact layer. At this time, if the length of the contact layer in the direction orthogonal to the separation direction is set to a dimension capable of absorbing the misalignment with respect to the semiconductor layer, the semiconductor layer is not exposed and the wire is not broken during etching.

Further, since the end surface of the semiconductor layer in the above direction is covered with the contact layer, the channel current conducted through the channel region not only flows in and out from the channel end on the separation side. The inflow and outflow can also be performed from the side surface of the channel region on the side orthogonal to the separating direction. Therefore, the minimum distance of the conduction path of the channel current is substantially shorter than the channel length determined by the size of the channel protective film, and the channel current is conducted in many paths having a short conduction distance. Therefore, the effective channel length becomes shorter.

Therefore, the size of the thin film transistor can be reduced in the state where the disconnection does not occur.

[0015]

EXAMPLES Examples of the present invention will be described below.

Example 1 FIG. 1A is a plan view showing a thin film transistor of this example, and FIG. 1B is FIG.
It is sectional drawing by the AA 'line of (a). This thin film transistor includes a gate bus line 102 out of a gate bus line 102 and a source bus line 107 formed in a state of intersecting on a glass substrate 101 which is an insulating substrate.
Is formed on the gate electrode 102a which is branched. The width direction of the gate electrode 102a is along the line AA '.

A gate insulating film 103 is formed on almost the entire surface of the substrate 101 on which the gate electrode 102a is formed, and a semiconductor layer 104 and a channel protective film are formed on the gate insulating film 103 above the gate electrode 102a. 105 are formed in this order. The channel protective film 105 has the same length dimension as the semiconductor layer 104 in the direction orthogonal to the direction along the line AA ′, and the same width dimension in the direction along the line AA ′. Layer 1 in the direction
It is formed to be shorter than the width of 04, and a gap is formed with respect to the semiconductor layer 104 on both sides in the width direction.

On the channel protection film 105, the contact layer 1 extends from the one end side in the width direction to the semiconductor layer 104.
06a is formed, and the contact layer 106b is formed from the other end side to the semiconductor layer 104. The contact layers 106a and 106b are formed such that the length dimension in the direction orthogonal to the direction along the line AA ′ is longer than the lengths of the semiconductor layer 104 and the channel protective film 105. Both ends of each of 106b exist so as to reach the upper surface of the gate insulating film 103.

A source electrode 107a is formed over the contact layer 106a and the gate insulating film 103,
A drain electrode 108 is formed over the contact layer 106b and the gate insulating film 103. The source electrode 107a is formed branching from the source bus line 107.

Next, a method of manufacturing the thin film transistor having the above structure will be described with reference to FIG.

First, as shown in FIG. 2A, a Ta film having a thickness of 300 nm is laminated on a glass substrate 101 and patterned to form a gate electrode 102a.

Next, as shown in FIG. 2B, the gate insulating film 103 is formed on the glass substrate 101 having the gate electrode 102a formed thereon by sputtering or plasma CVD.
A SiNx film having a thickness of 300 nm, and amorphous silicon (a-Si) having a thickness of 30 nm to be the semiconductor layer 104.
Thickness of the film and the channel protection film 105 is 200 nm
After the SiNx film is continuously deposited in this order over the entire surface, the channel protection film 105 is formed in a pattern as shown by etching. Note that the gate insulating film 103
The gate electrode 13 may be anodized to form an insulating film before the deposition of.

Next, as shown in FIG. 2C, a P- (phosphorus) -doped a-Si film to be the contact layers 106a and 106b is deposited over the entire surface by plasma CVD to a thickness of 50 nm, and then, A- to be the semiconductor layer 104
A to be the Si film and the contact layers 106a and 106b
The -Si film is etched to form the semiconductor layer 104 and the contact layers 106a and 106b. As the material used for the semiconductor layer 104 and the contact layers 106a and 106b, microcrystalline silicon or polysilicon (p-Si) may be used.

Next, as shown in FIG. 2D, the thickness 20
A source electrode 107a and a drain electrode 1 which are obtained by stacking 0 nm Mo films and dividing the Mo films by etching.
08 is formed.

The thin film transistor manufactured as described above has two contact layers 106 as shown in FIG.
Each of a and 106b is formed so as to cover the end surface of the semiconductor layer 104 in the direction orthogonal to the separating direction. At this time, if the length of the contact layers 106a and 106b in the direction orthogonal to the separating direction is set to a dimension that can absorb the misalignment with respect to the semiconductor layer 104, the semiconductor layer 104 will not be exposed and may be disconnected during etching. There is no.

The contact layers 106a and 106b form the semiconductor layer 104 in a direction orthogonal to the separating direction.
Since the end surface of the channel region is covered, the channel current conducted in the channel region not only flows in and out from the channel end on the separation direction side, but also on the channel region on the direction side orthogonal to the separation direction. Can flow in and out from the side. For this reason, the minimum distance of the conduction path of the channel current becomes substantially shorter than the channel length determined by the size of the channel protective film 105 as well as the width dimension of the channel protective film 105 in the AA ′ direction. Further, the channel current is conducted in many paths having a short conduction distance. Therefore,
The effective channel length becomes shorter.

Therefore, the thin film transistor of this embodiment can be miniaturized in a state where no disconnection occurs.

In the above embodiment, the contact layers 106a, 1a
06b is formed by using a-Si previously doped with P, but the present invention is not limited to this, and a-S
After forming an i film, a silicon film in a microcrystalline state, or a p-Si film, a contact layer is formed by doping the above-mentioned P or other B (boron) impurities by a predetermined ion implantation method. You may form 106a, 106b.

Although Mo is used for the source electrode 107a and the drain electrode 108 in the above embodiment, a metal such as Ti or Al can be used.

Needless to say, the structure and manufacturing method of the thin film transistor of the present invention are not limited to those of the above embodiment.

(Embodiment 2) FIG. 3A is a plan view showing a thin film transistor according to another embodiment of the present invention.
3B is a sectional view taken along the line BB ′ of FIG.
This thin film transistor is formed on the gate electrode 202a branched from the gate bus line 202 among the gate bus line 202 and the source bus line 207 formed in a state of intersecting on the glass substrate 201 which is an insulating substrate. Has been done. The width direction of the gate electrode 202a is the direction along the line BB '.

A gate insulating film 203 is formed on substantially the entire surface of the substrate 201 on which the gate electrode 202a is formed, and a semiconductor layer 204 and a channel protective film are formed on the gate insulating film 203 above the gate electrode 202a. 205 are formed in this order. The channel protective film 205 has the same length dimension as the semiconductor layer 204 in the direction orthogonal to the direction along the line BB ′, and the width in the direction along the line BB ′ is the same. The semiconductor layer 204 in
Is formed to have the same width.

Contact layers 206a and 206b are formed on both sides of the semiconductor layer 204 in the width direction. The contact layers 206a and 206b have the above-mentioned B-
It is formed to be longer than the length of the semiconductor layer 204 in the direction orthogonal to the direction along the line B ′.

A source electrode 207a is formed in a portion extending from one end of the channel protective film 205 in the direction along the line BB 'to over the contact layer 206a and the gate insulating film 203, and the line BB' is formed. From the other end side of the channel protective film 205 in the direction along the contact layer 2
A drain electrode 208 is formed in a portion which extends over 06b and extends over the gate insulating film 203. The source electrode 207a is formed branching from the source bus line 207.

A method of manufacturing the thin film transistor having the above structure will be described with reference to FIG.

First, as shown in FIG. 4A, a Ta film having a thickness of 300 nm is laminated on a glass substrate 201 and patterned to form a gate electrode 202a.

Next, as shown in FIG. 4B, the gate insulating film 203 is formed by sputtering or plasma CVD.
SiNx film having a thickness of 300 nm, a 30 nm thick a-Si film serving as the semiconductor layer 204, and the channel protective film 2
A SiNx film having a thickness of 200 nm, which is No. 05, is continuously laminated in this order over the entire surface. Then, the channel protection film 205 is formed in a pattern as shown by etching. Note that the gate electrode 202a may be anodized before the gate insulating film 203 is deposited, and then the gate insulating film 203 may be formed. The gate insulating film 203 is SiN
An insulating film other than x may be used. In addition, the semiconductor layer 20
The material used for 4 may be microcrystalline silicon or polysilicon (p-Si).

Next, as shown in FIG. 4C, a channel protection film 205 is formed on the a-Si film, for example, P.
Alternatively, impurity ions such as B are implanted. At this time, since the channel protective film 205 functions as a mask, the contact layers 206a and 206b are formed on both sides of the semiconductor layer 204. Subsequently, etching is performed to form the contact layers 206a and 206b in the illustrated pattern.

Next, as shown in FIG.
A Mo film having a thickness of m is laminated, and a source electrode 207a and a drain electrode 208 are formed by patterning the Mo film.

The thin film transistor manufactured as described above has two contact layers 206 as shown in FIG.
Each of a and 206b is formed longer than the semiconductor layer 204 in the direction orthogonal to the separating direction.
At this time, if the length of the contact layers 206a and 206b in the direction orthogonal to the separating direction is set to a dimension that can absorb the misalignment with respect to the semiconductor layer 204,
The semiconductor layer 204 is not exposed and is not broken during etching.

In addition, the two contact layers 206a, 20
Since each of 6b is formed longer than the semiconductor layer 204 in the direction orthogonal to the separation direction, the channel current conducted through the channel region not only flows in and out from the channel end on the separation direction side. The inflow and outflow can also be performed from the side surface of the channel region on the side orthogonal to the separating direction. Therefore, the minimum distance of the conduction path of the channel current becomes substantially shorter than the channel length determined by the size of the channel protective film 205 as well as the width dimension of the channel protective film 205 in the BB ′ direction. In addition, the channel current is conducted in many paths having a short conduction distance. Therefore, the effective channel length becomes shorter.

Therefore, even the thin film transistor of this embodiment can be miniaturized in a state where no disconnection occurs.

In the above embodiment, the preformed aS is used.
Impurity ions such as P (phosphorus) or B (boron) are implanted into the i film to form the contact layers 206a and 206b, but the present invention is not limited to this, and impurities such as P or B are mixed. a-Si, similar microcrystalline silicon,
Alternatively, the contact layer 206 is formed by using similar p-Si.
a and 206b may be formed.

In the above embodiment, the source electrode 207a and the drain electrode 208 are made of Mo, but T
Metals such as i and Al may be used.

Needless to say, the thin film transistor of the present invention is not limited to the above structure and manufacturing method.

[0046]

In the thin film transistor of the present invention, each of the two contact layers is formed so as to cover the end face of the semiconductor layer or be longer than the semiconductor layer in the direction orthogonal to the separating direction. No disconnection during etching. Further, since the end surface of the semiconductor layer in the above direction is covered with the contact layer, the inflow and outflow can be performed also from the side surface of the channel region on the side orthogonal to the separation direction, so that the conduction path of the channel current is Is substantially shorter than the channel length determined by the size of the channel protective film, and the channel current is conducted in a large number of paths having a short conduction distance, so that the effective channel length is shortened. Therefore, miniaturization can be achieved without disconnection.

[Brief description of drawings]

FIG. 1A is a plan view showing a thin film transistor of this embodiment, and FIG. 1B is a sectional view taken along the line AA ′ of FIG.

FIG. 2 is a process drawing (cross-sectional view) showing the method of manufacturing the thin film transistor of this embodiment.

3A is a plan view showing a thin film transistor of another embodiment of the present invention, and FIG. 3B is a sectional view taken along line BB ′ of FIG.

FIG. 4 is a process drawing (cross-sectional view) showing a method of manufacturing a thin film transistor according to another embodiment of the present invention.

5A is a plan view showing a conventional thin film transistor, and FIG. 5B is a sectional view taken along line CC ′ of FIG.

[Explanation of symbols]

 101, 201 glass substrate 102, 202 gate bus line 102a, 202a gate electrode 103, 203 gate insulating film 104, 204 semiconductor layer 105, 205 channel protective film 106a, 106b contact layer 206a, 206b contact layer 107, 207 source bus line 107a , 207a Source electrode 108, 208 Drain electrode

Claims (5)

[Claims] 1. A gate electrode is formed on one side of a gate insulating film, and a semiconductor layer and a channel protective film are formed on the other side in this order and opposite to the gate electrode, and the semiconductor layer and the source electrode are formed. In a thin film transistor having a contact layer interposed between the semiconductor layer and the drain electrode, the contact layer is formed so as to cover an end face of the semiconductor layer, and flows into the semiconductor layer through the contact layer. A thin film transistor in which a minimum distance of a conduction path of an outflowing current is set smaller than a width of the channel protective film. 2. A gate electrode is formed on one side of the gate insulating film, and a semiconductor layer and a channel protective film are formed on the other side in this order and opposite to the gate electrode, and on the channel protective film. Two contact layers were formed apart from each other and covering the channel protective film and the semiconductor layer, and further, a source electrode was formed from one contact layer to the gate insulating film, and a drain electrode was formed from the other contact layer to the gate insulating film. A thin film transistor, wherein each of the two contact layers is formed in a structure that reaches the gate insulating film through an end face of the channel protective film and the semiconductor layer in a direction orthogonal to a separated direction. Thin film transistor. 3. A gate electrode is formed on one side of the gate insulating film and a semiconductor layer is opposed to the gate electrode on the other side,
Further, the channel protection film is formed so as to be sandwiched between two contact layers that are separated from each other, a channel protection film is formed on the semiconductor layer, and an end portion of the channel protection film is formed so as to pass over one of the contact layers. To the semiconductor layer, and a drain electrode is formed from the end of the channel protective film to the semiconductor layer while passing over the other contact layer, the thin film transistor comprising the two contact layers. Each of the thin film transistors is formed longer than the semiconductor layer in a direction orthogonal to the separation direction. 4. The thin film transistor according to claim 1, 2 or 3, wherein the contact layer is formed by implanting impurity ions. 5. The thin film transistor according to claim 1, 2 or 3, wherein the contact layer is formed using a material in which impurities are mixed in advance.