JPH0669175B2 - Multi-frequency signal waveform processing method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an improvement in a method of processing a frequency division multiplexed signal composed of a plurality of signals each having a different frequency.

<Prior Art> FIG. 3 is a block diagram of a conventional multi-frequency signal waveform processing circuit. As shown in _{FIG, f 1, f 2, ......} , multi-frequency signal 41 having a frequency of fn is, n pieces of filter F ₁ which passes each frequency, F _2, ......, n-number of isolated by Fn It is separated into one wave signal. For example, suppose that each single wave signal is configured to represent a digital signal “1” and “0” by the wave “on” and “off”, the wave “on” and “off”. A circuit for converting "to a logic signal is required. For each signal, for example, tone decoders TD ₁ , TD ₂ , ...
, TDn are respectively converted into logic signals and input to a calculation unit such as the microcomputer 42.

<Problems to be Solved by the Invention> As described above, in order to process a multi-frequency signal waveform, a filter and a tone decoder are required for each frequency, and the circuit configuration becomes complicated and the cost becomes high. There is a point.

The output of the tone decoder is a logic signal which becomes "H level" and "L level" with respect to "ON" and "OFF" of the wave, but these are serial signals and n
The microcomputer 42 of FIG. 3 must decode this serial signal and perform a predetermined process. However, in the case where the n serial signals are input at a relatively high speed and the signals are not synchronized with each other, the processing capacity of the microcomputer 42 is exceeded and the processing is virtually impossible. The problem arises that

The present invention has been made in view of these problems and aims to reduce the processing amount of an arithmetic unit such as a microcomputer and to simplify the circuit configuration.

<Means for Solving the Problems> In order to achieve the above object, the multi-frequency signal waveform processing method according to the present invention multiplexes a frequency division multiplexed signal composed of a plurality of signals each having a different frequency. A / D conversion is performed on the waveform as it is converted, and the A / D converted digital signal waveform is temporarily stored in the storage means by the sampling clock, and then the multiplexed digital signal stored in the storage means is D / D converted. When A-converted and reproduced, the multiplexed state is changed while changing the clock frequency of the read signal according to the frequency of each frequency component so that the signals of each multiplexed frequency component are all read out at the same frequency. As it is, by repeating the reproduction processing the number of times corresponding to the number of frequency components, processing of all signals having different frequencies can be performed. is doing.

<Operation> As described above, in the present invention, the processing of the multi-frequency signal waveform is performed as follows.
Since the data is temporarily stored and then sequentially reproduced so as not to be performed at the same time but to be performed sequentially, the processing amount of the arithmetic unit is reduced and the processing capacity is not exceeded, and the processing is performed without any trouble.

Also, when reproducing for this sequential processing, the read speed is changed so that the signals of each frequency component all have the same frequency, so the only filter required is one that supports one type of frequency. Well, the circuit can be simplified.

<Example> Next, one example shown in the drawings will be specifically described.

FIG. 1 is a block diagram of a main part of a signal processing circuit for implementing the present invention, and FIG. 2 is a diagram showing an example of the entire system.

In the example shown in FIG. 2, a plurality of terminals are arranged on two signal lines in a bus shape to transmit and receive signals.
2, ... N are slave units for transmitting signals of frequencies f ₁ , f ₂ ,. Each slave is equipped with some kind of sensor, and each slave always holds information about the detection result of the sensor.

The master unit 10 first sends a signal called a header from the master unit 10 to all the slave units in order to obtain information held by the slave unit 1. When each cordless handset receives this header,
Information corresponding to each sensor input is returned to the master device 10 within a predetermined time. Since this response is carried out at a predetermined frequency f ₁ , f ₂ , ..., fn for each slave unit, signals on the bus 11 with n frequencies of f ₁ , f ₂ , ..., fn. Are multiplexed and are input to the base unit 10 as they are. The master device 10 analyzes the input multi-frequency signal and obtains information from each slave device. In addition, base unit 10
The transmission of the header from is like a signal for outputting information from each slave, and roughly synchronizes with the signal transmitted from each slave, but strict synchronization is not necessary.

Next, the processing of the multi-frequency signal waveform in the master device 10 will be described with reference to FIG.

F ₁ , f ₂ , ... Output from each child device 1 etc. and input to the parent device 10.
The multi-frequency signal 21 of ..., Fn is first input to the analysis unit 22 in a multiplexed (superimposed signal) state, and A /
D converted. When the header transmission is completed, the analysis control signal 32 output from the microcomputer 31 is active, and the input multi-frequency signal is surely A / D-converted from the head without missing.

According to Shannon's sampling theorem, the frequency of the sampling clock of the input f ₁ , f ₂ , ..., fn at the time of this A / D conversion is twice the highest frequency among the n frequencies. It suffices, and let this be f ₀ . This frequency is the writing frequency to the memory 23, the reciprocal thereof is the writing speed, and the unit is word / sec.

The write signal (WRITE CLOCK) 33 having the frequency f ₀ is transmitted from the clock generator 28 configured by the PLL to the microcomputer 31.
The multi-frequency signal 21 that has been output by receiving the command of (1), is input to the analysis unit 22 through the AND gate 29, and is A / D converted is immediately written in the memory 23 as a digital signal that is still multiplexed. When this writing is completed, analysis control signal 32
Becomes inactive, A / D conversion stops, and playback operation starts.

The AND gates 29 and 30 are for prohibiting the output of the read signal (READ CLOCK) 34 from the memory at the time of storage and for the output of the write signal 33 to the memory at the time of reproduction. Also, the capacity of the memory 23 is determined by the time length of the input multi-frequency signal, which is a property that is determined in advance so that there is no excess or deficiency when the time length of the response signal from the slave unit is determined. belongs to. Therefore, it is assumed here that there is no memory loss of the multi-frequency signal waveform due to the lack of the capacity of the memory 23.

In the reproducing operation, first, the composite control signal 35 becomes active and D / A conversion is started. At the same time, the synthesizer 24 receives a command from the microcomputer 31 and receives a clock generator 28.
The read signal 34 is input from the memory 23, data is read from the memory 23 in synchronization with the clock, D / A converted and converted into the original multi-frequency signal of f ₁ , f ₂ , ..., fn, Frequency f
_It is sent to a filter 26 that passes only ₁ . For filter 26, f ₁ ,
Only f ₁ is separated from the frequency components of f ₂ , ..., Fn and sent to the next tone decoder 27. Then, in the tone decoder 27, a signal constituted by on / off of the frequency f ₁ is converted into a logic signal, and this logic signal is input to the microcomputer 31.

The microcomputer 31 decodes this logic signal to know the content of the signal transmitted at the frequency f ₁ , that is, the content of the information transmitted by the cordless handset 1. At this time, the clock frequency of the read signal 34 is the memory. Write signal to 23
The frequency is the same as the frequency f _{0 of} 33.

When the processing on the signal of the frequency f ₁ as described above is finished,
Then, the reproducing operation from the memory 23 is repeated again. However, this time, the frequency of the clock frequency control signal 36 to the clock generator 28 is changed, that is, the frequency of the read signal 34 is changed, and the information possessed by the signal of frequency f ₂ is obtained. Therefore, the frequency of the read signal 34 is f ₁ / f ₂
Xf ₀ , which allows the frequencies f ₁ ′, f ₂ ′, ..., Fn ′ of the multi-frequency signal output from the synthesizing unit 24 to be calculated.
Is the frequency f ₁ , f ₂ , ......, f of the input multi-frequency signal
For n:

Memory input Playback output f ₁ f ₁ ′ ＝ f ₁ × (f ₁ / f ₂ ) f ₂ f ₂ ′ ＝ f ₂ × (f ₁ / f ₂ ) ＝ f ₁ ………… fn fn ′ ＝ fn × ( f ₁ / f ₂ ) Next, using specific numerical values, the frequencies of the components of the write multi-frequency signal 21 are f ₁ = 100, f ₂ = 200, f ₃ = 400, f ₄ = 800. , fn = 1600 Hz and the clock frequency f ₀ of the write signal 33 is 3200 Hz, when the clock frequency of the first read signal 34 is 3200 Hz which is the same as the clock frequency f ₀ of the write signal 33, the synthesizing unit 24
The frequency of each component of the signal D / A converted from is f ₁ ′ = f ₁ = 100, f ₂ ′ = f ₂ = 200, f ₃ ′ = f ₃ = 400, f ₄ ′ = f ₄
= 800, fn ′ ＝ fn = 1600Hz, the frequency f _{1 of the} filter 26
Is set to 100 Hz, the signal of the component of frequency f ₁ ′ is separated and sent to the tone decoder 27.

Set the clock frequency of the second read signal 34 to (f ₁ / f ₂ )
If xf ₀ = 1600 Hz, the frequency of each component of the signal D / A converted from the synthesizing unit 24 is f ₁ ′ = f ₁ × (f ₁ / f ₂ ) = 50, f ₂ ′ = f ₂ × _{(f 1 / f 2) =} 10
0, f ₃ ′ ＝ f ₃ × (f ₁ / f ₂ ) ＝ 200, f ₄ ′ ＝ f ₄ × (f ₁ / f ₂ ) ＝
400, fn '= fn × ( f 1 / f 2) = 800Hz , and the filter 26
Since the frequency f ₁ of the signal is 100 Hz, the signal of the component of the frequency f ₂ ′ is separated and sent to the tone decoder 27.

That is, the input f _1, f ₂ of the multi-frequency signal, ......, f ₂ in fn is at the time of reproduction is being frequency-converted to f ₂ '= f _1. Even if the frequency conversion is performed in this way, the information possessed by the original signal of the frequency f ₂ is not lost, so that the slave unit 2 has it by passing the filter 26 and the tone decoder 27 of the frequency f ₁ of the next stage. The existing information can be known by the microcomputer 31.

By repeating the same operation as many times as the number n set by the frequency component number setting unit 37 and reproducing the signal waveforms of all frequencies, the information held by each slave unit 1, 2, ... All can be known, and the series of processing ends.

<Effects of the Invention> As is clear from the above description of the embodiments, the multifrequency signal waveform processing method according to the present invention is not limited to the multifrequency signal waveform processing.
The data is temporarily stored and then played back sequentially so that they are not performed simultaneously, and at the time of playback for this sequential processing, the reading speed is changed so that all the signals of each frequency component have the same frequency. There is.

Therefore, the processing amount of the calculation unit is not reduced and the processing capacity is not exceeded, and it is not necessary to synchronize the signals of each frequency, and the filter etc. is only compatible with one type of frequency. Since it is good, the circuit configuration can be simplified and the cost can be reduced, the number of frequency components can be increased or decreased, and it is possible to obtain a multi-frequency signal waveform processing device that can flexibly respond to changes in the system configuration. is there.

[Brief description of drawings]

 FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a diagram showing a configuration example of a system, and FIG. 3 is a block diagram of a conventional example. 21 …… Multi-frequency signal, 23 …… Memory 26 …… Filter, 27 …… Tone decoder 28 …… Clock generator, 31 …… Microcomputer,

Claims (1)

[Claims] 1. A frequency division multiplexed signal composed of a plurality of signals each having a different frequency is A / D converted with the waveform as it is multiplexed, and the A / D converted digital signal waveform is a sampling clock. When the multiplexed digital signal stored in the storage means is temporarily stored in the storage means by the D / A converter and reproduced, the signals of the respective multiplexed frequency components are read out at the same frequency. As described above, while changing the clock frequency of the read signal according to the frequency of each frequency component, the reproduction process is repeated a number of times corresponding to the number of frequency components in the multiplexed state, so that all the signals having different frequencies can be obtained. A multi-frequency signal waveform processing method characterized by performing signal processing.