JPH063832B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH063832B2 JPH063832B2 JP60220099A JP22009985A JPH063832B2 JP H063832 B2 JPH063832 B2 JP H063832B2 JP 60220099 A JP60220099 A JP 60220099A JP 22009985 A JP22009985 A JP 22009985A JP H063832 B2 JPH063832 B2 JP H063832B2
- Authority
- JP
- Japan
- Prior art keywords
- insulating plate
- semiconductor device
- semiconductor chip
- thermal stress
- fixed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Description
【発明の詳細な説明】 〔発明の利用分野】 本発明は半導体装置に係り、特に熱伝導に優れた高電力
半導体の放熱構造に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a heat dissipation structure for a high power semiconductor having excellent heat conduction.
従来、自動車用電装品に採用されている大電流のスイッ
チング手段はリレーを多用しているのが現状であるが、
スイチッングスピート、耐久性の点で問題があり順次半
導体式（トランジスタ）に置き替える傾向にある。しか
しスイチッングトランジスタのコレクタ損失は用途によ
って５０〜１００(W)と大きく、かなり大きな放熱構造
を持つヒートシンク及び高熱伝導の絶縁板が必要とな
る。Conventionally, the current switching means of large current used in automobile electrical equipment often uses relays.
There is a problem in terms of switching speed and durability, and there is a tendency to sequentially replace the semiconductor type (transistor). However, the collector loss of the switching transistor is as large as 50 to 100 (W) depending on the application, and a heat sink having a considerably large heat dissipation structure and an insulating plate having high heat conduction are required.
この種対策を施した半導体装置は特開昭55−118641号公
報にて知られている。即ち、該公報ベース（１０）に半
導体素子用絶縁板（３）、モリブデンシート（３１）、
トランジスタチップ（３２）と積み重ね、各々半田を用
いて接合する技術が開示されている。しかし絶縁板とし
て熱伝導率の小さいアルミナを使用しているため、その
部分の熱伝導率が２９（Ｗ／ｍ・Ｋ）と極めて悪いた
め、例えば自動車のエンジンルーム等の周囲温度の高い
雰囲気では、半導体チップの熱損失が小さい（約１０Ｗ
以下）ものでないと実用性がなく、装置の大形化は避け
られず、又半導体チップに熱応力が加わりやすく、半導
体チップの耐久性を落し、信頼性の点で問題があった。A semiconductor device to which this kind of countermeasure is applied is known from Japanese Patent Laid-Open No. 55-118641. That is, a semiconductor element insulating plate (3), a molybdenum sheet (31),
A technique is disclosed in which the transistor chips (32) are stacked and bonded using solder. However, since alumina having a low thermal conductivity is used as the insulating plate, the thermal conductivity of that portion is extremely low at 29 (W / m · K). For example, in an atmosphere with a high ambient temperature such as an automobile engine room. , Heat loss of semiconductor chip is small (about 10W
Unless the following), there is a problem in terms of reliability because the device is not practical and inevitably an increase in size of the device is unavoidable, thermal stress is easily applied to the semiconductor chip, the durability of the semiconductor chip is reduced.
本発明の目的は、小形で、信頼性の高い半導体装置を提
供するにある。An object of the present invention is to provide a small-sized and highly reliable semiconductor device.
本発明は、ヒートシンクを構成する金属ベース上に、絶
縁板を介して固着される半導体チップと、前記絶縁板と
金属ベース間に固着され、該両部材の熱膨張係数差によ
り発生する熱応力緩衝部材とからなる半導体装置であっ
て、前記半導体チップをシリコン系の絶縁板を介してモ
リブデンからなる熱応力緩衝部材に固着させるにある。
これによって、半導体チップにかかる熱応力を抑え、小
形で信頼性の高い半導体装置とすることができる。The present invention is directed to a semiconductor chip fixed on a metal base constituting a heat sink via an insulating plate, and a thermal stress buffer generated by a difference in thermal expansion coefficient between the insulating plate and the metal base. A semiconductor device including a member, wherein the semiconductor chip is fixed to a thermal stress buffer member made of molybdenum via a silicon-based insulating plate.
As a result, the thermal stress applied to the semiconductor chip can be suppressed, and a small and highly reliable semiconductor device can be obtained.
以下本発明の実施例を第１図、第２図に基づき説明す
る。An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.
第１図において、銅等の金属ベースからなるヒートシン
ク１の上面にはモリブデンシート２が銀ロウ付３により
配置固定され、その上面には第２図に示す如く、予め両
面にメッキ層（ニッケルメッキ）４が施されたシリコン
系絶縁板（シリコンカーバイト）５が高温半田６を介し
て溶接固定されている。一方半導体チップ７は前記同様
高温半田８を介して前記絶縁板５に溶接固定されてい
る。In FIG. 1, a molybdenum sheet 2 is arranged and fixed by a silver braze 3 on the upper surface of a heat sink 1 made of a metal base such as copper, and on its upper surface, as shown in FIG. ) 4 is applied to a silicon-based insulating plate (silicon carbide) 5 which is welded and fixed via high-temperature solder 6. On the other hand, the semiconductor chip 7 is welded and fixed to the insulating plate 5 via the high temperature solder 8 as described above.
このように構成される半導体装置はモリブデンプレート
２と絶縁板５と半導体チップ７とを加熱炉等を利用して
高温半田付けした後、前記加熱温度より低い温度で金属
ベース１に銀ロウ付けするのが作業上好ましい。In the semiconductor device configured as described above, the molybdenum plate 2, the insulating plate 5, and the semiconductor chip 7 are soldered at high temperature using a heating furnace or the like, and then silver brazed to the metal base 1 at a temperature lower than the heating temperature. Is preferable in terms of work.
前記シリコンカーバイト系絶縁板５は別表のとおり、熱
伝導率がアルミナの約１０倍の２６７（Ｗ／ｍ・Ｋ）で
あり、金属並の熱伝導率を有している。この絶縁板の表
面は、他部品であるモリブデンシート２及び半導体チッ
プ７と半田接合できるようにニッケルメッキ４が施され
ている。そして前記モリブデンシート２は熱膨張係数差
の大きい金属ベース（銅）１に銀ロウ付けにより強固に
固着されて、熱応力に対して耐久性のある構造となって
いる。As shown in the attached table, the silicon carbide insulating plate 5 has a thermal conductivity of 267 (W / m · K), which is about 10 times that of alumina, and has a thermal conductivity comparable to that of metal. The surface of this insulating plate is plated with nickel 4 so that it can be soldered to the molybdenum sheet 2 and the semiconductor chip 7 which are other components. The molybdenum sheet 2 is firmly fixed to the metal base (copper) 1 having a large difference in thermal expansion coefficient by silver brazing, and has a structure having durability against thermal stress.
従ってこのように金属ベース１とモリブデンシート２を
銀ロウ付けして膨張係数の小さいモリブデンシートを強
固に固着しているため、他の材料間、即ちモリブデンシ
ートとシリコン絶縁板間では熱膨張係数差が小さくな
り、熱応力が発生しにくい構成となる。これによって他
の部品相互間を通常の高温半田（鉛：錫：銀＝９５：
３．５：１．５）で半田付けしても熱応力による剥離現
象を受けにくく、耐久性を上げることができる。Therefore, since the metal base 1 and the molybdenum sheet 2 are brazed with silver in this manner to firmly bond the molybdenum sheet having a small expansion coefficient, the difference in thermal expansion coefficient between other materials, that is, between the molybdenum sheet and the silicon insulating plate. Becomes smaller and thermal stress is less likely to occur. As a result, normal high-temperature solder (lead: tin: silver = 95:
Even if it is soldered at 3.5: 1.5), it is less susceptible to the peeling phenomenon due to thermal stress, and the durability can be improved.
ところで、半導体チップの大きさが５（面積＝２５m
m2）の場合の熱抵抗は、下記のようになる。 By the way, the size of the semiconductor chip is 5 (area = 25 m
The thermal resistance for m 2 ) is as follows.
上記より、絶縁板としてアルミナを使用した場合の総熱
抵抗 θj.cu＝θjsi＋θMO＋θアルミナ＋θcu＝１．２８〔deg/W〕 ＳＩＣでは、 θj.cu＝θjsi＋θsIC＋θMO＋θcu＝０．５４〔deg/W〕 となり、通常のアルミナに比べて、約３倍の熱伝導の良
い放熱構造を実現できる。 From the above, the total thermal resistance when alumina is used as the insulating plate θ j.cu = θ jsi + θ MO + θ alumina + θ cu = 1.28 [deg / W] In SIC, θ j.cu = θ jsi + θ sIC + θ MO + θ cu = 0.54 [deg / W], which makes it possible to realize a heat dissipation structure with good heat conduction, which is about three times that of ordinary alumina.
具体的に、半導体チップの損失が５０Ｗの時には、銅ベ
ースに対するチップの温度Ｔjは、 （Ｔcu：銅ベース下面の温度） アルミナの場合 Ｔj＝１．２８×５０＋Ｔcu＝６４＋Ｔcu（度） シリコンカーバイトの場合 Ｔj＝０．５４×５０＋Ｔcu＝２７＋Ｔcu（度） となる。Specifically, when the loss of the semiconductor chip is 50 W, the temperature T j of the chip with respect to the copper base is (T cu : temperature of the lower surface of the copper base) in the case of alumina T j = 1.28 × 50 + T cu = 64 + T cu (degree ) In the case of silicon carbide, T j = 0.54 × 50 + T cu = 27 + T cu (degree).
従って、アルミナとシリコンカーバイトでは、半導体の
ジャンクション温度を約３７度下げられる。逆に言う
と、シリコンカーバイトの場合には、銅ベースの周囲温
度を３７度高い所でも使用できるという効果がある。Therefore, with alumina and silicon carbide, the junction temperature of the semiconductor can be lowered by about 37 degrees. Conversely, in the case of silicon carbide, there is an effect that it can be used even in a place where the ambient temperature of the copper base is 37 degrees higher.
以下本発明の実施例によれば、 １ 高熱伝導絶縁板を使用することにより、ヒートシン
クの構造（ヒートシンクの表面積）を小形化できるた
め、省資源構造となる。According to the following embodiments of the present invention, the structure of the heat sink (surface area of the heat sink) can be downsized by using the high thermal conductive insulating plate, resulting in a resource saving structure.
２ 半導体チップと絶縁板の材質が、共にシリコンのた
め、半導体チップに熱応力が加わりにくく、耐久性が得
られ、信頼性の高い製品となる。2 Since both the semiconductor chip and the insulating plate are made of silicon, thermal stress is less likely to be applied to the semiconductor chip, durability is obtained, and the product is highly reliable.
３ 半導体の直下に絶縁板を半田付けするため高電位部
が半導体チップ上と限られ、絶縁板以下をアースとする
ことができ、ケーシングが容易な構造となる。3 Since the insulating plate is soldered directly under the semiconductor, the high-potential portion is limited to above the semiconductor chip, and the part below the insulating plate can be grounded, and the casing has a simple structure.
４ 銅ヒートシンクと半導体チップは、熱膨張係数が約
１０倍違ってるが、この熱膨張係数差を、引張り強さの
大きい金属（モリブデンと銅）間で銀ロウ付けすること
で解消することができ、他の材料（半導体チップ、絶縁
板、モリブデン）間では、熱応力が発生しにくい構成と
することができる。このため、接合部（半田）の信頼性
を高められる効果がある。4 The coefficient of thermal expansion differs between copper heat sink and semiconductor chip by about 10 times, but this difference in coefficient of thermal expansion can be eliminated by silver brazing between metals with high tensile strength (molybdenum and copper). In addition, thermal stress is unlikely to occur between other materials (semiconductor chip, insulating plate, molybdenum). Therefore, there is an effect that the reliability of the joint portion (solder) can be improved.
以上本発明によれば、小形で、信頼性の高い半導体装置
が得られる。As described above, according to the present invention, a small-sized and highly reliable semiconductor device can be obtained.
図面は本発明半導体装置の一実施例を示すもので、第１
図は一部断面した側面図、第２図は第１図の要部拡大図
である。 １…ヒートシンク、２…モリブデンシート、３…金ロ
ウ、４…メッキ層、５…シリコン系絶縁板、６…高温半
田、７…半導体チップ。The drawings show one embodiment of the semiconductor device of the present invention.
The drawing is a side view with a partial cross section, and FIG. 2 is an enlarged view of a main part of FIG. DESCRIPTION OF SYMBOLS 1 ... Heat sink, 2 ... Molybdenum sheet, 3 ... Gold solder, 4 ... Plating layer, 5 ... Silicon type insulating plate, 6 ... High temperature solder, 7 ... Semiconductor chip.
Claims (3)
絶縁板を介して固着される半導体チップと、前記絶縁体
と金属ベース間に固着され、該両部材の熱膨張係数差に
より発生する熱応力緩衝部材とからなる半導体装置にお
いて、絶縁半導体チップはシリコン系の絶縁板を介して
モリブデンからなる熱応力緩衝部材に固着されているこ
とを特徴とした半導体装置。1. A metal base constituting a heat sink,
In a semiconductor device including a semiconductor chip fixed via an insulating plate and a thermal stress buffer member fixed between the insulator and the metal base, the insulating semiconductor chip is made of silicon. A semiconductor device characterized in that it is fixed to a thermal stress buffering member made of molybdenum via a system insulating plate.
板はシリコンカーバイトからなることを特徴とした半導
体装置。2. A semiconductor device according to claim 1, wherein the insulating plate is made of silicon carbide.
トシンクは銅ベースからなり、熱応力緩衝部材を構成す
るモリブデンと銀ロウ付けにより固着されていることを
特徴とした半導体装置。3. A semiconductor device according to claim 1, wherein the heat sink is made of a copper base and is fixed by molybdenum and silver brazing constituting the thermal stress buffering member.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60220099A JPH063832B2 (en) | 1985-10-04 | 1985-10-04 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60220099A JPH063832B2 (en) | 1985-10-04 | 1985-10-04 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6281047A JPS6281047A (en) | 1987-04-14 |
| JPH063832B2 true JPH063832B2 (en) | 1994-01-12 |
Family
ID=16745903
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60220099A Expired - Lifetime JPH063832B2 (en) | 1985-10-04 | 1985-10-04 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH063832B2 (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01185929A (en) * | 1988-01-20 | 1989-07-25 | Mitsubishi Electric Corp | Assembling of semiconductor device |
| JPH02271558A (en) * | 1989-04-12 | 1990-11-06 | Mitsubishi Electric Corp | Semiconductor device and its manufacture |
| DE4315272A1 (en) * | 1993-05-07 | 1994-11-10 | Siemens Ag | Power semiconductor component with buffer layer |
| US6577687B2 (en) | 1998-12-23 | 2003-06-10 | Maxtor Corporation | Method for transmitting data over a data bus with minimized digital inter-symbol interference |
| JP4487881B2 (en) * | 1999-03-24 | 2010-06-23 | 三菱マテリアル株式会社 | Power module substrate manufacturing method |
| JP2010245174A (en) | 2009-04-02 | 2010-10-28 | Denso Corp | Electronic control unit and method of manufacturing the same |
-
1985
- 1985-10-04 JP JP60220099A patent/JPH063832B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6281047A (en) | 1987-04-14 |
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