JPH06349009A - Digital vtr - Google Patents

Abstract

PURPOSE:To record digital data supplied with plural different data rates. CONSTITUTION:Digital data supplied via an antenna 1 is supplied to an interface 7. A buffer is provided in the interface 7 and data is stored in this buffer. Data outputted from the buffer is supplied to an interface 8. The output data of the interface 8 is recorded on a magnetic tape via a parity generator 9, a channel encoder 10 and an output terminal 11. The magnetic tape is intermittently traveled corresponding to the data rate of data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital VTR capable of recording digital data supplied at different data rates.

[0002]

2. Description of the Related Art There is known a digital VTR which records transmitted digital image data and digital audio data on a recording medium such as a magnetic tape and reproduces the digital data recorded on the recording medium.

An example of a circuit block diagram of such a digital VTR is shown in FIG. In FIG. 13, in the digital data recording system, the digital data passed through the input terminal 101 is subjected to predetermined processing in the recording processing circuit 102. The parity of the product code configuration generated in the parity generation circuit 103 is the recording processing circuit 1
02 output data. A sync code and an ID are added to the data to which the parity has been added in the sync and ID generation circuit 104. The output data of the sync and ID generation circuit 104 is the channel encoder 105.
In, parallel / serial conversion and conversion to recording code are performed. This data is amplified by the amplifier 106 and then recorded on the magnetic tape 109 via the recording side terminal R of the switch 107 and the magnetic head 108.

Further, in the reproducing system of image data and audio data in the digital VTR, the magnetic tape 109 is used.
The recording data recorded in (1) is supplied to the amplifier and equalizer 110 via the magnetic head 108 and the reproducing side terminal P of the switch 107, and is amplified and the frequency characteristic is corrected. The output data of the amplifier and equalizer 110 is subjected to recording code decoding and serial / parallel conversion in the channel decoder 111, and the sync and ID detection circuit 1
12 are supplied. The sync and ID detection circuit 112 detects the sync code and ID in the data and supplies them to the TBC (Time Base Correcter) circuit 113 together with the reproduced data. In the TBC circuit 113, the time base fluctuation for the data is removed. The output data of the TBC circuit 113 is subjected to error correction processing using a product code in the ECC circuit 114, and then is output to the output terminal 11 via the reproduction processing circuit 115.
6 is supplied.

By the way, the tape format of the digital VTR is configured as shown in FIG. 14, for example. That is, from the scanning direction (left end) of the head (not shown) of the digital VTR, the margin area 1, ATF and T
(Track) sync area, IBG (inter block gap) area 1, audio data area, IBG
Area 2, video data area, IBG area 3, subcode area, and margin area 2 are arranged in this order. An amble area is inserted between the above areas.

The IBG is provided as an area for ensuring a post-recording margin. Note that IBG does not record data. A pulse signal having a frequency equal to the bit frequency of the recording data is recorded in each amble area. This pulse signal is used to lock the PLL circuit for extracting the bit clock provided on the reproducing side. Margin 1 and margin 2 are areas for dealing with the case where the track formation position changes due to jitter.

A magnetic tape for a digital VTR is shown in FIG.
Scanned by a head as shown in FIG. That is, as shown in the figure, a drum having four heads in which the head A1 and the head B0 face each other and the head B1 and the head A0 face each other is rotated 9000 times per minute. It is recorded at a predetermined position on the tape. For example, 10 tracks are assigned to record one frame of video data.

[0008]

By the way, normal recording (hereinafter referred to as SD) is performed on the video data portion of the magnetic tape.
Mode), video data is recorded at a recording rate of 24.948 Mbps. In variable speed recording, for example, when recording is performed at a speed twice as fast as normal recording (hereinafter, referred to as HD mode), data is recorded at a recording rate of 49.896 Mbps. Further, recording (long-time mode) at a recording data rate (12.474 Mbps) that is 1/2 of the data rate recorded when using the SD mode is considered. Furthermore, about 1 Mbps to 10 Mbps
Up to now, a digital VTR for recording data compressed at various data rates has been considered.

As described above, when the video data supplied at different data rates, for example, the video data of 5 Mbps is recorded at the recording rate in the above long time mode, about 7.
Useless data is recorded in the video data area of 5 Mbps (12.474 Mbps-5 Mbps). In other words, if the video data area should have 12.
Video data of 474 Mbps can be recorded,
In reality, less than half the data area will be used. In addition, recording useless data shortens the recordable time of the magnetic tape.

Therefore, an object of the present invention is to record video data to be recorded at an optimum data rate,
Accordingly, it is to provide a digital VTR capable of increasing the recordable time.

[0011]

SUMMARY OF THE INVENTION The present invention provides a digital VTR adapted to record digital data supplied at a plurality of different data rates on a magnetic tape.
The digital VTR is characterized in that digital data is stored in a buffer, and the digital data stored in the buffer is recorded on a magnetic tape at every predetermined cycle of head switching timing switched by a head switching timing signal.

[0012]

The magnetic tape is intermittently fed with digital data supplied at different data rates according to the data rates. This makes it possible to use the magnetic tape without waste when recording data on the magnetic tape.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a block diagram when a digital VTR according to the present invention is connected to a digital television. In FIG. 1, the block indicated by A is a digital television, and the digital video data and audio data obtained from the antenna 1 are supplied to the demodulator 2, and the base band in the data is demodulated. The output data of the demodulator 2 is FEC (Foward
Error Correction) circuit 3 is supplied. The FEC circuit 3 corrects the error in the data generated on the transmission path. The output data of the FEC circuit 3 is the video decoder 4
Is expanded and decoded into image data. The image data output from the video decoder 4 is D / A converted by the D / A converter 5 and then supplied to the video output terminal 6 to be monitored (not shown) as analog image data.
Is supplied to.

Here, when recording the data input through the antenna 1 in the digital VTR shown in B, FE
The output of the C circuit 3 is supplied to the interface 7. At the interface 7, the data is converted into a digital interface protocol. Further, the interface 7 is provided with, for example, a buffer (not shown), and the output of the FEC circuit 3 is temporarily stored by this buffer and is supplied to the interface 8 of the digital VTR at a predetermined output timing. The data supplied to the interface 8 is converted into a data string suitable for recording and then supplied to the parity generator 9. Parity generator 9
The data to which the parity required for error prevention is added is modulated by the channel encoder 10, and the magnetic tape (not shown) is supplied from the terminal 11 via the recording amplifier and the head.
Recorded in.

When reproducing the data recorded in this way, the data is supplied to the terminal 12 via a magnetic head or a reproducing amplifier (not shown). The reproduced data passed through the terminal 12 is demodulated by the channel decoder 13. In the ECC circuit 14, the channel decoder 13
The error that occurred at the time of recording is corrected for the output data of. The output of the ECC circuit 14 is supplied to the video decoder 4 via the interfaces 8 and 7. In the video decoder 4, the supplied data is processed in the same manner as described above, converted into analog image data by the D / A converter 5, and then supplied to the video output terminal 6.

By the way, the digital VT according to the present invention
In addition to digital data, current image data may be input to R from a video camera (not shown) or the like, and it is possible to input current television analog data from the antenna 1. To be done. For example, analog data input from the video camera is supplied to the compression circuit 16 via the terminal 15. The data compressed by the compression circuit 16 is sent to the recording amplifier via the interface 8, the parity generator 9 and the channel encoder 10. Also, when playing back the video camera data recorded on the tape, the data output from the playback amplifier is
It is supplied to the decompression circuit 17 via the channel decoder 13, the ECC circuit 14 and the interface 8. Expansion circuit 1
The data which has been subjected to the predetermined processing in 7 is supplied to the video output terminal 6 via the terminal 18.

By the way, the interface 7 in FIG.
The data rate of the data at the output of the
If the data rate is lower than R, the data can be recorded using a digital VTR.

A detailed block diagram of the compression circuit 16 is shown in FIG. In FIG. 2, input terminals 21A and 21B
And 21C, the digital luminance data Y formed from the three primary color signals R, G and B and the digital color difference signals U and V are supplied. In this case, the clock rate of each data is 13.5 MHz or 6.75 MHz. The number of bits for each sample is 8 bits.

Of this data, the blanking period data is removed, and the effective information extraction circuit 22 for extracting only the information of the effective area compresses the data amount. Of the output of the valid information extraction circuit 22, the luminance data Y is supplied to the frequency conversion circuit 23, and the sampling frequency is 1
It is converted to a frequency of 3/4 of 3.5 MHz. The frequency conversion circuit 23 is composed of, for example, a thinning filter so that aliasing distortion does not occur. Frequency conversion circuit 23
With respect to the output of, the order of the luminance data is converted into the order of blocks by the blocking circuit 24. Blocking circuit 24
The data blocked by is supplied to the block encoding circuit 8.

Also, of the outputs of the effective information extraction circuit 22, two color difference data U and V are supplied to the sub-sampling and sub-line circuit 26, and the sampling frequency is converted into each half of 6.75 MHz. After that, these data are alternately selected for each line and combined into one-channel data. Therefore, the line-sequentialized digital color difference data is output from the sub-sample and sub-line circuit 26.

The output data of the sub-sample and sub-line circuit 26 is converted into data in the order of blocks in the blocking circuit 27. This blocking circuit 27
Is similar to the blocking circuit 24, the color difference data is 8 × 8.
Convert to pixel block structure. The output data of the blocking circuits 24 and 27 are supplied to the synthesizing circuit 25.

In the synthesizing circuit 25, the luminance data Y and the color difference data U and V converted in the order of blocks are synthesized into data for one channel. The output data of the synthesis circuit 25 is supplied to the block encoding circuit 28. As the block coding circuit 28, a coding circuit (ADRC) adapted to the dynamic range of each block, a DCT circuit, or the like can be applied. The output data of the block encoding circuit 28 is
It is supplied to the framing circuit 29. Framing circuit 29
Then, the image system clock and the recording system clock are exchanged. The output of the framing circuit 29 is supplied to the interface 8 via the output terminal 30.

A detailed block diagram of the decompression circuit 17 is shown in FIG. In FIG. 3, the data output from the interface 8 is supplied to the frame decomposing circuit 32 via the input terminal 31. The frame decomposition circuit 32 decomposes each component of the block coded data of the video data, and the output thereof is supplied to the block decoding circuit 33. The block decoding circuit 33 decodes the restored data corresponding to the original data for each block.

The decoded output data of the block decoding circuit 33 is supplied to the distribution circuit 34 and separated into luminance data Y and color difference data U and V. The luminance data Y is stored in the block decomposition circuit 35, and the color difference data U and V are stored in the block decomposition circuit 3.
8 respectively. Block decomposition circuits 35 and 3
In 8, the decoding data in the order of blocks is converted into the order of raster scanning, contrary to the blocking circuits 24 and 27 on the recording side.

The decoded luminance data of the block decomposition circuit 35 is supplied to the interpolation filter 36. Interpolation filter 36
Then, the sampling rate of the luminance data Y is 3fs (f
s is a color subcarrier frequency) and 4fs (4fs =
13.5 MHz). The brightness data Y of the interpolation filter 36 is output to the output terminal 37A.

Further, the color difference data U and V of the distribution circuit 34
Is supplied to the block decomposing circuit 38 and decomposed into line-sequential color difference data U and V. The separated color difference data U and V are supplied to the interpolation circuit 40 via the distribution circuit 39. The interpolation circuit 40 interpolates the color difference data U and V, respectively. Specifically, the interpolation circuit 4
0 interpolates the data of the thinned pixels using the restored video data. From the interpolation circuit 40, digital color difference data U and V having a sampling rate of 4fs are supplied to the output terminals 37B and 37C.

By the way, when digital data is recorded using the above digital VTR, data of a plurality of different recording rates is input. That is, in the HD recording mode, data is recorded at the recording rate of 49.896 Mbps. In SD mode (shift record),
Video data of 24.948 Mbps is recorded in the video data area of the magnetic tape. In addition, when the SD mode is used, the rate of half the data recorded (1
2.474 Mbps) recording mode (hereinafter referred to as the first long-time mode), or about 1 Mbps to 10 Mbps
A mode for recording compressed data at various data rates up to is considered.

With respect to these various modes, in the present invention, the magnetic tape is intermittently fed according to the input data rate, and data is recorded via the head. A data recording method for a magnetic tape corresponding to each mode is shown in FIGS. In each recording method of FIGS. 4 to 11, (a) is a head switching pulse,
Digital data is recorded on the magnetic tape by the head according to the switching timing of the head switching pulse. In each drawing, (b) shows print data of the head A, and (c) shows print data of the head B, respectively. In (b) and (c), the hatched area is an area where data recording is not performed. That is,
This is an area where useless data is recorded when the magnetic tape is not intermittently fed. On the other hand, data recording is performed in areas other than the shaded areas. As the magnetic head for scanning the magnetic tape, the same head as shown in FIG. 15 is used.

FIG. 4 shows the HD mode (49.896 Mbp).
When recording video data supplied at a recording rate of s) on a magnetic tape (the tape speed at this time is 2X)
It is a diagram showing a recording method of. In FIG. 4, every time the head switching pulse changes from H level to L level,
Data is recorded on the A channel and the B channel.
As is clear from this figure, in the first H level section of the head switching pulse, the data A0 by the head A0 is on the A channel and the head B0 is on the B channel.
Thus, the data B0 is recorded respectively. In the first L level section of the head switching pulse, the data A1 is recorded in the A channel by the head A1 and the data B1 is recorded in the B channel by the head B1.
Further, in the second H level section of the head switching pulse, the data A0 is recorded in the A channel and the data B0 is recorded in the B channel. This makes SD
It is possible to record twice as much data as in the mode.

FIG. 5 shows the SD mode (24.948 Mbp.
It is a figure which shows the recording system at the time of recording the video data (the tape speed at this time is X) supplied at the recording rate of s) on a magnetic tape. In FIG. 5, in the first H level section of the head switching pulse, data A0 is recorded in the A channel and data B0 is recorded in the B channel. In the first L level section of the switch pulse, no data is recorded on the A channel and the B channel. Also, the second H of the head switching pulse
In the level section, the data A0 is on the A channel,
Data B0 is recorded in each B channel.

FIG. 6 shows the first long mode (12.4).
When recording video data supplied at a recording rate of 74 Mbps) on a magnetic tape (the tape speed at this time is X
The recording method of / 2) is shown. In FIG. 6, in the first H level section of the head switching pulse, data A0 is recorded in the A channel and data B0 is recorded in the B channel. First L of head switching pulse
In the level section, the second H level section, and the second L level section, no data is recorded in the A channel and the B channel. Next, in the third H level section of the head switching pulse, data A0 is recorded in the A channel and data B0 is recorded in the B channel.

FIG. 7 shows a second long time mode (8.31).
When recording video data supplied at a recording rate of 6 Mbps) on a magnetic tape (the tape speed at this time is X /
The recording method of 3) is shown. In FIG. 7, in the first H level section of the head switching pulse, data A0 is recorded in the A channel and data B0 is recorded in the B channel. In the first L level section and the second H level section of the head switching pulse, no data is recorded in the A channel and the B channel.
Next, in the second L level section of the head switching pulse, data A1 is recorded in the A channel and data B1 is recorded in the B channel.

FIG. 8 shows a third long time mode (about 4.9).
A recording method for recording video data supplied at 89 Mbps on a magnetic tape (the tape speed at this time is X / 5) is shown. In FIG. 8, in the first H level section of the head switching pulse, the data A0 is recorded in the A channel and the data B0 is recorded in the B channel. In the first and second L level sections and the second and third H level sections of the head switching pulse, no data is recorded in the A channel and the B channel. Next, in the third L level section of the head switching pulse, the data A1 is recorded in the A channel and the data B1 is recorded in the B channel.

FIG. 9 shows the fourth long time mode (4.15).
A recording method for recording video data supplied at 8 Mbps) on a magnetic tape (the tape speed at this time is X / 6) is shown. In FIG. 9, data A0 is recorded in the A channel and data B0 is recorded in the B channel in the first H level section of the head switching pulse. First, second and third L of the head switching pulse
No data is recorded in the A channel and the B channel in the level section and the second and third H level sections. In the fourth H level section of the head switching pulse, data A0 is recorded in the A channel and data B0 is recorded in the B channel.

FIG. 10 shows a fifth long time mode (2.0
A recording method is shown for recording video data supplied at 79 Mbps) on a magnetic tape (the tape speed at this time is X / 12). In FIG. 10, in the first H level section of the head switching pulse, data A0 is recorded in the A channel and data B0 is recorded in the B channel. The first, second, third, fourth, fifth and sixth L level sections of the head switching pulse and the second, third,
No data is recorded on the A channel and the B channel in the fourth, fifth, and sixth H level sections. In the seventh H level section of the head switching pulse, data A0 is on the A channel and data B is on the B channel.
0 is recorded respectively.

FIG. 11 shows the sixth long time mode (3.5
A recording method is shown when recording video data supplied at 64 Mbps) on a magnetic tape (the tape speed at this time is X / 7). In FIG. 11, in the first H level section of the head switching pulse, the data A0 is recorded in the A channel and the data B0 is recorded in the B channel. First, second and third head switching pulses
In the L level section and the second, third and fourth H level sections, no data is recorded in the A channel and the B channel. In the fourth L level section of the head switching pulse, data A1 is recorded in the A channel and data B1 is recorded in the B channel.

As described above, even when the video data is supplied at a plurality of different data rates, the magnetic tape is intermittently fed at the timing of generation of the head switching pulse, and the amount of the intermittently fed tape amount (see FIGS. 4 to 11). Data can be recorded without wasting the magnetic tape by recording the data only in the area other than the hatched area in FIG. Instead of intermittently feeding the magnetic tape, the feeding speed of the magnetic tape may be adjusted according to the data rate of the supplied digital data.

FIG. 12 shows details of the recording timing in the recording head in the third long time mode.
In FIG. 12, the heads to be used are switched by the head switching pulse shown in (a). Further, in the buffer provided in the interface 7, the data rate is stored at, for example, 10 Mbps as shown in (b). The output of the interface 7 is supplied to the interface 8. At this time, the data is supplied from the buffer to the interface 8 at the read timing as shown in (c). At this read timing, the data as shown in (d) is read.
This data is recorded on the magnetic tape as shown in (e) and (f) by a predetermined recording method (in this case, the tape speed which is ⅕ of that at the time of normal recording).

[0039]

According to the present invention, when digital data is supplied at a plurality of different data rates, the magnetic tape is intermittently fed at the data rates to record the data. As a result, the magnetic tape can be used without waste. Therefore, the recording time of the magnetic tape can be extended.

[Brief description of drawings]

FIG. 1 is a block diagram when a digital VTR according to the present invention is connected to a digital television.

FIG. 2 is a detailed block diagram of a compression circuit.

FIG. 3 is a detailed block diagram of a decompression circuit.

FIG. 4 is a diagram showing a method of recording data on a magnetic tape.

FIG. 5 is a diagram showing a method of recording data on a magnetic tape.

FIG. 6 is a diagram showing a method of recording data on a magnetic tape.

FIG. 7 is a diagram showing a method of recording data on a magnetic tape.

FIG. 8 is a diagram showing a method of recording data on a magnetic tape.

FIG. 9 is a diagram showing a method of recording data on a magnetic tape.

FIG. 10 is a diagram showing a method of recording data on a magnetic tape.

FIG. 11 is a diagram showing a data recording method on a magnetic tape.

FIG. 12 is a diagram showing details of the recording timing of data in the recording head.

FIG. 13 is a diagram showing an example of a circuit block diagram of a conventional digital VTR.

FIG. 14 is a diagram showing a tape format of a digital VTR.

FIG. 15 is a diagram showing a head configuration of a digital VTR.

[Explanation of symbols]

 7, 8 Interface 16 Compression circuit 17 Expansion circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yukio Kubota 6-735 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation

Claims (3)

[Claims] 1. A digital VTR in which digital data supplied at a plurality of different data rates are recorded on a magnetic tape, the digital data is stored in a buffer, and the digital data stored in the buffer is a head. A digital VTR, which is recorded on the magnetic tape at a predetermined cycle of head switching timing switched by a switching timing signal. 2. The digital VT according to claim 1, wherein the predetermined period is variable according to the data rate.
R. 3. The digital VTR according to claim 1, wherein the magnetic tape is delivered intermittently based on the data rate.