JPH06275739A - Adaptor made of ceramics, and ceramic package - Google Patents

Abstract

PURPOSE: To provide a hexahedral ceramic package for housing a semiconductor chip which can be packaged in high density. CONSTITUTION: The ceramic package is formed of a plurality of laminated low temperature baked ceramic sheet 12. The package comprises containers 42A, 42B formed on upper and lower surfaces to contain a semiconductor chip, a connector 18B electrically connected to the chip and formed in the container, a plurality of lands 14 formed on the lower surface, and a semiconductor circuit 16 formed therein to electrically connect the connectors 18A, 18B or the connectors 18A, 18B to each other.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic adapter and a ceramic package, which are made of low temperature fired ceramic sheets and have a novel structure.

[0002]

2. Description of the Related Art With the miniaturization and high performance of electronic equipment, high-density mounting of semiconductor elements has become important. Further, there is a demand for higher density and higher integration of semiconductor elements and the like, and along with this, the number of input / output terminals increases, and at the same time, the amount of heat generated by semiconductor chips tends to increase. In order to meet these requirements, a package for mounting a semiconductor chip is required to have the following characteristics, for example. (A) Excellent thermal characteristics such as heat dissipation and heat resistance (B) Excellent electrical characteristics such as low internal wiring resistance of the package and low dielectric constant of the material forming the package (C) High reliability (D) Efficient, high-density and high-reliability connection to other circuits (E) Small size Further, as the operating speed of semiconductor elements increases, semiconductor chips Also for the package that accommodates the package, there are increasing demands that the transmission signal deterioration due to impedance mismatch is small and the signal propagation speed is fast. One type of semiconductor package that can satisfy such various requirements is a land grid array (hereinafter abbreviated as LGA) package in which a plurality of ceramic sheets are stacked.

At present, alumina is mainly used as a material for the LGA package. The LGA package can be usually manufactured by the following method.

First, a green sheet formed by adding a predetermined organic binder (binder) and a plasticizer to a raw material alumina powder is processed into a predetermined size, and punched or the like to make holes for through holes or via holes. Apply processing. Next, a metal paste made of tungsten or molybdenum (hereinafter referred to as refractory metal) is screen-printed on the green sheet to form a conductor circuit portion including a through hole or a via hole, a land portion for connection with an external terminal or an electrode, And forming a wire bonding portion and the like. After producing a predetermined number (usually 3 to 8 layers) of such green sheets, they are stacked and then subjected to a reduction atmosphere of hydrogen gas or the like at about 1500.
Simultaneous firing at a high temperature of ~ 1600 ° C. Then, the land portion and the wire bonding portion are plated with gold or nickel, and finally the plated terminal portion is cut.

In the conventional LGA package manufacturing technique, in order to prevent melting at the time of simultaneous firing at high temperature,
A metal paste made of a refractory metal is used. The refractory metal has a high resistance value, and it is difficult to wire-bond or solder the surface of the refractory metal with a gold wire or the like. Therefore, it is indispensable to apply gold plating or nickel plating to the land portion and the wire bonding portion after the high temperature co-firing. In order to perform such plating, a plating electrode layer 108 is required as shown in the schematic sectional view of FIG. 14, and this plating electrode layer is left in the package even after the package is completed. In FIG. 14, 100 is a ceramic layer, 102 is a conductor circuit section, 104 is a wire bonding section, and 106 is a plating layer formed on the wire bonding section.

When this LGA package is mounted on a printed wiring board, usually, both are electrically and mechanically connected by using solder, or a plastic or metal electrically and mechanically connected to the printed wiring board. Attach the LGA package to the configured socket.

In an LGA package for a digital IC, for example, generally, 1 to 2 signal line layers, 2 to 6 power supply layers or ground layers, an input / output layer forming an interface with a printed wiring board, and a resistor. 3-8 layers or more, such as a layer for mounting a capacitor or a capacitor, a wiring layer for a resistor or a capacitor, a layer for mounting a heat sink, a layer for mounting a semiconductor chip, a layer for mounting a lid, etc. It is necessary to stack ceramic sheets.

On the other hand, as a method of mounting a bare chip of a semiconductor IC having a relatively large number of input / output pads on a printed wiring board, a TAB (Tape Automated Bonding) method is known in addition to a wire bonding method and a flip chip method. There is. The film carrier used in the TAB system is composed of, for example, an insulating layer made of a polyimide film and a conductor layer made of a circuit of copper foil formed on one side or both sides of the polyimide film. The bare chip and the printed wiring board are electrically connected by a conductor layer formed on the film carrier.

Since the resistance value of the conductor layer made of copper foil is low, the loss of signals passing through the conductor layer which is the transmission line is small, and the relative dielectric constant of polyimide is as low as about 4, so that the electric conductivity of the conductor layer which is the transmission line is low. The length can be shortened. When the circuit length of the conductor layer is L and the effective dielectric constant is εeff, the electrical length is represented by L × √εeff.

Further, in the TAB method, a microstrip line structure can be formed by forming conductor layers on both surfaces of an insulating layer, and it becomes possible to control the characteristic impedance of the transmission line, which results in high speed. The signal transmission can be dealt with.

[0011]

The conventional LGA package has the following problems because it contains alumina as a main component.

That is, since a plating process is required in the manufacturing process of the LGA package, the manufacturing process of the LGA package is increased. Moreover, since the plating electrode layer 108 is required, there is a problem that the number of layers of the green sheets to be laminated and the number of manufacturing steps thereof increase. In addition, the plating electrode layer 10 remaining in the LGA package
8 is a so-called open stub when the semiconductor chip operates. As a result, the high-frequency signal is reflected by the plating electrode layer 108, which causes a problem of deterioration of high-frequency characteristics such as deterioration of transmission signal waveform.

The conventional L mainly composed of alumina
The GA package has a high relative permittivity ε of about 10 and has a problem that problems such as signal propagation delay, dielectric loss, and crosstalk are likely to occur.

Further, the conventional semiconductor package made of a green sheet containing alumina as a main component has the following mounting problem.

That is, usually, the semiconductor package is planarly mounted on the printed wiring board. Therefore, there is a problem that the semiconductor package occupies a large area on the printed wiring board. Further, in such a mounting method, the distance between the semiconductor packages becomes long, and the signal transmission distance becomes long. As a result, the signal delay increases. Moreover, semiconductor packages / printed wiring boards /
The signal transmission path formed by the semiconductor package has a total of two between the semiconductor package and the printed wiring board.
Since impedance discontinuities are formed at some places, there is also a problem in that when a high speed signal is transmitted, the transmitted signal waveform is disturbed.

As a means for increasing the mounting density of semiconductor chips, a method of vertically stacking a plurality of LGA packages accommodating semiconductor chips can be considered, but an LGA package suitable for such a method is not known. . Moreover, when an LGA package is manufactured by using a green sheet containing alumina as a main component, the relative dielectric constant of alumina is as high as about 10, so that the electrical length of the transmission line becomes long, and a plurality of LGA packages accommodating semiconductor chips are provided. If they are stacked in the vertical direction, the effective electrical length between the semiconductor chips becomes long and the signal propagation delay becomes a problem.

On the other hand, as another means for increasing the packaging density of the semiconductor chips, a plurality of semiconductor chips are combined into one LG.
A method of storing in an A package can be considered. However, a wiring layer for connecting the semiconductor chips to each other is further required, and when an LGA package is manufactured using a green sheet containing alumina as a main component, the number of wiring layers in the LGA package required for the design is reduced. There is a shortage problem.

Furthermore, when the design of the semiconductor chip housed in the LGA package is changed or a new semiconductor chip is used, the following problems occur.

That is, in such a case, usually, the allocation of signals, input / output or power supply to the input / output terminal portion of the LGA package in the semiconductor chip is also changed. Therefore,
It is also necessary to change the design of the conductor circuit portion formed in the LGA package, and as a result, it is necessary to change the circuit design of the entire printed wiring board.

In the pin grid array (PGA) package, an adapter made of plastic or metal has been conventionally used.
It is interposed between the package and the printed wiring board. Then, when the design of the semiconductor chip is changed, the internal wiring of the adapter is changed. This eliminates the need to change the circuit of the printed wiring board. However, in such an adapter, impedance matching between the signal line provided in the PGA package and the adapter is not achieved, and the signal waveform deteriorates during transmission of a high-speed signal. Therefore, there is a problem that such an adapter cannot be used for high-speed signal transmission.

The TAB method also has the following problems.

That is, in the TAB method, the characteristic impedance of the transmission line can be controlled, and high-speed signal transmission can be coped with. However, it is extremely difficult to have three or more conductor layers, and there is a problem that the transmission line cannot be multilayered. The bare chip and the printed wiring board are electrically connected by a conductor layer formed on the film carrier, but the conductor layer is limited to a two-dimensional radial pattern that does not intersect. Therefore, when the design freedom of the pattern of the conductor layer is low and the semiconductor chip is redesigned or a new semiconductor chip is used, the design change of the conductor layer cannot be dealt with, and the circuit design of the entire printed wiring board is changed. There is a need.

The various problems described above can be summarized as follows. (1) Problems in a ceramic package or a semiconductor package composed of a ceramic sheet containing alumina as a main component A plating process is required Degradation of high frequency characteristics due to the presence of a plating layer Degradation of high frequency characteristics due to a high relative dielectric constant Ceramic Low mounting density due to the small number of laminated sheets. Insufficient number of wiring layers due to the small number of laminated ceramic sheets. (2) Problems associated with semiconductor chip design changes, new semiconductor chip adoption, etc. Ceramic packages And circuit design changes of printed wiring boards Deterioration of high-frequency characteristics of conventional adapters Circuit design changes of film carriers and printed wiring boards in the TAB method

A method of manufacturing a PGA package or the like using a ceramic green sheet for low temperature firing is disclosed in, for example, Japanese Patent Application Laid-Open No. Hei 2-
It is known from the publication No. 90551. However, this publication neither discloses nor suggests a method for manufacturing the LGA package and means for solving the above various problems.

Therefore, the first object of the present invention is to:
It is an object of the present invention to provide a ceramic adapter for electrically connecting a semiconductor package and a printed wiring board, which can solve the problems (1) and (2).

The second object of the present invention is to
In the TAB method for electrically connecting the circuit provided on the printed wiring board and the semiconductor chip mounted on the printed wiring board with the terminal portion facing upward, which can address the problems of The object is to provide a ceramic adapter that can replace the film carrier.

Further, the third object of the present invention is to
SUMMARY OF THE INVENTION It is an object of the present invention to provide a ceramic package for accommodating semiconductor chips, which can solve the above problems.

[0028]

In order to achieve the above-mentioned first object, a hexahedral ceramic body according to a first aspect of the present invention for electrically connecting a semiconductor package and a printed wiring board. The adapter is composed of a plurality of laminated low-temperature fired ceramic sheets, a plurality of land portions formed on each of the upper surface and the lower surface, and formed inside,
And a conductor circuit portion for electrically connecting the land portions to each other.

In order to achieve the second object, the circuit provided on the printed wiring board and the semiconductor chip mounted on the printed wiring board with the terminal portions facing upward are electrically connected. The hexahedral ceramic adapter according to the second aspect of the present invention for connection is composed of a plurality of laminated low temperature fired ceramic sheets, and is electrically connected to the circuit of the printed wiring board formed on the lower surface. A plurality of land portions for, a recess formed on the lower surface for housing the semiconductor chip, a connection portion formed in the recess for electrical connection with the terminal portion of the semiconductor chip,
It is characterized by comprising a conductor circuit portion formed inside to electrically connect the connecting portion and the land portion.

Further, in order to achieve the above-mentioned third object, a hexahedral ceramic package for accommodating a semiconductor chip according to the first aspect of the present invention comprises a plurality of laminated low-temperature fired ceramic sheets. Comprising: A storage part formed on each of the upper surface and the lower surface for accommodating a semiconductor chip, a connection part formed in each of these storage parts for electrical connection with the semiconductor chip, and formed on the lower surface. A plurality of formed land portions, and a conductor circuit portion that is formed inside and electrically connects the land portion and the connection portion or the connection portions to each other.

Furthermore, in order to achieve the above-mentioned third object, a hexahedral ceramic package for accommodating a semiconductor chip according to the second aspect of the present invention is formed by stacking a plurality of low temperature fired ceramic sheets. A storage part for storing the semiconductor chip, a connection part formed in the storage part for electrical connection with the semiconductor chip, a plurality of land parts formed on each of the upper surface and the lower surface, and And each of the land portions and the connecting portion or the conductor circuit portion electrically connecting the land portions to each other.

In the ceramic package according to the second aspect of the present invention, it is preferable that the accommodating portion is a recess formed on the upper surface or the lower surface of the ceramic package. Alternatively, the accommodating portion may include recesses formed on the upper surface and the lower surface of the ceramic package, and the conductor circuit portion formed inside the ceramic package may further include a circuit for electrically connecting the semiconductor chips to each other. Is preferred.

In the present specification, a ceramic green sheet for low-temperature firing means an unfired ceramic sheet, and a low-temperature firing ceramic sheet means a ceramic sheet after low-temperature co-firing of such a ceramic green sheet. .

As a raw material for the low temperature fired ceramic sheet,
For example, (borosilicate glass + alumina), (lead borosilicate glass + alumina), (alumina calcium calcium borosilicate glass + alumina), (alumina magnesium magnesium borosilicate glass + quartz or quartz glass), (borosilicate glass Glass-ceramic composite materials such as (+ alumina, forsterite), (borosilicate glass + quartz + alumina + cordierite), (cordierite β-spogemen-based materials), (cordierite-based ZnO / Mg)
O ・ Al ₂ O ₃・ SiO ₂ material), (cordierite type B ₂
O ₃ · MgO · Al ₂ O ₃ · SiO ₂ based materials) and other crystallized glass-based materials, Al ₂ O ₃ · CaO · SiO ₂ · MgO · B ₂
Non-glass materials such as O ₃ and Al ₂ O ₃ .CaO.SiO ₂ .BaO.B ₂ O ₃ can be cited, but not limited to these. The land portion, the connection portion or the conductor circuit portion is formed by using a metal paste. Therefore, a temperature lower than the melting point of the metal (eg, gold having a melting point of 1065 ° C., copper having a melting point of 1085 ° C., silver having a melting point of 962 ° C., nickel having a melting point of 1455 ° C.) (for example, 800 Any material can be used as long as it can be fired at up to 1000 ° C.

[0035]

The ceramic adapter or ceramic package of the present invention is of the LGA type and comprises a plurality of low temperature fired ceramic sheets laminated together. This low temperature firing ceramic sheet is obtained by firing a low temperature firing ceramic green sheet that can be fired at a low temperature of about 800 ° C. Since the firing temperature is low,
By using a metal paste such as gold, silver, or copper, it is possible to form a connection portion, a land portion, and a conductor circuit portion that have a low resistance value and can be wire-bonded or soldered. Therefore, the plating process becomes unnecessary and the electrode layer for plating becomes unnecessary. Moreover, a low-loss transmission line can be formed.

The relative permittivity ε of the low temperature fired ceramic sheet is about 4.5 to 8, which is lower than the relative permittivity ε of the normal high temperature fired ceramic sheet containing alumina as a main component. Therefore, a transmission line having a short electrical length can be formed, and a signal propagation delay or the like hardly occurs.

Further, the low temperature fired ceramic sheet is 100
It is possible to stack about layers, and a large number of signal layers, power supply layers, ground layers, etc. can be formed. Therefore, the degree of freedom in designing the ceramic adapter and the ceramic package can be increased, and high-density mounting of semiconductor chips becomes possible. Also, the electrical length can be shortened. Furthermore, by making the power supply layer and the ground layer face the signal line of the signal layer, a transmission line having a microstrip structure or a suspended structure can be formed, and impedance mismatch of the transmission line can be minimized. . As a result, signal transmission with less distortion becomes possible.

Moreover, even when the design of the semiconductor chip is changed, it is only necessary to change the design of the conductor circuit portion and the connection portion of the ceramic adapter or ceramic package, and it is not necessary to change the design of the printed wiring board.

[0039]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described based on embodiments with reference to the drawings. It should be noted that the drawings are schematic sectional views of a ceramic adapter, a ceramic package, or the like or a schematic name sectional view in which a part is cut away, and the same reference numbers are used.
Represents the same element and the same part.

(Example 1) Example 1 relates to a ceramic adapter according to the first aspect of the present invention. Example 1
1 is a schematic sectional view of the ceramic adapter 10 of FIG.
In addition, the LGA package 78 and the printed wiring board 7
A state of connection with 0 is schematically shown in FIG.

Ceramic Adapter 10 of Example 1
Consists of a plurality of laminated low temperature fired ceramic sheets 12. The external shape of the ceramic adapter 10 is a hexahedron,
It is preferably a rectangular parallelepiped. It should be noted that in each figure, the boundaries between the low temperature fired ceramic sheets are not shown in order to simplify the figures.

The upper surface 10A of the ceramic adapter 10
And a plurality of land portions 14A on each of the lower surface 10B,
14B is formed. The land portions 14A and 14B are
A large number are arranged in the vertical direction and the horizontal direction at a pitch of 2.54 mm, for example. Upper surface 1 of ceramic adapter 10
The plurality of lands 14A formed in 0A are provided for connection with the lands 80 of the LGA package 78 in which the semiconductor chip is housed. The LGA package and the ceramic adapter can be connected by soldering. Also, a ceramic adapter 10
The plurality of lands 14B formed on the lower surface 10B are provided for connection with the circuit 72 formed on the printed wiring board 70, for example. Ceramic adapter 1
0 and the circuit 72 formed on the printed wiring board 70 may be connected by soldering or a socket.

Inside the ceramic adapter 10,
A conductor circuit portion 16 that electrically connects the land portions 14A and 14B is formed. More specifically, the conductor circuit portion 16 is formed between the low temperature fired ceramic sheets 12, or alternatively, the low temperature fired ceramic sheets 12 are formed.
It is also a via hole and a through hole formed inside. The conductor circuit section 16 functions as a signal line, a ground section, a power supply wiring section, and the like. In each figure, the conductor circuit section 1
6 is drawn schematically.

The ceramic adapter 10 according to the first embodiment of the present invention shown in FIG. 1 can be manufactured by, for example, the manufacturing method described below.

Product name “Green tape manufactured by DuPont
"851TA" (thickness 114 μm) was used as a ceramic green sheet for low temperature firing. The outline of the composition of this ceramic green sheet is as follows. Borosilicate glass 55% by weight Alumina 30% by weight Silica 7% by weight Acrylic resin 8% by weight

[Step-100] This ceramic green sheet 20 for low-temperature firing is subjected to outer shape punching and punching to make holes for via holes and through holes by punching.

[Step-110] Next, on the ceramic green sheet 20, a land portion 14A for connecting to a semiconductor package and a land portion 1 for connecting to an external circuit.
4B and each of the conductor circuit portions 16 that electrically connect the land portions 14A and 14B to each other are formed using a metal paste.

[Step-110A] For that purpose, first, a metal paste is embedded in the hole, and the metal paste is dried to remove the solvent contained in the metal paste. As metal paste, gold paste, silver paste,
A low-resistivity metal paste such as a copper paste can be used, and, for example, one having a solid component outlined below can be used. Gold powder 95% by weight Ethylcellulose-based resin 5% by weight In this way, a part of the conductor circuit portion 16 is formed in the hole.

[Step-110B] Next, the land portions 14A and 14B and a part of the conductor circuit portion 16 are formed on the ceramic green sheet 20 by using a metal paste, for example, by a screen printing method. As the metal paste, for example, one having a solid component whose outline is described below can be used. The composition of the metal paste used for filling the holes and the composition of the metal paste used in this step were slightly changed. Gold powder 80% by weight Oxide 2% by weight Ethylcellulose-based resin 18% by weight Alternatively, the land portions 14A and 14B can be formed by using a metal paste having the following solid components. Silver powder 60% by weight Palladium 10% by weight Oxide and glass 10% by weight Phenolic resin 20% by weight

Thus, as shown in FIG. 3, various ceramic green sheets are formed. [Step-110
The order of [A] and [Step-110B] can be appropriately changed. In addition, [Process-110A] and [Process-1
The solid components of the metal paste used in [10B] are examples, and the components can be appropriately changed.

If necessary, a thick film resistor section or a capacitor section (not shown) may be provided inside the ceramic adapter 10.
Can be formed. When forming a thick film resistor,
As the resistance material, for example, a material having a solid component outlined below can be used. Rutinium oxide 45% by weight Silver binder 8% by weight Palladium 5% by weight Glass 20% by weight Ethylcellulose-based resin 22% by weight Or ruthenium oxide 40% by weight Pyrochlore 5% by weight Glass 30% by weight Ethylcellulose-based resin 25% by weight Thick film resistance part It can be formed by using the above resistance material, for example, by a screen printing method. Also,
As the capacitor material, for example, a tape-shaped material having a solid component as outlined below can be used. Barium titanate 83% by weight Glass 10% by weight Acrylic resin 7% by weight The capacitor part can be formed by laminating the above-mentioned tape-shaped capacitor material on a ceramic green sheet.

[Step-120] Next, in order to produce the ceramic adapter 10, a hot press machine is used.
The plurality of ceramic green sheets produced in [Step-110A] and [Step-110B] are laminated and hot pressed to be bonded and integrated with each other. After that, the ceramic green sheet and the metal paste (in some cases, a resistor material and a capacitor material) that have been laminated are co-fired at a low temperature by a usual method to manufacture the ceramic adapter 10. The firing temperature depends on the material used, but is usually 800 to 1000 ° C. The firing conditions such as the atmosphere and firing time in the firing step may be optimized depending on the material used. In this way, the ceramic adapter 10 as shown in FIG. 1 can be manufactured.

(Example 2) Example 2 relates to a ceramic adapter according to the second aspect of the present invention. A ceramic adapter 30 of Example 2 whose schematic cross-sectional view is shown in FIG.
It consists of two. The external shape of the ceramic adapter 30 is a hexahedron, preferably a rectangular parallelepiped. The ceramic adapter 30 of Example 2 functions as a substitute for the film carrier in the TAB method.

That is, this ceramic adapter 30
Electrically connects the circuit 72 provided on the printed wiring board 70 and the semiconductor chip 74. Semiconductor chip 74
Is a bare chip, for example. The semiconductor chip 74
Is attached to the printed wiring board 70 by a known method with the terminal portion 76 facing upward. This state
FIG. 5 is a schematic cross-sectional view with a part cut away.

Lower surface 30B of ceramic adapter 30
The circuit 7 of the printed wiring board 70 is the same as in the first embodiment.
A plurality of lands 14 are formed for electrical connection with the two. The connection between the ceramic adapter 30 and the circuit 72 formed on the printed wiring board 70 may be made by soldering or a socket.

Lower surface 30B of ceramic adapter 30
In addition, the recess 3 for accommodating the semiconductor chip 74
2 is formed. The bottom surface of the recess 32 has a connecting portion 1 for electrical connection with the terminal portion 76 of the semiconductor chip.
8 is formed. The electrical connection between the terminal portion 76 of the semiconductor chip and the connecting portion 18 can be made by, for example, a flip chip method.

Inside the ceramic adapter 30, a conductor circuit portion 16 for electrically connecting the connecting portion 18 and the land portion 14 is formed. Similar to Example 1,
The conductor circuit portion 16 is formed between the low temperature fired ceramic sheets 12, or is also a via hole or a through hole formed in the low temperature fired ceramic sheet 12. The conductor circuit section 16 functions as a signal line, a ground section, a power supply wiring section, and the like. Incidentally, as in Example 1,
A thick film resistor part and a capacitor part can be formed inside the ceramic adapter 30. Furthermore, a thick film resistor part or a capacitor part can be formed on the upper surface 30A of the ceramic adapter 30, or a resistor or a capacitor which is a discrete component can be attached.

The upper surface 30A of the ceramic adapter 30
A radiation fin (not shown) may be attached to the. Alternatively, holes for penetrating the upper surface 30A and the lower surface 30B of the ceramic adapter 30 may be provided for heat dissipation.

The ceramic adapter shown in FIG. 4 according to the second aspect of the present invention can be manufactured substantially by the manufacturing method described in the first embodiment. The connecting portion 18
May be formed in the same manner as the conductor circuit portion 16 or the land portion 14.

Example 3 Example 3 relates to a ceramic package for accommodating a semiconductor chip according to the first aspect of the present invention. A schematic sectional view of the ceramic package 40 is shown in FIG. Further, FIG. 7 schematically shows the arrangement / attachment relationship of the ceramic package 40, the semiconductor chips 74A and 74B, and the printed wiring board 70.

The ceramic package 40 of Example 3 is
It consists of a plurality of laminated low temperature fired ceramic sheets 12. The outer shape of the ceramic package 40 is a hexahedron, preferably a rectangular parallelepiped.

Semiconductor chips 74A, 7 are provided on the upper surface 40A and the lower surface 40B of the ceramic package 40, respectively.
Storage units 42A and 42B for storing 4B are formed. Specifically, the accommodating portions 42A and 42B are concave portions formed on the upper surface 40A and the lower surface 40B of the ceramic package 40, respectively.

Connection portions 18A and 18B for electrical connection with the semiconductor chips 74A and 74B are formed on the bottoms of the storage portions 42A and 42B, respectively.
It is desirable to provide bumps on these connecting portions 18A and 18B for electrical connection with the semiconductor chips 74A and 74B by a flip chip method, for example.

The circuit 72 of the printed wiring board 70 is provided on the lower surface 40B of the ceramic package 40, as in the first embodiment.
A plurality of lands 14 are formed for electrical connection with. The connection between the ceramic package 40 and the circuit 72 formed on the printed wiring board 70 may be made by soldering or a socket.

Further, inside the ceramic package 40, the conductor circuit portion 1 for electrically connecting the land portion 14 to the connecting portions 18A and 18B or the connecting portions 18A and 18B.
6 is formed. Similar to the first embodiment, the conductor circuit unit 1
Reference numeral 6 denotes a via hole or a through hole formed between the low temperature fired ceramic sheets 12 or formed in the low temperature fired ceramic sheets 12. The conductor circuit section 16 functions as a signal line, a ground section, a power supply wiring section, and the like. As in the first embodiment, the thick film resistor portion and the capacitor portion can be formed inside the ceramic package 40. Further, a thick film resistor part or a capacitor part may be formed on the upper surface 40A of the ceramic package 40 or the accommodating parts 42A and 42B, or a resistor or a capacitor which is a discrete part may be attached.

In FIG. 7, 44 is a lid attached to the lower surface 40B of the ceramic package 40 by a known method, and 46 is the upper surface 40A of the ceramic package 40.
Is a heat radiating plate attached by a known method. Heat sink 4
A radiating fin (not shown) may be attached on top of 6.
A through hole may be provided to connect the recess 42A and the recess 42B for heat dissipation of the semiconductor chip 74B housed in the recess 42B provided on the lower surface 40B of the ceramic package 40.

The ceramic package according to the first aspect of the present invention shown in FIG. 6 can be manufactured substantially by the manufacturing method described in the first embodiment. The connecting portion 18
A and 18B may be formed in the same manner as the conductor circuit portion 16 or the land portion 14.

Example 4 Example 4 relates to a ceramic package for accommodating a semiconductor chip according to the second aspect of the present invention. A schematic cross-sectional view of the ceramic package 50 of Example 4 is shown in FIG. Further, FIG. 9 shows a state where the semiconductor chip 74 is housed in the ceramic package 50, and FIG. 1 shows a connection state of the ceramic package 50 with the printed wiring board 70 and the LGA package.
0 schematically shows.

The ceramic package 50 of the fourth embodiment is
It consists of a plurality of laminated low temperature fired ceramic sheets 12. The outer shape of the ceramic package 50 is a hexahedron, preferably a rectangular parallelepiped.

A storage portion 52 for storing the semiconductor chip 74 is formed on one of the upper surface 50A and the lower surface 50B of the ceramic package 50. In the fourth embodiment, specifically, the storage section 52 is a recess formed in the lower surface 50B of the ceramic package 50.

At the bottom of the accommodating portion 52, there is formed a connecting portion 18 for electrical connection with, for example, a bare chip type semiconductor chip 74. This connection is, for example,
It can be used as a connection portion for wire bonding.

On the lower surface 50B of the ceramic package 50, a plurality of lands 14B for electrical connection with the circuit 72 of the printed wiring board 70 are formed. Also,
On the upper surface 50A of the ceramic package 50, for example, L
A plurality of lands 14A for electrical connection with the terminal 80 of the GA package 78 are formed. The land portion 14A of the ceramic package 50 and the printed wiring board 7
The connection with the zero-formed circuit 72 may be made by soldering or by a socket. The ceramic package 50 and the terminal portion 80 of the LGA package 78 may be electrically connected by soldering or a socket.

Inside the ceramic package 50, the respective land portions 14A, 14B and the connection portion 18 or the conductor circuit portion 16 for electrically connecting the land portions 14A, 14B are formed. Furthermore, as in the first embodiment,
A thick film resistor portion and a capacitor portion can be formed inside the ceramic package 50. Further, a thick film resistor portion or a capacitor portion can be formed in the housing portion 52 of the ceramic package 50, or a resistor or a capacitor which is a discrete component can be attached.

The terminal portion 76 of the semiconductor chip and the connecting portion 18 can be electrically connected by a wire bonding method using a gold wire 82, for example. In addition, in FIG.
Reference numeral 44 denotes a lid mounted on the lower surface 50B of the ceramic package 50 by a known method.

The ceramic package according to the second aspect of the present invention shown in FIG. 8 can be manufactured substantially by the manufacturing method described in the first embodiment. The connecting portion 18
May be formed in the same manner as the conductor circuit portion 16 or the land portion 14.

(Embodiment 5) Embodiment 5 is a modification of the ceramic package according to the second aspect of the present invention described in Embodiment 4. The fifth embodiment is different from the fourth embodiment in that the storage portion for storing the semiconductor chip is composed of concave portions formed on the upper surface and the lower surface of the ceramic package, and the conductor circuit portion formed inside the ceramic package is different. It further includes a circuit for electrically connecting the semiconductor chips to each other. A schematic cross-sectional view of the ceramic package 50 of Example 5 is shown in FIG. Further, FIG. 12 is a schematic sectional view showing a state where the semiconductor chips 74A and 74B are housed in the ceramic package 50, and FIG. 13 is a layout / connection state of the ceramic package 50, the printed wiring board 70 and the LGA package 78. It shows typically.

The ceramic package 50 of Example 5 is
It consists of a plurality of laminated low temperature fired ceramic sheets 12. The outer shape of the ceramic package 50 is a hexahedron, preferably a rectangular parallelepiped.

Storage portions 52A and 52B for storing the semiconductor chips 74A and 74B are formed on the upper surface 50A and the lower surface 50B of the ceramic package 50 of the fifth embodiment, respectively. In the fifth embodiment, specifically, the storage portions 52A and 52B are the upper surface 5 of the ceramic package 50.
0A and the bottom surface 50B are concave portions respectively formed.

At the bottom of each of the accommodating portions 52A and 52B, for example, a bare chip type semiconductor chip 74 is provided.
Connection parts 18A, 1 for electrical connection with A, 74B
8B is formed. These connection parts 18A, 18B
Can be, for example, a connection portion for a flip chip, and it is desirable that bumps are formed.

The circuit 72 of the printed wiring board 70 is provided on the lower surface 50B of the ceramic package 50, as in the fourth embodiment.
A plurality of lands 14B for electrical connection with is formed. In addition, the upper surface 5 of the ceramic package 50
A plurality of lands 14A for electrical connection with the terminals 80 of the LGA package 78 are formed in the 0A.

Inside the ceramic package 50, the land portions 14A and 14B and the connecting portions 18A and 18 are connected.
A conductor circuit portion 16 is formed which electrically connects the B or land portions 14A and 14B to each other, and further the connecting portions 18A and 18B to each other. As in the first embodiment, the thick film resistor portion and the capacitor portion can be formed inside the ceramic package 50. Further, a thick film resistor portion or a capacitor portion can be formed in the housing portions 52A and 52B of the ceramic package 50, or a resistor or a capacitor which is a discrete component can be attached.

The terminals 76A and 76B of the semiconductor chip and the connecting portions 18A and 18B can be electrically connected by, for example, a flip chip method. In FIG. 12, 44B is a lid attached to the lower surface 50B of the ceramic package 50 by a known method, and 44A is a lid attached to the upper surface 50A of the ceramic package 50 by a known method. A hole may be provided for communicating the storage portions 52A and 52B of the ceramic package 50 for heat dissipation.

The ceramic package according to the second aspect of the present invention shown in FIG. 11 can be manufactured substantially by the manufacturing method described in the first embodiment. The connecting portion 18
May be formed in the same manner as the conductor circuit portion 16 or the land portion 14.

The present invention has been described above based on the preferred embodiments, but the present invention is not limited to these embodiments. The materials used for producing the ceramic adapter or the ceramic package are examples, and can be appropriately changed. Further, the arrangement / structure of the conductor circuit portion, the connecting portion, and the land portion of the ceramic adapter or ceramic package of each embodiment is also an example, and the design can be appropriately changed.

The ceramic adapter 10 according to the first aspect of the present invention can be used for connecting LGA packages to each other. Further, a plurality of LGA packages can be mounted on the upper surface of the ceramic adapter 10. In the ceramic adapter 30 according to the second aspect of the present invention, a plurality of half chips can be stored in the recess 32.

In the ceramic package 40 according to the first aspect of the present invention, one semiconductor chip is stored in each of the storage portions 42A and 42B, but a plurality of semiconductor chips are stored in each of the storage portions 42A and 42B. May be. Also, the terminal portions 76A and 76B of the semiconductor chip and the connecting portion 18
The electrical connection between A and 18B can be made by, for example, a wire bonding method. If necessary, the space formed by the recess, the semiconductor chip, the lid, and the heat dissipation plate can be filled with a heat conductive material having excellent heat conductivity to enhance the heat dissipation effect. As such a heat conductive material, for example, a composition composed of a filler made of silicon oxide and metal oxide such as ZnO, alumina powder or aluminum nitride powder, or a resin composition in which metal powder such as copper or aluminum is dispersed Etc. can be illustrated.

Further, in the ceramic package 50 according to the second aspect of the present invention, one semiconductor chip is stored in each of the storage portions 52A and 52B.
A plurality of semiconductor chips may be housed in each 2B. It is also possible to mount a plurality of ceramic packages 50 on the printed wiring board. If necessary, the space formed by the recess, the semiconductor chip and the lid can be filled with a thermally conductive material having excellent thermal conductivity to enhance the heat dissipation effect.

In the ceramic package 50 according to the second aspect of the present invention, the arrangement of the land portions 14A and 14B formed on the upper surface 50A and the lower surface 50B may be the same or different. When viewed in a plan view, the semiconductor chips 74A and 74B may be arranged in the central portion of the ceramic package 50 or may be brought close to the side walls. When the semiconductor chips on the side walls are brought close to each other, a land portion may be formed in the remaining region. Although the fourth and fifth embodiments have been described based on the example in which one ceramic package 50 is arranged, a plurality of ceramic packages 50 can be stacked.

[0089]

The ceramic adapter or ceramic package of the present invention is of the LGA type and comprises a plurality of low temperature fired ceramic sheets laminated together. By using the low temperature fired ceramic sheet, the conventional plating process is unnecessary, the electrode layer for plating is also unnecessary, and the relative permittivity ε can be reduced. As a result, a low-loss transmission line can be formed, a transmission line having a short electrical length can be formed, and signal propagation delay and the like are unlikely to occur.

The low temperature fired ceramic sheet is 100
It is possible to stack about several layers, it is possible to make the wiring three-dimensional, it is possible to increase the degree of freedom in designing ceramic adapters and ceramic packages, and high-density mounting of semiconductor chips becomes possible. Electric length can be shortened. By making the power supply layer and the ground layer face the signal line of the signal layer, a transmission line having a microstrip structure or a suspended structure can be formed, impedance mismatch of the transmission line can be minimized, and distortion of the transmission line can be minimized. A small and high-speed signal transmission becomes possible.

Moreover, even when the design of the semiconductor chip is changed, it is only necessary to change the design of the conductor circuit portion and the connection portion of the ceramic adapter of the present invention, and it is not necessary to change the design of the printed wiring board.

In the ceramic package of the present invention, the semiconductor chips can be arranged in the height direction, which enables high-density mounting of the semiconductor chips. At the same time, the wiring between the semiconductor chips can be minimized, and at the same time, a transmission line whose characteristic impedance is controlled can be formed. As a result, high-speed transmission of signals can be performed while suppressing waveform deterioration. Or the impedance mismatch can be minimized.

Further, it is possible to provide a ceramic package that can accommodate a plurality of semiconductor chips and is compatible with the ceramic package that accommodates a single semiconductor chip in terms of input and output to and from the printed wiring board. .

In the ceramic package of the present invention, for example, C
If the PU is housed, the CPU can be replaced by simply replacing the ceramic package housing the CPU, without changing the printed wiring board. In addition, if a semiconductor chip having a specific independent function is housed in each ceramic package of the present invention, the ceramic package is connected by a land portion, and the specific land portion is designated as a bus signal transmission path, a computer bus system Can be built. In this case, the addition of the ceramic package of the present invention is extremely easy. Further, an additional memory can be constructed by housing a semiconductor chip composed of a memory in the ceramic package of the present invention,
Also in this case, the addition of the ceramic package of the present invention is extremely easy.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of a ceramic adapter of Example 1.

FIG. 2 shows the case of using the ceramic adapter of Example 1,
FIG. 6 is a schematic cross-sectional view showing a connection state between an LGA package and a printed wiring board.

FIG. 3 is a schematic cross-sectional view of various ceramic green sheets before they are laminated for producing the ceramic adapter of Example 1.

FIG. 4 is a schematic cross-sectional view of a ceramic adapter of Example 2.

FIG. 5: Using the ceramic adapter of Example 2,
It is a typical sectional view showing a connected state of a semiconductor chip and a printed wiring board.

FIG. 6 is a schematic cross-sectional view of a ceramic package of Example 3.

FIG. 7 is a schematic cross-sectional view showing a connection state between a ceramic package of Example 3 and a printed wiring board.

FIG. 8 is a schematic cross-sectional view of a ceramic package of Example 4.

FIG. 9 is a schematic cross-sectional view showing a state where semiconductor chips are housed in a ceramic package of Example 4.

FIG. 10 is a schematic diagram showing a connection state of a ceramic package of Example 4, a printed wiring board and an LGA package.

FIG. 11 is a schematic cross-sectional view of a ceramic package of Example 5.

FIG. 12 is a schematic cross-sectional view showing a state where semiconductor chips are housed in a ceramic package of Example 5.

FIG. 13 is a schematic diagram showing a connection state of a ceramic package of Example 5, a printed wiring board and an LGA package.

FIG. 14 is a cross-sectional view of a schematic part of an LGA package for explaining a problem in the conventional LGA package.

[Explanation of symbols]

 10,30 Ceramic adapter 12 Low temperature firing ceramic sheet 14,14A, 14B Land part 16 Conductor circuit part 18,18A, 18B connection part 20 Ceramic green sheet 40,50 Ceramic package 32 Recess 44,44A, 44B Lid 46 Heat sink 42A , 42B, 52, 52A, 52B Storage section 70 Printed wiring board 72 Circuit provided on the printed wiring board 74, 74A, 74B Semiconductor chip 76 Semiconductor chip terminal section 78 LGA package 80 LGA package land section 82 Gold wire

Front page continuation (51) Int.Cl. ⁵ Identification code Office reference number FI Technical display location H01L 25/18 H05K 1/18 U 7128-4E // H01R 33/76 9057-5E 33/94 9057-5E ( 72) Inventor Hiroyuki Fujita 6-735 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Inventor Thomas Goodman 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation ( 72) Inventor Yoshikazu Murakami 6-735 Kita-Shinagawa, Shinagawa-ku, Tokyo, Sony Corporation (72) Inventor Kawa-saki Hidetoshi 6-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Inventor Arthur T. Murphy 1-28-4 Kakikizaka, Meguro-ku, Tokyo

Claims (6)

[Claims] 1. A hexahedral ceramic adapter for electrically connecting a semiconductor package and a printed wiring board, comprising a plurality of low-temperature fired ceramic sheets laminated and formed on each of an upper surface and a lower surface. A ceramic adapter comprising a plurality of lands and a conductor circuit portion formed inside and electrically connecting the lands to each other. 2. A hexahedral ceramic adapter for electrically connecting a circuit provided on a printed wiring board and a semiconductor chip mounted on the printed wiring board with a terminal portion facing upward. A plurality of low-temperature fired ceramic sheets that are laminated, and a plurality of lands formed on the lower surface for electrical connection with the circuit of the printed wiring board and a semiconductor chip formed on the lower surface. A recess for accommodating, a connecting portion formed in the recess for electrically connecting to a terminal portion of a semiconductor chip, and a connecting portion and a land portion formed inside are electrically connected A ceramic adapter characterized by having a conductor circuit section. 3. A hexahedral ceramic package for accommodating semiconductor chips, comprising a plurality of laminated low temperature fired ceramic sheets, and accommodating portions for accommodating semiconductor chips formed on each of an upper surface and a lower surface. A connection part formed in each of the storage parts for electrical connection with a semiconductor chip, a plurality of land parts formed on a lower surface, and a land part and a connection part or connection formed inside And a conductor circuit section for electrically connecting the sections to each other. 4. A hexahedral ceramic package for accommodating semiconductor chips, comprising a plurality of laminated low-temperature fired ceramic sheets, accommodating part for accommodating semiconductor chips, and a semiconductor formed in the accommodating part. A connection part for electrical connection with the chip, a plurality of land parts formed on each of the upper surface and the lower surface, and each land part formed inside and the connection part or the land parts are electrically connected to each other. A ceramic package, comprising: a conductor circuit portion to be connected. 5. The ceramic package according to claim 4, wherein the housing portion comprises a recess formed on the upper surface or the lower surface of the ceramic package. 6. The accommodating portion comprises recesses formed on the upper surface and the lower surface of the ceramic package, and the conductor circuit portion formed inside the ceramic package forms a circuit for electrically connecting the semiconductor chips to each other. The ceramic package according to claim 4, further comprising: