JPH06261092A - Method and device for sending serial digital data - Google Patents

Abstract

PURPOSE:To obtain a transmitter for serial digital data by which a clock is reproduced with a simple circuit at a receiver side. CONSTITUTION:A modulator 10 changes a potential of one transmission line synchronously with a clock out of transmission lines 20u, 20v, 20w using three or more wires and serial digital data are expressed in the rotating direction of the transmission line whose potential is changed, and serial digital data and a clock are simultaneously sent. A demodulator 30 at a receiver side detects a change in the potential of the transmission lines 20u, 20v, 20w to recover the clock and detects a rotating direction of the transmission line whose potential is changed to reproduce the serial digital data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and apparatus for transmitting serial digital data.

[0002]

2. Description of the Related Art Generally, data transmission between various devices such as data transmission between computers and peripheral devices, data transmission between multiprocessors, digital video transmission, etc.
In order to reduce the number of transmission lines, a serial transmission method for converting information into serial data and transmitting it is widely adopted.

In a transmission system adopting this serial transmission method, in order for the receiving side to correctly reproduce the serial data in which information bits of "1" or "0" are sequentially transmitted through the transmission line, A clock (synchronous clock) indicating the sending timing of the information bit on the side is required, and one using two to four transmission lines as described below has been put to practical use.

In a three-wire serial transmission system using three transmission lines, one of the three transmission lines is used as a reference,
The other one is used for data transmission, and the remaining one is used for clock transmission with a phase shifted from the data.

Further, in a three-wire serial transmission system using four transmission lines, data, its inverted data, a clock whose phase is shifted from that of the data, and its inverted clock are transmitted via different transmission lines. .

Further, in a two-wire serial transmission system using two transmission lines or coaxial cables, a clock is encoded together with data (Manchester encoding) and transmitted via a common transmission line. Here, the Manchester code in which data "0", "1", is expressed according to the direction of transition at the center of 1 bit can simultaneously transmit data and a synchronous clock (self-synchronous method). This Manchester code is adopted for LAN (Ethernet) of CSMA / CD using a coaxial cable.

[0007]

By the way, the conventional 4-wire serial transmission system has a drawback that it requires a large number of transmission lines and has a small allowable range of jitter between clock and data.

Further, in the conventional three-wire serial transmission system, a potential change indicating data may occur between the potential change due to clock generation and the next change, so that the jitter tolerance between the clock and the data is allowed. It has the disadvantage of a small range.

Further, in the conventional two-wire serial transmission system, since information on the past average interval of the clock is required to reproduce the data, it is necessary to reproduce the clock by PLL (Phase Locked Loo), and the demodulation means. Hardware becomes complicated. Moreover, since the range of the speed that the PLL follows is limited, it is difficult to change the communication speed greatly. Moreover, the PLL cannot follow the jitter that does not follow, and the allowable range of the jitter between the clock and the data is small. Furthermore, the signal frequency to be transmitted by Manchester code encoding becomes high, and NRZ (Non Return to Zer)
There is a drawback in that a maximum of twice the transmission line bandwidth is required as compared with the case of transmitting data of o).

Therefore, the present invention has been made in view of the above-mentioned circumstances, and has the following objects.

That is, an object of the present invention is to provide a serial digital data transmission method and a transmission device capable of reproducing a clock on a receiving side with a simple circuit.

Another object of the present invention is to provide a method and apparatus for transmitting serial digital data having a wide variable range of communication speed.

Another object of the present invention is to provide a method and apparatus for transmitting serial digital data having a large jitter margin.

Another object of the present invention is to provide a method and apparatus for transmitting serial digital data which can easily suppress common mode noise.

Another object of the present invention is to provide a serial digital data transmission method and a transmission device capable of lengthening the rise / fall time of transmission data.

It is another object of the present invention to provide a serial digital data transmission method and transmission device which can reproduce data without requiring a reference potential on the receiving side.

Still another object of the present invention is to provide a serial digital data transmission method and transmission device capable of avoiding abnormal data output due to a difference in connection of a plurality of transmission lines.

[0018]

In order to solve the above problems, the serial digital data transmission method according to the first invention uses three or more transmission lines, one of which is transmitted. It is characterized in that serial digital data and a clock are simultaneously transmitted by a change in the potential of the path.

A serial digital data transmission method according to a second aspect of the present invention is the serial digital data transmission method according to the first aspect of the present invention, wherein the digital data is expressed in the rotation direction of the transmission path where the potential changes. It is characterized by that.

A serial digital data transmission method according to a third aspect of the present invention is the serial digital data transmission method according to the second aspect of the present invention. It is characterized by expressing data.

Further, in the serial digital data transmission method according to the fourth aspect of the present invention, three or more transmission lines are used, and the serial digital data and the clock are transmitted simultaneously by the change in the potential of two of the transmission lines. It is characterized by.

A serial digital data transmission method according to a fifth aspect of the present invention is the serial digital data transmission method according to the fourth aspect of the present invention, in which the potential of each transmission line in a steady state is made different, and the potential It is characterized in that the potentials of the transmission paths close to each other are exchanged.

A serial digital data transmission method according to a sixth aspect of the present invention is the serial digital data transmission method according to the fourth or fifth aspect of the present invention, wherein the serial digital data is transmitted in a rotation direction of a transmission line having a specific potential. It is characterized by expressing data.

A serial digital data transmission method according to a seventh aspect of the present invention is the serial digital data transmission method according to the sixth aspect of the present invention, in which the rotation direction of a transmission path having a specific potential is reversed. It is characterized in that it represents digital data.

Furthermore, the serial digital data transmission device according to the eighth aspect of the present invention has a transmission line formed by three or more electric wires and three or more output terminals to which the transmission lines are connected, and each output terminal has a transmission line. Rotation of the transmission line in which the potential of one of the connected transmission lines is changed in synchronization with the clock supplied to the clock input terminal and the potential of the serial digital data supplied to the data input terminal is changed. Expressed in a direction, has a modulation means for simultaneously outputting serial digital data and a clock from an output terminal, and three or more input terminals connected to the transmission path, and the potential of the transmission path connected to each input terminal. To detect the change in the clock, output the recovered clock from the clock output terminal, and detect the rotation direction of the transmission path where the potential changes to generate serial digital data. A demodulation means for generating reproduced serial digital data from the data output terminal is provided and three or more transmission lines are used, and serial digital data and a clock are used as transmission data due to a change in the potential of one of the transmission lines. It is characterized by simultaneous transmission.

A serial digital data transmission device according to a ninth aspect of the present invention has a transmission line formed by three or more electric wires and three or more output terminals connected to the transmission line, and has a data input terminal. In accordance with the supplied serial digital data, the potentials of two transmission paths of the transmission paths connected to the output terminals are exchanged in synchronization with the clock supplied to the clock input terminal. Two of the transmission lines connected to the input terminals, each having two or more input terminals connected to the transmission line and a modulation means for simultaneously outputting data and a clock from the output terminals.
A demodulation means for detecting the exchange of the potential of the transmission line of the book, reproducing the clock and the serial digital data, outputting the reproduced clock from the clock output terminal, and outputting the reproduced serial digital data from the data output terminal, It is characterized in that three or more transmission lines are used, and serial digital data and a clock are simultaneously transmitted as transmission data by exchanging the potentials of two of the transmission lines.

A serial digital data transmission device according to a tenth aspect of the invention is the serial digital data transmission device according to the ninth aspect of the invention, in which the potentials of the respective transmission lines in the steady state are all different, and It is characterized in that the serial digital data and the clock are simultaneously transmitted by exchanging the potentials of two transmission lines having a close potential.

A serial digital data transmission device according to an eleventh invention is the serial digital data transmission device according to the ninth invention or the tenth invention.
It is characterized in that digital data is expressed in the rotation direction of a transmission path having a specific potential, and serial digital data and a clock are transmitted at the same time.

[0029]

In the method of transmitting serial digital data according to the first aspect of the invention, serial digital data and a clock are transmitted simultaneously by changing the potential of one of the three or more transmission lines.

Further, in the serial digital data transmission method according to the second invention, in the serial digital data transmission method according to the first invention, the digital data is expressed in the rotation direction of the transmission path where the potential changes, Transmit serial digital data and clock simultaneously.

Further, in the serial digital data transmission method according to the third invention, in the serial digital data transmission method according to the second invention, the digital data is transmitted depending on whether or not the rotation direction of the transmission path in which the potential changes is inverted. Expressing, serial digital data and clock are transmitted simultaneously.

Further, in the serial digital data transmission method according to the fourth aspect of the invention, serial digital data and a clock are transmitted simultaneously by a change in the potential of two transmission lines of three or more transmission lines.

Also, in the serial digital data transmission method according to the fifth aspect of the present invention, in the serial digital data transmission method according to the fourth aspect of the present invention, the potentials of the respective transmission lines in the steady state are made different, and the potentials thereof are close to each other. By exchanging the potential of the transmission path, serial digital data and a clock are simultaneously transmitted.

Further, in the serial digital data transmission method according to the sixth invention, in the serial digital data transmission method according to the fourth or fifth invention, the digital data is transmitted in the rotation direction of the transmission path having a specific potential. Expressing, serial digital data and clock are transmitted simultaneously.

Further, in the serial digital data transmission method according to the seventh invention, in the serial digital data transmission method according to the sixth invention, the digital data is transmitted depending on whether or not the rotation direction of the transmission path in which the potential changes is inverted. Expressing, serial digital data and clock are transmitted simultaneously.

Further, in the serial digital data transmission device according to the eighth aspect of the invention, the potential of one of the transmission lines of the three or more electric wires is changed in synchronization with the clock by the modulation means, Represent the serial digital data in the rotation direction of the transmission line where the potential changes, and transmit the serial digital data and the clock at the same time, and the demodulating means on the receiving side detects the change in the potential of each transmission line and reproduces the clock. At the same time, the rotation direction of the transmission line where the potential changes is detected to reproduce the serial digital data.

Further, in the serial digital data transmission apparatus according to the ninth aspect of the invention, the modulating means sets the potentials of two transmission paths among the transmission paths of three or more electric wires according to the serial digital data. By exchanging in synchronism with the clock, serial digital data and the clock are simultaneously transmitted, and the demodulating means on the receiving side detects the exchange of the potentials of two transmission lines of each transmission line and detects the serial exchange with the clock. Play digital data.

The serial digital data transmission apparatus according to the tenth aspect of the invention is the serial digital data transmission apparatus according to the ninth aspect of the invention, in which the potentials of the respective transmission lines in the steady state are made different, and the potential By exchanging the potentials of the two nearby transmission lines, serial digital data and a clock are simultaneously transmitted.

The serial digital data transmission apparatus according to the eleventh invention is the serial digital data transmission apparatus according to the ninth invention or the tenth invention,
Digital data is expressed in the rotation direction of a transmission line having a specific potential, and serial digital data and a clock are transmitted at the same time.

[0040]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a serial digital data transmission method and transmission apparatus according to the present invention will be described in detail below with reference to the drawings.

The serial digital data transmission method according to the present invention is carried out by a transmission device having a configuration as shown in FIG. 1, for example.

The serial digital data transmission device shown in FIG. 1 is composed of transmission lines 20u and 20v composed of three twisted wires.
, 20w to connect the modulator 10 and the demodulator 30.

This transmission device has a clock input terminal 10c.
, And the serial digital data Di supplied to the data input terminal 10d are converted into three transmission data Ou, Ov, Ow by the modulator 10 according to the serial digital data transmission method of the present invention. Long-distance transmission is carried out via the transmission lines 20u, 20v, 20w of, and the demodulator 30 returns the transmission data Ou, Ov, Ow to the clock Co and the serial digital data Do,
The reproduction clock Co is obtained at the clock output terminal 30c and the reproduction clock Do is obtained at the data output terminal 30d.

The modulator 10 includes the transmission lines 20u, 2
Three output terminals 10u and 10 to which 0v and 20w are connected
v, 10w, each output terminal 1 according to the serial digital data Di supplied to the data input terminal 10d.
By changing the potential of one of the output terminals 0u, 10v, and 10w in synchronization with the clock Ci supplied to the clock input terminal 10c, the clock Ci and the serial digital data Di are transmitted data Ou, Ov, Ow.
Convert to.

The modulator 10 is constructed, for example, as shown in FIG.

The modulator 10 shown in FIG. 2 has a clock C
i is supplied to each clock input terminal via the clock input terminal 10c. Three D flip-flops 11u and 11v.
, 11w and the modulation logic circuit 12 to which the serial digital data Di is supplied via the data input terminal 10d and the latch output data DFu, DFv, DFw by the D flip-flops 11u, 11v, 11w. 6 from state number 1 to state number 6
The transmission data Ou, Ov, Ow generated by the modulation logic circuit 12 are latched by the D flip-flops 11u, 11v, 11w, which are configured as a state machine having a modulo 6 modulo 6 output state. Then, the data is output through the respective output terminals 10u, 10v, 10w.

The modulation logic circuit 12 receives the serial digital data Di currently supplied to the data input terminal 10d and the D flip-flops 11u, 11v and 11 described above.
Current transmission data DFu, D latched by w
From Fv and DFw, transmission data Ou one clock later,
Ov and Ow are generated, and the operation according to the truth table shown in Table 1 is performed.

[0048]

[Table 1]

Further, the D flip-flops 11u and 1u
1v and 11w are clock input terminals 1 for the transmission data Ou, Ov and Ow output from the modulation logic circuit 12.
Performs latch operation in synchronization with clock Ci from 0c,
As the latch output, the present transmission data present transmission data DFu, DFv, DFw are supplied to the modulation logic circuit 12 and are also output via the output terminals 10u, 10v, 10w.

That is, the modulator 10 has the serial digital data Di supplied to the data input terminal 10d.
Is a logic "H", the state number is decremented by 1 each time the clock Ci rises, as shown in the state transition table of Table 2, and as shown in FIG. Transmission data Ou, Ov, Ow representing the logic "H" of Di are output terminals 10u, 10v, respectively.
, 10w.

[0051]

[Table 2]

Further, this modulator 10 has a state transition table shown in Table 3 when the serial digital data Di supplied to the data input terminal 10d is logic "L".
Each time the clock Ci rises, the state number increases by 1,
As shown in FIG. 3, the transmission data Ou, Ov, Ow representing the logic "L" of the serial digital data Di as a change in the potential in the clockwise direction are output terminals 10u, 10v, 1 respectively.
Output from 0w.

[0053]

[Table 3]

In the modulator 10 having such a structure, for example, as shown in FIG. 4, for serial digital data Di synchronized with the clock Ci, as shown in FIG. 5, one of the transmission lines 20u, 20v, 20w is transmitted. The potential of one transmission line is changed in synchronization with the clock Ci, and transmission data Ou, Ov, Ow expressing the serial digital data Di is generated in the rotation direction of the transmission line where the potential changes.

Further, the demodulator 30 is connected to the transmission line 20.
Three input terminals 20u connected to u, 20v and 20w
, 20v, 20w, and each input terminal 30u, 30v
, 30w, the transmission data Iu, Iv, Iw from the modulator 10 as shown in FIG. 6 is detected as a change in the potential, and the transmission data Iu, Iv, Iw are serialized with the clock Co as shown in FIG. The digital data Do is reproduced.

The demodulator 30 performs a demodulation operation as shown in the state transition table of Table 4 in response to the modulation operation of the modulator 10, and is constructed, for example, as shown in FIG.

[0057]

[Table 4]

In the demodulator 30 shown in FIG. 8, the transmission data Iu, Iv, Iw are input to the clock recovery circuit 31 via the input terminals 30u, 30v, 30w and the transmission data Iu, Iv, Iw, respectively. 3 supplied to the data input terminal
Flip-flops 35u, 35v, 35w and three flip-flops 36u, 36v, 36 to which the latch output data QMu, QMv, QMw of each of the flip-flops 35u, 35v, 35w are supplied to each data input terminal.
w and the above flip-flops 35u, 35v, 35w
Of the latch output data QMu, QMv, QMw and the demodulation logic circuit 37 to which the latch output data QLu, QLv, QLw of the flip-flops 36u, 36v, 36w are supplied.

The clock recovery circuit 31 outputs a logic value according to the states of the input data Iu, Iv, and Iw according to the truth table shown in Table 5, and a clock demodulation logic circuit 32.
A differentiating circuit 33 for differentiating the output of the clock demodulating logic circuit 32 to take out the change of the clock, and the differentiating circuit 33.
And an absolute value circuit 34 for taking out the rising edge pulse of the differential output as the reproduced clock Co.

[0060]

[Table 5]

The reproduction clock Co reproduced from the input data Iu, Iv, Iw by the clock reproduction circuit 31 is the flip-flops 35u, 35v.
, 35w, 36u, 36v, 36w are supplied to the respective clock input terminals and are also output through the clock output terminal 30c.

Further, each of the flip-flops 35u, 3
5v and 35w perform a latch operation in synchronism with the reproduction clock Co, and each of the input terminals 30u, 30v and 30w.
Current transmission data Iu, Iv, Iw input via
Is held for one clock period. Then, the latch output data Q of these flip-flops 35u, 35v, 35w
Mu, QMv, and QMw are the flip-flops 36 described above.
It is supplied to the respective data input terminals of u, 36v and 36w and also to the demodulation logic circuit 27.

Further, each of the above flip-flops 36u,
36v and 36w perform a latch operation in synchronism with the reproduction clock Co and each of the flip-flops 25u and 25u.
Latch output data QMu, QMv, QMw of v, 35w
Is further held for one clock period. The latch output data QLu, QLv, QLw of the flip-flops 36u, 36v, 36w are the demodulation logic circuit 37.
Is supplied to.

Then, the demodulation logic circuit 37, as shown in the truth table shown in Table 6, outputs the flip-flops 3
Latch output data QMu, QM of 5u, 35v, 35w
v, QMw, that is, the present input transmission data and the latch output data QLu, QLv, QLw of each of the above-mentioned flip-flops 36u, 36v, 36w, that is, the input transmission data one clock before is compared to reproduce the serial digital data, Output from the output terminal 30d.

[0065]

[Table 6]

In Table 6, X indicates that the output data is logic "H" or "L".

In the serial digital data transmission device having such a configuration, digital data is expressed in the rotation direction of the transmission line where the potential changes, and serial data is transmitted via the transmission lines 20u, 20v, 20w consisting of three stranded wires. Digital data and clock can be transmitted simultaneously. As a result, the clock can be regenerated on the receiving side with a simple circuit, and the variable range of the communication speed can be increased. Furthermore, since it is not a method in which data changes between clocks, a large jitter margin can be secured.

In this embodiment, digital data is expressed in the rotation direction of the transmission line where the potential changes, and serial digital data and a clock are simultaneously transmitted through the transmission lines 20u, 20v, 20w consisting of three stranded wires. In principle, the serial digital data and the clock should be transmitted at the same time according to the change in the potential of one transmission line, and the serial digital data and the clock should be transmitted simultaneously through the transmission line composed of three or more wires. Can be transmitted.

The serial digital data transmission method according to the present invention is carried out by a transmission device having the structure shown in FIG. 9, for example.

The serial digital data transmission apparatus shown in FIG. 9 has output terminals 40u, 40v, 4 of the modulator 40.
0w is connected via a differential driver circuit 50 to each end of the transmission lines 60r, 60s, 60t composed of three twisted wires, and the other end of each of the transmission lines 60r, 60s, 60t is connected to a differential receiver circuit 70. It is connected to each input terminal 80u, 80v, 80w of the demodulator 80 via.

This transmission device has a clock input terminal 40c.
To the clock Ci and the serial digital data Di supplied to the data input terminal 30d by the modulator 40 and the differential driver circuit 50 according to the serial digital data transmission method of the present invention.
, Ot to convert the three transmission lines 60r, 60s, 60t
Long-distance transmission is carried out through the differential receiver circuit 70 and the demodulator 80 to return the transmission data Or, Os, Ot to the clock Co and the serial digital data Do, and the reproduction clock Co is obtained at the clock output terminal 80c. The reproduction clock Do is obtained at the output terminal 80d.

The modulator 40 performs a modulation operation for converting into transmission data according to the change in the potential of one of the three transmission lines, and the modulator 10 in the first embodiment described above. By using the same configuration as
Transmission data Ou, Ov expressing serial digital data Di synchronized with
, Ow are generated.

The differential driver circuit 50 converts the transmission data generated by the modulator 40 due to the change in the potential of one transmission line into the transmission data by exchanging the potential. Transmission data Ou, Ov, Ow generated by the modulator 40, for example, as shown in FIG.
Is converted into transmission data Or, Os, Ot as shown in FIG.

This differential driver circuit 50 is shown in FIG.
As shown in FIG. 2, three differential line drivers 51u, 5
1v, 51w and 6 resistors 52uv, 52uw, 52v
u, 52vw, 52wu, 52wv, and the positive driver output end of one differential line driver of the differential line drivers 51u, 51v, 51w and the negative driver output end of the other differential line driver. Are connected to the output terminals 50r, 50s, 50t via resistors, respectively.

The differential driver circuit 50 having such a configuration
Are transmission data Ou, O generated by the modulator 40.
v, Ow are transmitted data Or according to the truth table shown in Table 7.
, Os, Ot.

[0076]

[Table 7]

Here, in the truth table of the above Table 7, the case where the outputs of the two drivers connected to the output terminal of 1 through the resistor are both high potentials is defined as the potential +, and the two drivers When the outputs of the two drivers have different potentials, the potential is 0, and when the outputs of the two drivers are both low potentials, the potential is −,
The output transmission data Or, Os, and Ot are shown.

The transmission data Ou, Ov, Ow generated by the modulator 30 is converted by the differential driver circuit 50 into the transmission data Or, Os, Ot according to the truth table of Table 7. In the device, as shown in the state transition table of the modulator 40 and the differential driver circuit 50 in Table 8, when the serial digital data Di supplied to the data input terminal 40d is logic "H", the clock input terminal Clock Ci supplied to 40c
The state number is decremented by 1 at every rise of, and as shown in FIG. 13, the transmission data Or, Os, Ot representing the logic "H" of the serial digital data Di as a change in the specific potential (0 level) in the counterclockwise direction. Each output terminal 50r, 50
Output from s and 50t. Further, when the serial digital data Di is logic "L", the state number is incremented by 1 every time the clock Ci rises, and as shown in FIG. 13, the serial digital data is changed as a change in the specific potential (0 level) in the clockwise direction. Transmission data Or, Os, Ot representing the logic "L" of the data Di are output terminals 50r, 50s.
, 50t.

[0079]

[Table 8]

In FIG. 13, the three transmission lines 60 are used.
Transmission data Or, Os output to r, 60s, 60t
, Ot potential states (● indicates + level, ⊚ indicates 0 level, and ∘ indicates − level) in the order of state numbers.

Further, the differential receiver circuit 70 has three input terminals 70r, 70s, 70t connected to the transmission lines 60r, 60s, 60t, and is connected from the differential driver circuit 50 to the transmission line 60r. , 60s, 60t are transmitted to the input terminals 70r, 70s, 70t to detect the transmission data Ir, Is, It by exchanging potentials having waveforms as shown in FIG. Is and It are converted into transmission data Iu, Iv, and Iw by the change in potential as shown in FIG.

This differential receiver circuit 70 is shown in FIG.
As shown in FIG. 6, the input terminals 70r are provided for impedance matching of the transmission lines 60r, 60s and 60t.
, 70s, 70t and the three terminating resistors 71rs, 71st, 71tr, which are connected in the same manner, and the terminating resistors 71rs, 7tr.
The transmission data I is provided with three voltage comparators 72u, 72v, 72w which receive the respective terminal voltages of 1st and 71tr as inputs.
It is configured to output transmission data Iu, Iv, Iw having logical values shown in the truth table of Table 9 for r, Is, It.

[0083]

[Table 9]

Further, the demodulator 80 performs a demodulation operation corresponding to the modulation operation of the modulator 30 on the transmission data Iu, Iv, Iw due to the change in the potential obtained by the differential receiver circuit 70. The demodulator 20 has the same structure as the demodulator 20 in the first embodiment.

The demodulator 80 performs the demodulation operation as shown in the state transition table of Table 10 to obtain the clock Co as shown in FIG. 17 from the transmission data Iu, Iv, Iw.
And the serial digital data Do are reproduced, the reproduced clock Co is output from the clock output terminal 80c, and the reproduced serial digital data Do is output from the data output terminal 80.
Output from d.

[0086]

[Table 10]

In the serial digital data transmission apparatus having such a configuration, three transmission lines 60r, 60s, 60 are provided.
The serial digital data and the clock can be simultaneously transmitted by the change in the potential of the two transmission paths of t. As a result, the clock can be regenerated on the receiving side with a simple circuit, and the variable range of the communication speed can be increased. Furthermore, since it is not a method in which data changes between clocks, a large jitter margin can be secured.

Then, like the transmission apparatus of this embodiment,
By transmitting data by exchanging potentials, the average of the potentials of all the transmission lines 60r, 60s, 60t can be made constant. As a result, in-phase noise can be suppressed and filtering can be easily performed.

In addition, each transmission line 60r in the steady state,
By making the potentials of 60s and 60t different and exchanging the potentials of the transmission paths whose potentials are close to each other, the serial digital data and the clock can be transmitted at the same time.
It is possible to limit the product of each frequency component and the amplitude of the transmission signal required for reception to a certain value or less. As a result, the amplitude of the high frequency signal is reduced and the
The fall time can be extended.

Further, by expressing serial digital data in the rotation direction of the transmission line having a specific potential (0 level) and transmitting the serial digital data and the clock at the same time, a reference potential is required on the receiving side. The data can be reproduced without using it.

Further, in each of the above-described embodiments, serial digital data is expressed from the rotation directions of the potentials of a plurality of transmission lines and the serial digital data and the clock are transmitted at the same time. However, the rotation direction of the potentials is reversed. For example, a coder for performing coding as shown in the truth table of Table 11 for correlating the presence or absence of data with the logical value of data is provided in the front stage of the modulator, and the decoder is provided in the rear stage of the demodulator. ,
The serial digital data may be expressed by reversing the rotation direction of the potential, and the serial digital data and the clock may be simultaneously transmitted via the three transmission paths.
By doing this, the steady reversal of the potential on the transmission line,
It is possible to avoid output of abnormal data due to connection difference of the three transmission lines.

[0092]

[Table 11]

In Table 11, (L),
(H) shows the logical value of the last bit coded last time.

Further, in this case, if the encoding is performed by the encoder, for example, as shown in the truth table of Table 12, the number of continuous inversions in the rotation direction is limited, the lowest frequency with respect to the highest frequency of the transmission signal. The ratio can be limited, which allows noise to be easily suppressed using a high-pass filter.

[0095]

[Table 12]

It should be noted that the above Table 12 shows 5 bits from 4 bits input.
It is a truth table of the encoder which produces a bit output. Further, in Table 12 above, (L) and (H) indicate the logical value of the last bit coded last time.

[0097]

In the serial digital data transmission method according to the first aspect of the present invention, serial digital data and a clock are simultaneously transmitted by a change in the potential of one transmission line of three or more transmission lines. The clock can be reproduced by a simple circuit, and the variable range of the communication speed can be increased. Furthermore, since it is not a method in which data changes between clocks, the jitter margin is large.

Further, in the serial digital data transmission method according to the second invention, in the serial digital data transmission method according to the first invention, the digital data is expressed in the rotation direction of the transmission path where the potential changes, Since serial digital data and clock are transmitted simultaneously,
On the receiving side, the clock can be reproduced by a simple circuit, and the variable range of the communication speed can be increased. Furthermore, since it is not a method in which data changes between clocks, the jitter margin is large.

Further, in the serial digital data transmission method according to the third invention, in the serial digital data transmission method according to the second invention, the digital data is transmitted depending on whether or not the rotation direction of the transmission path in which the potential changes is reversed. By expressing, by transmitting the serial digital data and the clock at the same time, it is possible to prevent the output of abnormal data due to the connection difference of the plurality of transmission lines.

Further, in the serial digital data transmission method according to the fourth aspect of the present invention, since serial digital data and a clock are transmitted simultaneously by a change in the potentials of two transmission lines of three or more transmission lines, on the receiving side. The clock can be reproduced by a simple circuit, and the variable range of the communication speed can be increased. Furthermore, because it is not a method of changing data between clocks,
Large jitter margin. Moreover, since the data is transmitted by exchanging the potentials, the average of the potentials of all the transmission paths becomes constant. As a result, it becomes possible to easily perform filtering with suppressed common-mode noise.

Further, in the serial digital data transmission method according to the fifth aspect of the present invention, in the serial digital data transmission method according to the fourth aspect of the present invention, the potentials of the respective transmission lines in the steady state are made different, and the potentials thereof are close to each other. Since the serial digital data and the clock are transmitted at the same time by exchanging the potential of the transmission path, the product of each frequency component and amplitude of the transmission signal necessary for reception can be limited to a certain value or less. As a result, the amplitude of the high-frequency signal is reduced, and the rise / fall time of the transmission data can be lengthened.

Further, in the serial digital data transmission method according to the sixth invention, in the serial digital data transmission method according to the fourth or fifth invention, the digital data is transmitted in the rotation direction of the transmission path having a specific potential. By expressing, since the serial digital data and the clock are transmitted at the same time, the data can be reproduced without requiring the reference potential on the receiving side.

Further, in the serial digital data transmission method according to the seventh aspect of the present invention, in the serial digital data transmission method according to the sixth aspect of the invention, the digital data is determined by whether or not the rotation direction of the transmission path having a specific potential is reversed. By expressing the above and transmitting the serial digital data and the clock at the same time, it is possible to prevent the output of abnormal data due to the connection difference of the plurality of transmission lines.

Further, in the serial digital data transmission device according to the eighth aspect of the invention, the modulation means changes the potential of one transmission line among the transmission lines of three or more electric wires in synchronization with the clock. Then, the serial digital data is expressed in the rotation direction of the transmission line where the potential changes, and the serial digital data and the clock are transmitted at the same time, and the demodulating means on the receiving side detects the change in the potential of each transmission line and detects the clock. And the serial digital data is reproduced by detecting the rotation direction of the transmission line where the potential changes, the clock can be reproduced by a simple circuit on the receiving side, and the variable range of the communication speed can be increased. It is possible to secure a large jitter margin.

Further, in the serial digital data transmission device according to the ninth aspect of the invention, the modulating means sets the potentials of two transmission paths among the transmission paths of three or more electric wires according to the serial digital data. By exchanging in synchronism with the clock, serial digital data and the clock are simultaneously transmitted, and the demodulating means on the receiving side detects the exchange of the potentials of two transmission lines of each transmission line and detects the serial exchange with the clock. Since the digital data is reproduced, the clock can be reproduced on the receiving side by a simple circuit, the variable range of the communication speed can be increased, and a large jitter margin can be secured. Moreover, since the data is transmitted by exchanging the potentials, the average of the potentials of all the transmission paths becomes constant, so that filtering for suppressing common-mode noise can be easily performed.

The serial digital data transmission apparatus according to the tenth aspect of the invention is the serial digital data transmission apparatus according to the ninth aspect of the invention, in which the potentials of the respective transmission lines in the steady state are all different, and the potential By exchanging the potentials of two nearby transmission lines, serial digital data and a clock are transmitted at the same time. Therefore, the product of each frequency component and amplitude of the transmission signal necessary for reception is limited to a certain value or less, and The signal amplitude can be reduced, and the rise / fall time of the transmission data can be lengthened.

A serial digital data transmission device according to an eleventh invention is the serial digital data transmission device according to the ninth invention or the tenth invention,
Since the digital data is expressed in the rotation direction of the transmission path having a specific potential and the serial digital data and the clock are transmitted at the same time, the data can be reproduced without requiring the reference potential on the receiving side.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of a serial digital data transmission device according to the present invention.

FIG. 2 is a block diagram showing a specific configuration example of a modulator in the transmission device shown in FIG.

3 is a state transition diagram showing a transition of a potential state of a transmission line in the transmission device shown in FIG.

4 is a waveform diagram showing an input waveform of a modulator in the transmission device shown in FIG.

5 is a waveform diagram showing an output waveform of a modulator in the transmission device shown in FIG.

FIG. 6 is a waveform diagram showing an input waveform of a demodulator in the transmission device shown in FIG.

7 is a waveform diagram showing an output waveform of a demodulator in the transmission device shown in FIG.

8 is a block diagram showing a specific configuration example of a demodulator in the transmission device shown in FIG.

FIG. 9 is a block diagram showing another configuration of the serial digital data transmission device according to the present invention.

10 is a waveform diagram showing input / output waveforms of a modulator in the transmission device shown in FIG.

11 is a waveform diagram showing an output waveform of a differential driver circuit in the transmission device shown in FIG.

12 is a block diagram showing a specific configuration example of a differential driver circuit in the transmission device shown in FIG.

13 is a state transition diagram showing transition of the potential state of the transmission line in the transmission device shown in FIG.

14 is a waveform chart showing an input waveform of the differential receiver circuit in the transmission device shown in FIG.

15 is a waveform diagram showing an output waveform of the differential receiver circuit in the transmission device shown in FIG.

16 is a block diagram showing a specific configuration example of a differential receiver circuit in the transmission device shown in FIG.

17 is a waveform diagram showing an output waveform of the demodulator in the transmission device shown in FIG.

[Explanation of symbols]

 10: Modulator 20u, 20v, 20w: Transmission line 30: Demodulator 40:・ ・ ・ Modulator 50 ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Differential driver circuit 60r, 60s, 60t ・ ・ ・ Transmission path 50 ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Differential receiver circuit 60 ..................... Demodulator

Claims (11)

[Claims] 1. Use of three or more transmission lines, one of which
A method of transmitting serial digital data, characterized in that serial digital data and a clock are simultaneously transmitted by a change in the potential of a transmission line of a book. 2. The method for transmitting serial digital data according to claim 1, wherein the digital data is expressed in a rotating direction of the transmission line whose potential changes. 3. The method of transmitting serial digital data according to claim 2, wherein the digital data is expressed by whether or not the rotation direction of the transmission line whose potential changes is reversed. 4. Use of three or more transmission lines, two of which are used.
A method of transmitting serial digital data, characterized in that serial digital data and a clock are simultaneously transmitted by a change in the potential of a transmission line of a book. 5. The serial digital data transmission method according to claim 4, wherein the potentials of the transmission lines in the steady state are made different, and the potentials of the transmission lines close to each other are exchanged. 6. The method for transmitting serial digital data according to claim 4 or 5, wherein digital data is expressed in a rotation direction of a transmission line having a specific potential. 7. The method for transmitting serial digital data according to claim 6, wherein the digital data is expressed by whether or not the rotation direction of the transmission path having the specific potential is reversed. 8. A transmission line having three or more electric wires and three or more output terminals to which the transmission lines are connected, and one of the transmission lines connected to each output terminal The potential is changed in synchronization with the clock supplied to the clock input terminal, the serial digital data supplied to the data input terminal is expressed by the rotation direction of the transmission path where the potential changes, and the serial digital data and clock are output terminals. And a three-or more input terminal connected to the transmission line, and detects a change in the potential of the transmission line connected to each input terminal to reproduce a clock to output a clock output terminal. Output the reproduction clock, detect the rotation direction of the transmission line where the potential changes, reproduce the serial digital data, and output the reproduction serial digital data from the data output terminal. A serial digital data and a clock are simultaneously transmitted as transmission data due to a change in the potential of one of the transmission lines, and the serial digital data is transmitted at the same time. apparatus. 9. A transmission line having three or more electric wires and three or more output terminals to which the transmission lines are connected, each output terminal having a serial digital data supplied to a data input terminal. Modulating means for simultaneously outputting serial digital data and a clock from the output terminal by exchanging the potentials of two of the connected transmission paths in synchronization with the clock supplied to the clock input terminal. It has three or more input terminals connected to the above-mentioned transmission lines, detects the exchange of the potentials of two transmission lines of each transmission line connected to each input terminal, and reproduces a clock and serial digital data. A reproduction clock is output from the clock output terminal, and demodulation means for outputting reproduction serial digital data from the data output terminal is provided, and three or more transmission lines are used. An apparatus for transmitting serial digital data, characterized in that serial digital data and a clock are simultaneously transmitted as transmission data by exchanging potentials of two transmission paths. 10. The serial digital data and the clock are simultaneously transmitted by making the potentials of the respective transmission lines different in a steady state and exchanging the potentials of two transmission lines whose potentials are close to each other. The serial digital data transmission device according to claim 9. 11. The serial digital data according to claim 9 or 10, wherein digital data is expressed in a rotation direction of a transmission path having a specific potential, and serial digital data and a clock are simultaneously transmitted. Transmission equipment.