JPH06261075A - Exchange system - Google Patents

Abstract

PURPOSE:To obtain an economical exchange system with high processing capability and excellent extension performance by providing a call processing function to each exchange means so as to form an independent distribute type exchange system. CONSTITUTION:Peripheral exchange modules FM 102-109 are connected to a central exchange module CM 101 and a signal from a subscriber line 110 is added to a destination address at the module FM and the result is sent to the module CM 101. The CM 101 references the address to switch relevant relay line side peripheral exchange modules TM 108 or 109 and the TM excludes a header and a signal is sent to the relay line. Subscriber interfaces in pairs are combined and they are installed distributingly but a relay line interface TM is installed close to the CM and number of the FMs and ratio of numbers SM, TM are decided depending on the state of stations. Thus, the central resource management of the peripheral exchange modules is not required and the processing capability of the entire exchange system is enhanced and extension/expansion are executed independently of the processing capability of the central exchange module.

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an exchange used in a telephone communication network or the like, and is particularly suitable for high speed wide band communication and is distributed in consideration of scale expansion. The present invention relates to the configuration of a form exchange system. 2. Description of the Related Art A switching system is moving toward higher speed and wider band, larger capacity of transmission line, and further improvement of reliability. As one concrete measure against this, it is conceivable to decentralize the communication path system, especially the concentration stage. That is, the processing capacity is improved by the load distribution effect, the capacity of the entire exchange is increased, the building block property is secured (the optimum configuration can be taken according to the scale of the station), and the risk distribution is achieved by the physical distribution arrangement. Try to. The conventional role of the exchange was to exchange low-speed telephone voice, but it is expected that demand for high-speed data communication including images and so-called multimedia communication will increase in the future. Therefore, the exchange is required to dramatically improve call processing capacity, but the processing capacity of the processor is limited to some extent. As a measure for improving the processing capacity, there is a function distribution and a load distribution due to the multiprocessor, but the software becomes complicated and communication between processors becomes a bottleneck, and there is still a limit. From the viewpoint of expandability and risk dispersion, it is desirable that the exchanges are modularized for each functional unit and physically distributed, but in that case also the processors themselves are distributed. If the independent distributed configuration is not adopted, the load on the central processor will not change, but rather the number of control lines for controlling each module will increase. On the other hand, although demand for high-speed data communication and multimedia communication grows as described above, there are regional and temporal biases, and it is economical to use only a high-performance and large-capacity exchange. Network cannot be configured. Therefore, the architecture can be used in the future, and the scale can be flexibly configured from small capacity to large capacity, that is, the building block property is important. FIG. 2 shows the basic structure of a conventional exchange. A speech path system and a control system 20 including a concentrating stage 201 having a subscriber interface and a distributing stage 202 for switching.
3, maintenance and operation system 205 and signal processing system 204 (see "Digital switching system" published by The Institute of Electronics and Communication Engineers, p.17, Fig. 3.1 Basic Configuration of Switch). In order to achieve dispersion with this configuration, it is conceivable that the concentrating stage 201 is distributed and modularized (distributed concentrating stages 301 and 302) as shown in FIG. 3, and the control is performed as described above. The burden on the system does not change. Since it is physically distributed, it is dangerously distributed in the event of a disaster, but for example, if a certain concentrator module fails, the entire system is centrally managed by the control system. For example, the process of disconnecting the defective module must be performed.
Overhead is generated in the centralized management unit, which affects the entire system. As described above, in the distributed switching system of the type in which the communication path system is distributed and the control system is concentrated in one place, the processing capacity of the control system is limited. Therefore, the advantage of load balancing cannot be fully utilized. That is, it is desirable that the future exchange system has an independent decentralized configuration in which the control system is also dispersed. However, if each module is independent, when trying to communicate from one module to another module, the module on the transmitting side will see if the transmission path to the other module is open, I have to know if there is an available line. That is, resource management is required. Normally, resource management is often performed centrally even in a distributed system, but if resource management is centralized at one place, all modules will make inquiries to this centralized management unit, so it is particularly large-scale. In the case of a system, this is the bottleneck in processing. On the other hand, if each module is completely independent and distributed, one module always knows the status of all the other modules, or checks the status of the other module at every call setup. There must be. In the former, it is necessary to either notify all other modules when the status of one module changes, or each module checks the status on a regular basis. When only one line remains available in a certain module, there is a possibility that a plurality of other modules simultaneously make communication requests toward the module. In the latter case, such a problem does not occur, but in any case communication between all modules is necessary. For this reason, for example, it is possible to stretch the communication line between each module in a mesh shape.
This is uneconomical both physically and from the standpoint of having to further manage communications. It is an object of the present invention to construct a distributed switching system which is more economical and has high processing capacity. Specifically, it is a distributed switching system having a transmission line such as a bus or a device (central switching module) commonly accessed by peripheral switching modules, and the common part such as the bus type transmission line is a bottle for call processing. So as not to become a neck
The purpose is to build a distributed switching system in which each peripheral switching module can perform call processing independently. In order to achieve the above object, a plurality of peripheral switching modules 402, each having an interface circuit for transmitting / receiving a signal to / from a subscriber line or a trunk line, as shown in FIG. A distributed switching system is constituted by 403, 404, and 405 and one or a plurality of central switching modules 401 connected to each of the plurality of peripheral switching modules via transmission lines. The peripheral switching module has a function of determining a destination route of a signal input from a subscriber line or a trunk line, and includes a block of information in which a header including the signal and the destination peripheral switching module number is placed on the transmission line ( (Called packets, blocks, cells, etc.) to the transmission line, a state management function for always storing the free / busy state of the subscriber line or relay line, and the subscriber line when requested. Alternatively, it has a function of determining whether the trunk line is open or closed, and a function of transmitting / receiving the result of the determination between the plurality of peripheral exchange modules. The central exchange module is a module for connecting the peripheral exchange modules to each other, and may be a simple bus type transmission line, a loop type transmission line, or a switch. In the case of a switch, the following measures are required to avoid the packet collision. That is, the space switch connecting a plurality of time switches and the time switches, and the open / close management of the link (the management unit that gives each call when connecting the switches) corresponding to the input highway of the space switch, It is performed for each frame (the signal on the transmission path is divided into appropriate times for convenience),
Refer to the first state management memory and the second state management memory and the first and second state management memories for performing the open / close management of the link for each frame corresponding to the outgoing highway of the space switch, and refer to the same. This is a configuration having a circuit that generates a write or read address for each of the plurality of time switches so that a plurality of time slots having destinations are not switched at the same time. With the above configuration, the following call setup is performed. When there is a call request from a subscriber to a peripheral switching module, the peripheral switching module analyzes the dialed digits to know the destination route. Next, an arbitrary peripheral switching module belonging to the destination route is selected and a calling signal is sent. This calling signal includes the destination of the selected peripheral switching module number as a header, and the call number, selected number, signal speed, and used time slot number are written as signals.
It is one packet placed in a time slot on the transmission path. A time slot is a subdivided frame, and is a basic unit of division and multiplexing in the time division multiplexing technique. This time slot is sent to the central switching module via the transmission line. When the central switching module is a transmission line, this transmission line multiplexes packets from each peripheral switching module and connects the peripheral switching modules, so each peripheral switching module reads the header of each packet and If there is something addressed to, take it in. On the other hand, when the central switching module is a switch, the central switching module reads the header and switches this packet to the transmission line connected to the destination peripheral switching module. When the peripheral switching module designated as the destination receives the time slot in which this packet is carried, it judges whether the line of the subscriber line or the trunk line is empty, and then sends a response signal back to the transmitting peripheral switching module. This response signal is also a packet having a configuration similar to that of the calling signal. The number of time slots in which packets are put will be specifically described later, but since the time slots are set so that there are free time slots as long as the line is free, a response signal is always returned if the line is free. On the contrary, if the response signal is not returned within a certain period of time, it is determined that the line could not be captured, and the calling signal is sent again to another peripheral switching module belonging to the same route. When the response signal is returned, the call setup is completed at that point. After that, in each frame, the signal is sent out using the same time slot that has already been notified to the destination peripheral switching module by the calling signal. At this time, the central switching module only reads the destination of the header and switches it, without intervention of the processor. As described above, the central switching module, which is a common unit, can perform call setting only by the peripheral switching module without performing processing other than packet distribution. Further, also in the subsequent call state, the central switching module switches autonomously based on the header of each time slot. An embodiment of the present invention will be described below with reference to FIG. FIG. 1 shows a speech path system of a switching system according to the present invention, which is a central switching module (CM: Central Modul).
e) A peripheral exchange module (FM: Front-end Modu) centered on 101 and via transmission lines 111, 112, etc.
le) 102-109 are connected. SM in the figure
Peripheral exchange modules 102 to 105 described as (Subscriber Module) have subscriber line interfaces, and peripheral exchange modules 106 to 109 described as TM (Trunk Module) have trunk line interfaces. For example, a signal arriving from the subscriber line 110 is added with a destination address by the peripheral switching module 102, passes through the inter-module transmission line 111, and is then transmitted to the central switching module 10.
Sent to 1. The central switching module 101 refers to the address written in the header. For example, if the destination is the peripheral switching module 108, the inter-module transmission line 1
Switch to 12. The peripheral exchange module 108 removes the header and sends the signal to the trunk line 113. The same applies to communication from the trunk line side to the subscriber line side. Since normal communication is bidirectional, the peripheral switching module (SM) of the subscriber line interface is
For example, as shown by 102 and 104 and 103 and 105, one pair is combined and distributed. Since the peripheral exchange module (TM) of the trunk line interface does not need to be installed in a distributed manner, it is placed close to the central exchange module. The number of peripheral exchange modules and the ratio of SM to TM can be freely determined according to the situation. Of course T
If only M is installed, it functions as a transit exchange. Next, further details will be described with reference to FIG. The peripheral exchange module 102 includes a time switch 501, a link interface 502, a control system 503, and a state management memory 500. From the subscriber line, signals from the subscriber, which are time-division multiplexed via a line concentrator (not shown), are input. The time switch 501 rearranges the time-division multiplexed signals according to the destination module according to an instruction from the control system 503. The link interface 502 adds a header such as a destination address to the link interface 502, puts the signal to the same destination on a time slot, and sends it to the central switching module 101. The central switching module 101 includes link interfaces 504 and 514 and time switches 505 and 51.
It is composed of a 5-channel match logic 511, a space switch 506, and time switches 507 and 517. The time slot received from the peripheral exchange module 102 reads the header at the link interface 504. The channel match logic 511 uses the header information of each time slot arriving from each peripheral switching module to read or write the time switches 505 and 515 so that a plurality of time slots having the same destination do not exist at the same time. Generate an address. This operation can be performed only by the wired logic. The time switches 505 and 515 switch time slots based on the address generated by the channel match logic. The time slots in one frame are switched so as not to completely collide with each other, that is, are non-blocked. The outgoing link operates at twice the speed of the incoming link. The space switch 506 switches each time slot by the destination address written in its header and sends it to the time switches 507 and 517 connected to the destination peripheral switching module. The time switches 507 and 517 restore the operation speed to the original value and send the time slot to the transmission path connected to the peripheral switching module. The peripheral exchange module 104 includes a link interface 509, a time switch 510, and a control system 50.
8. State management memory 518. The time slot arriving from the central switching module 101 has its header removed by the link interface 509, the signal is written to the time switch 510 at the address indicated by the control system 508 based on the information in the header, and the signal is time-divided again. It is multiplexed and sent to the trunk line. The signal flow has been described with reference to FIG. 5. Next, the operation at the time of call setup will be described. As shown in FIG.
When the subscriber line side peripheral switching module (hereinafter abbreviated as SM) detects a call, it performs route analysis. Therefore, each SM needs to have all necessary data by itself. When the destination route is determined, there are generally a plurality of trunk line side peripheral switching modules (hereinafter abbreviated as TM) for each route, and any one is selected from them. Although various selection algorithms can be considered, since the peripheral switching modules on the transmitting side do not communicate with each other, an algorithm is preferable in which each peripheral switching module on the transmitting side selects different peripheral switching modules on the receiving side as much as possible. For example, if there are many communications from a specific SM to a specific route, the SM always selects a specific TM, other SMs do not select the TM, and so on. After selecting the TM, a calling signal is sent to the TM. This may be sent using another signal line, but in the present embodiment, the time slot of the communication path is used. In the information part of the calling signal, the call number, the selected digit, the signal speed, and the used time slot number are written. T
M then receives it thereafter. It is possible to recognize which time slot (if one time slot includes a plurality of calls), what number of bits and how many bits of information is the call. (A method of placing a plurality of calls destined for the same route in one time slot in order to reduce the overhead of the header is common as a kind of group exchange.) The TM that receives the calling signal is shown in FIG. The control system 508 refers to the state management memory 518 to determine the free / busy state of the line accommodated by itself, and if there is a free space, capture one of the lines and use the line state management memory 518.
Rewrite and send back a response signal. The response signal is this reception T
It is sent from the outgoing TM paired with M and the outgoing S
It is received by the SM paired with M. In the response signal,
Write the call number and used time slot number. When the response signal is received by the SM, the call setup is completed.
According to this method, the peripheral switching module manages the state of the line it accommodates, determines whether the line is blocked or not, and notifies the state of the line, capturing the line and communicating without intervening the central switching module. The time slot to be used can be secured. FIG. 6 shows the frame structure of the inter-module transmission path. Here, 125 μs is set as one frame, and it is divided into m time slots. Each time slot includes a header 601 and an information section 602. FIG. 7 shows the structure of the time slot in more detail. The header 601 is divided into five areas. The contents of each are empty / in-use display 701, exchange information / call control information indicator 702, destination address 703, originating address 704, and call number 705. Next, the number of time slots and the length of the information part will be described. As a precondition, it is assumed that there are n peripheral switching modules accommodating a maximum of c lines, the header in the time slot is h bytes, and the information part is i bytes. The number t of time slots in one frame satisfies the following condition. That is, in the most inefficient state, only the information of one voice line (that is, 1 byte) is sent to the (n-1) destinations other than the certain destination peripheral switching module. {C- (n-
1)} Even if all of the information on the line is centrally sent to one destination peripheral switching module, the time slots must not run short. Expressed by the formula, it is necessary to satisfy the following equation: t ≧ (n−1) + c− (n−1) / i. On the other hand, the overhead o due to the header can be expressed as follows. ## EQU2 ## o = t.multidot. (H + i) / c The larger the number of time slots t, the larger the overhead. Therefore, the optimum values of t and i can be obtained from the above equations 1 and 2. By determining the number of time slots in this way, a peripheral switching module can always secure a time slot for communicating with the peripheral switching module as long as a line is available. It will be possible only when the line is closed. Next, the channel matching logic in the above-mentioned exchange unit will be described in more detail. FIG. 9 shows a block diagram of the channel match logic unit. Link interfaces 504 to 514 and time switches 505 to 515
The space switch 506 is the same as that described in FIG. The channel match logic 511 includes an address multiplexer 901, a primary link management memory 902, a secondary link management memory 903, and an address calculator 904. The “primary link” mentioned here is an input side link of the space switch 506, and the “secondary link” is an output side link of the space switch 506. Link interfaces 504 to 514
The header is read in and is multiplexed by the address multiplexer 901. Source address (SA) is 1 in the header contents
The read address of the next link management memory 902 is set, and the destination address (DA) is set to the read address of the secondary link management memory 903. In the primary link management memory 902, the empty / busy state of each time slot of the primary link corresponds to the peripheral exchange module, and in the secondary link management memory 903, the empty / busy state of each time slot of the secondary link corresponding to the peripheral exchange module. Is written. Since the space switch has a double operation speed in order to provide a non-block communication path, the number of time slots is twice the number of time slots input in one frame cycle. At some point in the frame, one can see how many timeslots of the primary and secondary links are free in that frame. This will be described more specifically with reference to FIG. The figure shows a time slot coming in from the i-th peripheral switching module on the input side to the j-th peripheral switching module on the output side. (In the figure, 1 is closed, 0 is empty)
The contents of the primary link management memory and the secondary link management memory are read at the source address #i and the destination address #j, respectively. A vacant place is commonly obtained by ORing the two, and the vacant space near the first head of the frame is used as the address at which this time slot should be written in the time switch. The position used is rewritten from 0 to 1, and is fed back to the primary link management memory and the secondary link management memory. The time slot thus arrived is randomly written to each time switch based on the write address, and the primary link management memory and the secondary link management memory are rewritten to process one frame. After that, send the space switch 506 to the space switch 506 by sequential read.
In switching at 06, no time slot collisions occur. In the above description, the time switch has a so-called double buffer structure having a write surface and a read surface and alternately using them. Moreover, although the random write and the sequential read have been described, the same function can be obtained by the sequential write and the random read. The space switch 506 may be any switch that can autonomously switch according to the destination address of the header of each time slot, and various configurations are conceivable. Figure 1
1 shows an example. Here, the selector 11 is associated with each destination.
11 to 1113 are provided, and the switching address generation circuit 1121
˜1123, a switching address is generated based on the header information and switching is performed. The retiming circuits 1101 to 11 for adjusting the timing.
21 is provided. As can be seen from the above description, the central exchange module is a passive module that can be constructed by wired logic and that does not require a control processor. FIG. 12 shows a system configuration example. In this configuration example, a plurality of central exchange modules are provided to achieve load distribution and risk distribution. Such decentralization is easy because the central exchange module is a passive module. Since it is configured so that the same peripheral exchange module can be reached via either of the central exchange modules, even if one fails, there is no problem unless the other is overloaded. According to the present invention, each peripheral switching module only needs to manage the line it accommodates, and does not need centralized resource management, so there is no processing bottleneck in the common section and switching is possible. High processing capacity can be obtained as a whole system.
Also, each peripheral replacement module has its own processor,
It is an independent distributed module that can perform all call processing, while the central switching module, which is a common part, does not have a call processing processor, is a simple transmission path, or is a configuration with all wired logic. The capacity does not become a bottleneck, and high processing capacity can be obtained as the entire exchange system. Further, since the expansion and expansion can be performed without worrying about the processing capacity of the central exchange module, which is a common part, by changing the number of peripheral exchange modules, flexibility from a small scale configuration to a large scale configuration can be obtained. Various configurations are possible. Further, since the central switching module having the switching function has neither the processor nor the memory held in the switch, the intermittent failure has no effect on time later, and one peripheral switching module fails. However, it is possible to construct a highly reliable distributed switching system that has almost no effect on the central switching module. In summary, according to the present invention, load balancing,
Danger dispersion allows for high processing power and high reliability,
It is possible to build a distributed switching system.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a configuration example of a distributed switching system of the present invention. FIG. 2 is a block diagram showing a conventional example. FIG. 3 is a block diagram showing a conventional example. FIG. 4 is a block diagram showing a basic configuration of the present invention. FIG. 5 is a block diagram showing an embodiment of the present invention. FIG. 6 is an explanatory diagram of a frame configuration according to the embodiment of this invention. FIG. 7 is an explanatory diagram of a time slot configuration according to the embodiment of this invention. FIG. 8 is an explanatory diagram of a call control sequence of the present invention. 9 is a block diagram of an embodiment showing a part of FIG. 5 in detail. 10 is an explanatory diagram of the operation of FIG. FIG. 11 is a block diagram of an embodiment showing a part of FIG. 5 in detail. FIG. 12 is a block diagram showing a system configuration example. [Explanation of Codes] 101 ... Central Exchange Module, 102-109 ... Peripheral Exchange Module, 500 ... State Management Memory, 501 ... Time Switch, 502, 504 ... Link Interface, 503 ... Control Circuit, 505, 507 ... Time Switch, 506 ... space switch, 511 ... channel match logic, 901 ... address multiplexer, 902 ... primary link management memory, 903 ... secondary link management memory, 904 ... address calculator.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical display location H04Q 11/04 9076-5K H04Q 11/04 K (72) Inventor Takao Kato Totsuka Ward, Yokohama City, Kanagawa Prefecture 216 Totsuka-cho, Hitachi Ltd., Totsuka Plant (72) Inventor Hiroshi Kuwahara, 1-280 Higashikoigakubo, Kokubunji, Tokyo Stock Company Hitachi Central Research Laboratory

Claims (1)

[Claims] 1. A plurality of switching means operating independently of each other having call processing means for performing call processing corresponding to subscriber line or trunk line information, and information transmitted / received via the subscriber line or trunk line to the information A switching system which is connected to a communication network having a transmission means for transmitting a fixed-length packet to which a header including information corresponding to is transmitted. 2. The switching system according to claim 1, wherein the transmission means has a plurality of the fixed-length packets, and the switching means determines a destination of information input from a subscriber line or a trunk line, and the transmission means. Means for sending the fixed length packet with the information and a header including the destination information corresponding to the destination exchange means and sending it to the transmission means, and a state management means for storing the idle / busy state of the subscriber line or the relay line. When,
An exchange system comprising: a determination unit that determines whether a subscriber line or a trunk line is vacant, and a unit that transmits and receives the output of the determination unit via a transmission unit between the exchange unit that transmits and receives the information.