JPH06233054A - Ccd line sensor driving device - Google Patents

Abstract

PURPOSE:To arbitrarily change the document read speed while fixing the electric charge storage period of a CCD and to correctly output the quantity of electric charge corresponding to the quantity of received light. CONSTITUTION:A CCD start signal ASTRT is so generated that a read period T is divided into plural continuous reference sections Ri and dummy sections Di. The gate signal generated in accordance with this CCD start signal ASTRT is given to the gate part of a CCD line sensor to transfer the electric charge stored in a light reception part to a transfer part. The picture signal outputted from the transfer part to the second reference section R2 out of the output of the CCD line sensor is taken out based on a read signal AREAD. The transfer signal whose period is shorter than that in reference sections is given to the transfer part of the CCD line sensor in dummy sections D1 and D2 to transfer the electric charge at a high speed, thereby preventing the electric charge from remaining in a shift register at the time of the end of the dummy section.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CCD line sensor driving device using a CCD (charge coupled device).

[0002]

2. Description of the Related Art A CCD line sensor is composed of a large number of photoelectric conversion / light receiving elements (photocells) arranged in a row, a transfer section including a shift register provided for each light receiving element, and a light receiving element. The gate section is provided between the transfer section and the transfer section. Each light-receiving element of the light-receiving section generates electric charge according to the amount of received light, and the generated electric charge is accumulated therein as time passes. When the gate is opened by the gate signal after the lapse of a predetermined time (charge storage time), all the stored charges are transferred to the corresponding shift register. The charge transferred to each shift register of the transfer unit is sequentially transferred between adjacent shift registers by a transfer signal sequentially applied to each shift register, and is output as a serial signal from the output end.

On the other hand, in an image reading apparatus used in a plate making apparatus or the like, there is a method of moving an original in one direction and reading an image of the original using a CCD line sensor having a light receiving element arranged in a direction perpendicular to the original. Generally done. Here, it is necessary to appropriately change the reading speed of the image reading device depending on the processing capability of a device that receives the input image data (for example, an image processing device or a plate-making output device). However, if the moving speed of the document is changed for this reason, the charge storage time of the line sensor also changes, and the signal output from the CCD line sensor also changes. Further, when the moving speed is slowed down, the electric charge generated in the light receiving unit exceeds the upper limit value for accumulating and overflows. On the contrary, when the moving speed is increased, the amount of accumulated charge becomes very small, the sensitivity becomes low, and the S / N ratio becomes poor.

In order to avoid these problems, it is conceivable that the charge accumulation time of the light receiving portion is kept constant regardless of the reading speed and the reading line of the original is thinned according to the moving speed of the original.
However, such a method has a disadvantage in that the reading can be performed only at a speed which is an integer fraction of the predetermined reading speed, and the reading speed cannot be set arbitrarily.

To address this problem, Japanese Patent Publication No. 1-227
The following technique is proposed in Japanese Patent Laid-Open No. 93. As shown in FIG. 6, a clock signal that is sufficiently faster than a read signal that generates a pulse signal in accordance with the read cycle is used, the number of clock pulses is counted immediately after the read signal, and a gate signal is generated for each predetermined number. To generate. The gate of the CCD is opened by the gate signal, and the charges accumulated in the light receiving portion are transferred to the shift register. The transferred charges are sequentially transferred through the shift register until the next gate signal is generated, and are output as an image signal from the output end. The period of the gate signal (that is, the charge accumulation time) is set to be 1/2 or less of the period of the read signal when the document is read at the highest speed (that is, when the period of the read signal is the shortest). Only the signal output in one complete section (section B), which is not the section (section A in FIG. 6) adjacent to the read signal, is used as the normal image signal. As a result, even if the read signal is arbitrarily changed, it is possible to output the image signal obtained by the constant charge accumulation time.

[0006]

However, in this method, when the reading speed is arbitrarily determined, the reading pulse period is generally not an integral multiple of the charge accumulation period. Thus, a section shorter than the normal charge storage time occurs. At the end time t0 of this section C, the transfer is aborted in the transfer section, so that the charge 72 remains in a part of the shift register of the transfer section, as shown in FIG. 7A. Even if the gate is opened at time t0 and the charge 71 accumulated in the light receiving portion is transferred to the shift register, there is a limit 79 in the amount of charge that can be accommodated in the shift register, so that part 73 flows back to the light receiving portion. (Fig. 7
(B)). The backflowed charge 73 is added to the charge 74 accumulated in the next section A after the gate is closed (FIG. 7C), so the charge amount 75 output in the section B is 75.
(FIG. 7D) is no longer a value according to the amount of received light.

The present invention has been made to solve the above problems, and its purpose is to provide a CCD.
It is an object of the present invention to provide a CCD line sensor driving device capable of arbitrarily changing the reading speed of an original while keeping the charge accumulation time constant and further correctly outputting an image signal according to the amount of received light.

[0008]

SUMMARY OF THE INVENTION A CCD line sensor driving device according to the present invention, which has been made to solve the above-mentioned problems, has a light-receiving section including a plurality of light-receiving elements, and a transfer section including a gate section and a plurality of registers. And a CCD line sensor configured to generate a gate signal so as to divide the reading cycle into a plurality of continuous reference sections and a dummy section shorter than the reference section, and a gate signal for giving the gate signal to the gate unit. Generating means, transfer signal generating means for giving a transfer signal to the transfer part so as to sequentially output the charges of the transfer part as an image signal, and an image output from the transfer part in the latter section of continuous reference sections. In the CCD line sensor driving device, the transfer signal generating means includes at least the register in each section. Wherein the switching frequency of the transfer signal in accordance with the number of pulses corresponding to the length of each section so as to generate as the transfer signal to.

[0009]

The gate signal generating means transfers a charge accumulated in the light receiving portion of the CCD line sensor to the transfer portion by giving a gate signal to the gate portion of the CCD line sensor. The gate signal is generated according to the reading cycle,
The pulse signal divides the reading cycle into a plurality of reference intervals and a dummy interval shorter than the reference interval. The length of this reference section is constant regardless of the reading cycle. The charges transferred to the transfer section are transferred in the shift register of the transfer section in synchronization with the transfer signal generated by the transfer signal generating means, and are sequentially output as image signals. However, in order to prevent charge overflow in the transfer section for each section,
All charges in the shift register need to be swept out.
Therefore, in each section, a transfer signal having a pulse number corresponding to the number of registers of the shift register is given to the transfer unit. Since the dummy section is shorter than the reference section, the transfer signal generating means switches the transfer signal to a frequency higher than that of the reference section in the dummy section. Then, the extraction means outputs the image signal accumulated in one reference section and transferred in the reference section immediately after that as an effective image signal.

Therefore, since the charges do not remain in the transfer section, it is possible to prevent the backflow of the charges to the light receiving section, which is caused by the charge overflow in the transfer section, and the light receiving section properly corresponds to the density of the image. Can store charge. Further, regardless of the reading cycle, since the electric charge accumulated in the reference section having a constant length is always output as an effective image signal, a stable image signal can always be output accurately.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An image reading device using a CCD line sensor driving device according to the present invention will be described with reference to FIGS. In the image reading apparatus of this embodiment, as shown in FIG.
Is placed on the document table 11, and the document 12 is illuminated by the linear light source 15 from below. The light reflected on the surface of the original 12 passes through the reflecting mirror 16, the lens 17, etc., and the CCD line sensor 1
It is incident on 8. As a result, the image of the straight line portion of the original 12 is read by the CCD line sensor 18 and converted into an electric signal. The document table 11 is connected to the CCD line sensor 1
A two-dimensional image of the document 12 is obtained as a serial electric signal from the CCD line sensor 18 by moving the document 8 in a direction (Y direction) at a right angle to the arrangement direction of 8 (which is referred to as X direction). The original table 11 is moved by a motor 14. The electric signal output from the CCD line sensor 18 is converted into digital data by the A / D converter 22, and only the effective image signal is extracted by the extraction circuit 28, and then various data processing (for example, by the image processing unit 24 is performed. , Color correction processing, contour enhancement processing, etc.) are performed.

The CCD line sensor 18 comprises a light receiving portion, a gate portion and a transfer portion. The light receiving section is composed of a plurality of light receiving elements, and the transfer section is a shift register composed of a number of registers corresponding to the number of light receiving elements of the light receiving section. When a pulse signal is applied to the gate section, the charges accumulated in the light receiving section are transferred to the transfer section. Further, when a transfer signal is given to the transfer unit, the charges transferred to each register are shifted in the shift register in synchronization with the transfer signal and are sequentially output as an image signal.

The entire operation of the image reading apparatus is controlled by the control unit 2.
Controlled by 3. First, the control unit 23 controls the motor drive circuit 2 so that the platen 11 moves at the designated reading speed.
Send speed signal to 0. As a result, when the motor 14 moves the document table 11 in the Y direction, an image signal corresponding to the image of the document 12 is output from the CCD line sensor 18 (A / D converter 2).
2 and) via the extraction circuit 28 to the image processing unit 24. In the control unit 23, the CCD line sensor 18 controls the original 12
So that it always operates in the optimum state regardless of the reading speed of
The necessary various timing signals are given to the CCD drive circuit 21, and also the extraction circuit 28 receiving the image signal from the CCD line sensor 18 accumulates at a constant basic charge accumulation time TL regardless of the reading speed. It provides the necessary timing signals to extract the charge as an effective image signal. The CC in the image reading apparatus of this embodiment will be described below.
The operation of the portion that drives the D line sensor 18 will be described.

As shown in FIG. 3, the control unit 23 includes an oscillator 231, a frequency dividing circuit 232, and a timing generating circuit 233.
And a CPU 234. The frequency dividing circuit 232 frequency-divides / decreases the high-speed clock signal from the oscillator 231 to generate a reference clock signal ACLK (for example, about 10 MHz) which is an operation reference of the CCD drive circuit 21,
It is supplied to the CCD drive circuit 21. Timing generation circuit 2
33 is a basic synchronization signal AS from the CPU 234 of the control unit 23.
YNC and the reading speed signal VR are received to generate a CCD start signal ASTRT and a dummy signal ADUMY, and C
It is supplied to the CD drive circuit 21.

The basic synchronization signal ASYNC is a signal for synchronizing with other devices that use the image data output by the image reading device in real time, and may be generated by the image reading device itself. However, in this case, the basic synchronization signal ASYNC is supplied from the image reading device to another device, and may be supplied from another device. The basic synchronization signal ASYNC may be much slower than the reference clock signal ACLK, and for example, about 200 Hz is sufficient. The reading speed signal VR is a signal indicating the set reading speed, and is determined according to the processing capacity of the image processing unit 24. Therefore, when the image processing unit 24 to be connected is changed, the reading speed signal VR is changed according to the processing speed.

As described above, the timing generation circuit 233 is
Upon receiving the basic synchronization signal ASYNC and the reading speed signal VR, the CCD start signal ASTRT and the dummy signal ADU
The MMY and the read signal AREAD are generated. The operation of the timing generation circuit 233 will be described with reference to the output signal waveform shown in FIG.

The CCD start signal ASTRT is obtained by dividing the time required to read one scanning line obtained from the reading speed signal VR (hereinafter referred to as the reading cycle T) into a plurality of consecutive (reference charge accumulation time T divided by time TL). The pulse signal is generated so as to be divided by the reference charge accumulation time TL of the number m) corresponding to the value of the quotient, and the remaining time TR is divided by the time t shorter than the time TL. In addition,
Assuming that the sections corresponding to the reference charge accumulation time TL and the time t are the reference section Ri and the dummy section Di, respectively, the reference section Ri
(However, i = 1, 2, ..., M) are continuously (m), and then dummy sections Di (i = 1, 2,
... n. However, n is an integer of 1 or more. ) Follows, and these are sequentially repeated.

Therefore, when a gate signal generated according to the CCD start signal ASTRT is applied to the gate portion of the CCD line sensor 18 for driving, the charge accumulated in the light receiving portion in a certain section is output in the section immediately after that. It will be. That is, from the CCD line sensor 18, the section R
, Rm, D1, D2, ..., Dn are output from the transfer section in the intervals R2, R3 ,.

Further, the dummy signal ADUMY is the CCD
It is a signal for switching the frequency (cycle) of the transfer signal given to the gate portion of the line sensor 18, and is a signal that becomes "HIGH" in the dummy section Di. The read signal AREAD generates a pulse signal before the second section R2 of the continuous plurality of reference sections Ri starts. This signal is a signal that indicates in which section of each section of one reading cycle T the image signal output is valid, and the charge is accumulated in the reference section R1 and output from the transfer unit in the reference section R2. It is used to extract the image signal in the extraction circuit 28.

FIG. 1B shows the timing generation circuit 233.
A concrete example of a signal waveform output from the following is shown. For example, the basic charge storage time TL is 20 (msec) and the reading speed is 5
0 (msec / scan line) Basic sync signal cycle is 5
(Msec). In this case, the CCD start signal has a reading cycle T of two reference intervals R of 20 msec.
1, R2 and the remaining section (10 msec) for two 5 ms
It is a pulse signal that is divided into dummy sections D1 and D2 of ec. Further, the dummy signal ADUMMY is "H" in the section R2.
IGH "is output. Also, read signal A
READ outputs a pulse signal at the start of the section R2.

Further, as shown in FIG. 3, the CCD drive circuit 21 is for driving the CCD line sensor 18 of the two-phase drive system, and includes a gate signal SH and a transfer signal φ1,
φ2 is applied to the gate section and the transfer section of the CCD line sensor 18, respectively. The gate signal SH is CCD
It is a pulse signal generated immediately after the start signal ASTRT is generated. When the gate signal SH is applied to the gate section, the charges accumulated in the light receiving section are transferred to the transfer section. The transfer signals φ1 and φ2 are dummy signals ADUMM.
The frequency is switched based on Y, and the dummy signal A
When DUMMY is "HIGH", the frequency is set to be higher than when "LOW". Specifically, this frequency corresponds to the number of pulses equal to or more than the number of registers of the transfer unit in each section, and is higher in the dummy section t having a shorter length than in the long reference section TL. Therefore, when such transfer signals φ1 and φ2 are given to the transfer section, all the charges accumulated in the transfer section are swept out in that section. In this way, by switching the frequencies of the transfer signals φ1 and φ2 according to the length of each section, in any section,
When the gate portion is opened, the electric charge does not overflow and does not flow back to the light receiving portion.

4 and 5, CC in the reference section R1 and the dummy section D1 in the case shown in FIG. 1 (b), respectively.
The signal waveform output from the D drive circuit 21 is shown. Thus, both the reference section R1 and the dummy section D1 are CCD
Immediately after the start signal ASTRT is generated, the gate signal S
Although H is generated, for the transfer signals φ1 and φ2, the dummy section D1 has a length that is about a quarter of the reference section R1.
The frequency in the dummy section D1 is about four times the frequency in the reference section R1. The output signal waveforms in the other reference section R2 and the dummy section D2 are the same as those in the sections R1 and D1, respectively.

Further, as shown in FIG. 3, the CCD line sensor 18 sequentially outputs the image signals in the respective sections Ri and Di, and the analog / digital converter 22 converts the image signals into digital image signals. This converted image signal is used in the extraction circuit 28 to extract a valid image signal based on the signal AREAD from the timing generation circuit 233, and selectively outputs only the image signal output in the reference section R2. Since the extracted image signal corresponds to the charges accumulated in the charge accumulation time TL in the section R1, it is an accurate image signal regardless of the reading speed. In this way, the image signal for one scanning line is output from the extraction circuit 28 to the image processing unit 24 in the reading cycle T, and image processing such as edge enhancement and gradation correction is performed there. Therefore, the extraction circuit 28 outputs an image signal at a speed corresponding to the reading cycle. Therefore, when the image processing unit has a different processing capability, the reading speed can be changed according to the processing capability. Moreover, an accurate image signal is always output.

In the above embodiment, the image signal extracted by the extraction circuit 28 is output in the reference section R2, but when three reference sections R1 are consecutive, it is output in the reference section R3. What is output may be extracted, and when four reference sections R1 are continuous, what is output in any one of the reference sections R3 and R4 may be extracted.

[0025]

In the CCD line sensor driving device according to the present invention, the transfer signal is set to the length of each section in order to sweep out all the charges accumulated in the transfer section of the CCD line sensor in each section of charge accumulation. Since the switching is performed accordingly, all the charges accumulated in the transfer unit can be swept out even in the dummy section shorter than the reference section.

Therefore, since the charges do not remain in the transfer section, it is possible to prevent the backflow of the charges to the light receiving section which is caused by the charge overflow in the transfer section, and the light receiving section has an amount corresponding to the density of the image. The electric charge of can be accurately accumulated. In addition, a stable image signal can always be accurately output regardless of the reading cycle (reading speed).

[Brief description of drawings]

FIG. 1 is a CC of an image reading apparatus according to an embodiment of the present invention.
6 is a timing chart of various signals used in the D line sensor driving device.

FIG. 2 is a schematic configuration diagram of an image reading apparatus according to an embodiment.

FIG. 3 is a control block diagram of a CCD line sensor driving portion according to the embodiment.

FIG. 4 is a timing chart of various CCD drive signals in a reference section.

FIG. 5 is a timing chart of various CCD drive signals in a dummy section.

FIG. 6 is a timing chart of various signals used in a conventional CCD line sensor driving device.

FIG. 7 is an explanatory diagram for explaining a situation of charge accumulation and transfer in a conventional CCD line sensor driving device.

[Explanation of symbols]

11 ... Manuscript table 12 ... Manuscript 14 ... Motor 15 ... Line light source 16 ... Reflecting mirror 17 ... Lens 18 ... CCD line sensor 20 ... Motor driving circuit 21 ... CCD driving circuit 22 ... A / D converter 23 ... Control unit 231 ... Oscillator 232 ... Dividing circuit 233 ... Timing generating circuit 234 ... CPU 24 ... Image processing unit

Claims (1)

[Claims] 1. A CCD line sensor composed of a light receiving section composed of a plurality of light receiving elements, a transfer section composed of a gate section and a plurality of registers, a plurality of reference sections having continuous reading cycles, and a plurality of reference sections more than the reference section. Generate a gate signal to divide into short dummy intervals,
Gate signal generating means for giving the gate signal to the gate portion, transfer signal generating means for giving a transfer signal to the transfer portion in order to sequentially output the charges of the transfer portion as an image signal, and the latter of the continuous reference intervals In the CCD line sensor driving device, the transfer signal generating means is configured to extract the number of pulses corresponding to at least the number of registers in each section. A CCD line sensor driving device, wherein the frequency of the transfer signal is switched according to the length of each section so as to generate the transfer signal.