JPH06232939A - Frame synchronization circuit - Google Patents
Frame synchronization circuitInfo
- Publication number
- JPH06232939A JPH06232939A JP5018375A JP1837593A JPH06232939A JP H06232939 A JPH06232939 A JP H06232939A JP 5018375 A JP5018375 A JP 5018375A JP 1837593 A JP1837593 A JP 1837593A JP H06232939 A JPH06232939 A JP H06232939A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- transmission
- unique word
- frame synchronization
- synchronization circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、変調方式に多値直交振
幅変調(以下多値QAMと略す)方式を用いた移動体通
信等の時分割多元接続(以下TDMAと略す)方式に使
用される、フレーム同期回路に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used in a time division multiple access (hereinafter abbreviated as TDMA) system such as mobile communication using a multilevel quadrature amplitude modulation (hereinafter abbreviated as multilevel QAM) system as a modulation system. The present invention relates to a frame synchronization circuit.
【0002】[0002]
【従来の技術】近年、情報化社会の進展にともないより
多くの情報を効率的に伝送する方式が要求されている。
多値QAM方式は伝送帯域を拡大せずに伝送できる情報
量を増加できるため、周波数の有効利用には効果的な方
式であり、従来は伝送路の比較的安定な固定のマイクロ
波回線に使用されてきたが(例えば、ディジタルマイク
ロ波通信(桑原 守二著 1974年 株式会社企画セ
ンター発行)等を参照)、移動体通信等、マルチパス、
フェージング歪が存在する変動の激しい伝送路では、1
6値直交振幅変調(16QAM)方式以上の多値QAM
方式は、伝送特性が著しい劣下することから用いられな
かった。2. Description of the Related Art In recent years, a system for efficiently transmitting more information has been required with the progress of information society.
The multi-valued QAM method can increase the amount of information that can be transmitted without expanding the transmission band, so it is an effective method for effective use of frequencies. Conventionally, it has been used for fixed microwave lines with relatively stable transmission lines. (For example, see Digital Microwave Communication (Moriji Kuwahara, 1974 Planning Center Co., Ltd.)), mobile communication, multipath,
1 for a transmission line that has large fluctuations and that has fading distortion.
Multi-level QAM over 6-ary quadrature amplitude modulation (16QAM)
The method was not used because the transmission characteristics are significantly degraded.
【0003】[0003]
【発明が解決しようとする課題】しかしながら、近年の
波形等化技術等の進歩により、マルチパス、フェージン
グ歪に対する、伝送特性の改善が試みられている。波形
等化器はトレーニングシンボルといわれる既知のシンボ
ル系列から伝送路歪を推定するので、受信側でトレーニ
ングシンボルの位置を正確に知る必要があるが、16Q
AM方式以上の多値QAM方式では、マルチパス、フェ
ージング歪が存在する変動の激しい伝送路において、安
定に動作するフレーム同期回路を構成することは非常に
困難であった。However, due to recent advances in waveform equalization technology and the like, attempts have been made to improve transmission characteristics against multipath and fading distortion. Since the waveform equalizer estimates the channel distortion from a known symbol sequence called a training symbol, it is necessary to accurately know the position of the training symbol on the receiving side.
In the multi-level QAM method which is equal to or more than the AM method, it is very difficult to construct a frame synchronizing circuit that operates stably in a transmission path where multipath and fading distortion are present and which has a large fluctuation.
【0004】本発明は上記従来の課題を解決するもの
で、変調方式に多値QAM方式を用いたTDMA方式に
おいて、マルチパス、フェージング等の伝送路歪の存在
する伝送路でも、安定に動作するフレーム同期回路を提
供することを目的とする。The present invention solves the above-mentioned conventional problems. In the TDMA system using the multilevel QAM system as a modulation system, the present invention stably operates even in a transmission line in which transmission line distortion such as multipath and fading exists. An object is to provide a frame synchronization circuit.
【0005】[0005]
【課題を解決するための手段】上記目的を達成するため
に本発明は、送信側は4相位相変調(以下QPSKと略
す)信号に相当する多値QAM信号の最大振幅値、ある
いは最小振幅値を与える信号点で構成したユニークワー
ドを有し、フレーム同期回路は、上記送信側の多値QA
M信号を差動符号化4相位相変調(以下DQPSKと略
す)信号として遅延検波するQPSK遅延検波器と、送
信側のユニークワードのDQPSK信号に相当する受信
側のユニークワードを有する相関器と、上記相関器の相
関出力がある一定値以上である時、相関パルスを出力す
る比較器と、上記相関パルス出力よりフレーム同期信号
を発生するディジタル・フェーズ・ロック・ループ(以
下DPLLと略す)とを具備する構成を有している。In order to achieve the above object, according to the present invention, the transmission side has a maximum amplitude value or a minimum amplitude value of a multi-level QAM signal corresponding to a four-phase phase modulation (hereinafter abbreviated as QPSK) signal. The frame synchronization circuit has a unique word composed of signal points that give
A QPSK delay detector that differentially detects the M signal as a differentially encoded four-phase phase modulation (hereinafter abbreviated as DQPSK) signal; a correlator having a unique word on the receiving side corresponding to the DQPSK signal of the unique word on the transmitting side; A comparator for outputting a correlation pulse when the correlation output of the correlator is a certain value or more, and a digital phase lock loop (hereinafter abbreviated as DPLL) for generating a frame synchronization signal from the correlation pulse output. It has a configuration provided with.
【0006】[0006]
【作用】本発明は上記構成により、変調方式に多値QA
M方式を用いたTDMA方式において、多値QAM信号
のQPSK信号に相当する信号点を送信のユニークワー
ドとして用い、相関検出をする受信のユニークワードに
送信のユニークワードのDQPSK信号を用いることに
より、QPSK遅延検波を用いてユニークワード検出を
行うことができ、マルチパス、フェージング等の伝送路
歪の存在する伝送路でも、変調方式に多値QAM方式を
用いることによる伝送特性の劣下を受けることなく、安
定に動作するフレーム同期回路を提供することができ
る。According to the present invention, the multi-valued QA is applied to the modulation system by the above-mentioned configuration
In the TDMA method using the M method, a signal point corresponding to the QPSK signal of the multilevel QAM signal is used as a transmission unique word, and a transmission unique word DQPSK signal is used as a reception unique word for correlation detection. Unique word detection can be performed using QPSK differential detection, and even in a transmission path with transmission path distortion such as multipath and fading, the multilevel QAM method is used as the modulation method to deteriorate the transmission characteristics. Therefore, it is possible to provide a stable frame synchronization circuit.
【0007】[0007]
【実施例】以下、本発明の一実施例について図面を参照
しながら説明する。図1は本発明のフレーム同期回路の
一実施例を示すブロック結線図である。なお、本実施例
としては変調方式に16QAMを用いた場合について説
明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block connection diagram showing an embodiment of the frame synchronization circuit of the present invention. In this example, the case where 16QAM is used as the modulation method will be described.
【0008】図1において、1は受信変調波入力を受信
入力周波数にほぼ等しい基準信号により直交検波する直
交復調器、2は直交変調器1に受信入力周波数とほぼ等
しい基準信号を供給する局部発振器、3は直交検波出力
の同相出力(以下I出力と略す)、4は直交検波出力の
直交出力(以下Q出力と略す)、5は直交復調器1の直
交検波出力をQPSK信号として遅延検波するQPSK
遅延検波器、6は後述する図2に示す構成を持ちQPS
K遅延検波器5の遅延検波出力と受信側のユニークワー
ドとの相関をとる相関器、7は相関器6の相関出力を一
定値αと比較し、相関出力が一定値α以上であった場合
に相関パルスを出力するを比較器、8は比較器7の相関
パルス出力よりフレーム同期信号を発生するDPLL
(ディジタル・フェーズ・ロック・ループ)、9はQP
SK遅延検波器5、相関器6、比較器7と、DPLL8
より構成されるフレーム同期回路である。In FIG. 1, reference numeral 1 is a quadrature demodulator for quadrature detection of a received modulated wave input with a reference signal substantially equal to the received input frequency, and 2 is a local oscillator for supplying the quadrature modulator 1 with a reference signal substantially equal to the received input frequency. Reference numeral 3 denotes in-phase output of quadrature detection output (hereinafter abbreviated as I output), 4 is quadrature output of quadrature detection output (hereinafter abbreviated as Q output), 5 is delay detection of the quadrature detection output of the quadrature demodulator 1 as a QPSK signal. QPSK
The delay detector 6 has a structure shown in FIG.
A correlator that correlates the delay detection output of the K delay detector 5 with the unique word on the receiving side, and 7 compares the correlation output of the correlator 6 with a constant value α, and when the correlation output is greater than or equal to the constant value α Is a comparator for outputting a correlation pulse, and 8 is a DPLL for generating a frame synchronization signal from the correlation pulse output of the comparator 7.
(Digital Phase Lock Loop), 9 is QP
SK differential detector 5, correlator 6, comparator 7, and DPLL 8
It is a frame synchronization circuit composed of.
【0009】以上の様に構成されたフレーム同期回路の
動作について説明すると、図3(a)に示す16QAM
の信号点配置に従って変調された送信信号は、無線伝送
路でマルチパス、フェージング等の伝送路歪を受けて、
直交復調器1に受信入力される。直交復調器1は入力さ
れた受信変調波を、受信変調波にほぼ等しい周波数の局
部発振器2の基準信号により直交検波しI出力、Q出力
を得る。I出力、Q出力はフレーム同期回路9のQPS
K遅延検波器5でDQPSK信号として遅延検波され、
図3(b)に示す32a〜32dのDQPSK信号出力
を得る。そして、相関器6でDQPSK信号出力と受信
側ユニークワード21の相関をとる。The operation of the frame synchronization circuit configured as described above will be described. 16QAM shown in FIG.
The transmission signal modulated according to the signal point arrangement of is subjected to transmission path distortion such as multipath and fading in the wireless transmission path,
Received and input to the quadrature demodulator 1. The quadrature demodulator 1 quadrature-detects the input received modulated wave with a reference signal of the local oscillator 2 having a frequency substantially equal to the received modulated wave, and obtains I output and Q output. I output and Q output are QPS of the frame synchronization circuit 9.
The K delay detector 5 performs delay detection as a DQPSK signal,
The DQPSK signal outputs 32a to 32d shown in FIG. 3B are obtained. Then, the correlator 6 correlates the DQPSK signal output with the reception side unique word 21.
【0010】ここで、相関器6の詳細な構成図である図
2を用いて、相関器6の動作を説明する。The operation of the correlator 6 will be described with reference to FIG. 2, which is a detailed block diagram of the correlator 6.
【0011】まず、QPSK遅延検波器5の遅延検波出
力は、シフトレジスタ22に1シンボル毎に入力され、
排他的論理和回路23a〜23dにより、受信側ユニー
クワードと一致、不一致判定され、加算器24により相
関を計算する。送信のユニークワードは、図3(a)の
16QAM信号の中でQPSK信号に相当する信号点3
1a〜31dを用い、受信側ユニークワード21は、送
信のユニークワードのDQPSK信号を保持している。
例えば、送信のユニークワードをユニークワード長5シ
ンボルの(31a,31c,31a,31c,31a)
とすると、受信側ユニークワード21は、送信のユニー
クワードの初期位相を図3(a)の31aとした時、
(32a,32c,32a,32c,32a)となる。
そして、相関器6の相関出力が一定値α以上の時、比較
器7は相関パルスを出力する。DPLL8は相関パルス
出力から平均的にフレーム間隔に同期したフレーム同期
信号を発生する。First, the differential detection output of the QPSK differential detector 5 is input to the shift register 22 for each symbol,
The exclusive OR circuits 23a to 23d determine whether the received unique word matches or does not match, and the adder 24 calculates the correlation. The unique word for transmission is the signal point 3 corresponding to the QPSK signal in the 16QAM signal of FIG.
1a to 31d, the reception side unique word 21 holds the DQPSK signal of the transmission unique word.
For example, a unique word for transmission has a unique word length of 5 symbols (31a, 31c, 31a, 31c, 31a).
Then, when the initial phase of the unique word for transmission is set to 31a in FIG.
(32a, 32c, 32a, 32c, 32a).
Then, when the correlation output of the correlator 6 is equal to or greater than the constant value α, the comparator 7 outputs a correlation pulse. The DPLL 8 generates a frame synchronization signal which is synchronized with the frame interval on average from the correlation pulse output.
【0012】[0012]
【発明の効果】以上のように本発明の効果としては、変
調方式に多値QAM方式を用いたTDMA方式におい
て、送信のユニークワードとしてQPSK信号を用い、
受信側のフレーム同期回路は、多値QAM信号をDQP
SK信号として遅延検波するQPSK遅延検波器と、送
信側のユニークワードのDQPSK信号に相当する受信
側のユニークワードを有する相関器と、上記相関器の相
関出力をある一定値α以上である時、相関パルスを出力
する比較器と、上記相関パルス出力よりフレーム同期信
号を発生するディジタル・フェーズ・ロック・ループと
を設けることにより、マルチパス、フェージング等の伝
送路歪の存在する伝送路でも、変調方式に多値QAM方
式を用いることによる伝送特性の劣下を受けることな
く、安定に動作するフレーム同期回路を提供することが
出来る。As described above, the effect of the present invention is to use the QPSK signal as a unique word for transmission in the TDMA method using the multilevel QAM method as the modulation method.
The frame synchronization circuit on the receiving side transmits the multilevel QAM signal to the DQP.
When a QPSK differential detector that performs differential detection as an SK signal, a correlator having a unique word on the reception side corresponding to the DQPSK signal of the unique word on the transmission side, and a correlation output of the correlator above a certain value α, By providing a comparator that outputs a correlation pulse and a digital phase lock loop that generates a frame synchronization signal from the output of the correlation pulse, modulation can be performed even in a transmission path where there is distortion such as multipath and fading. It is possible to provide a frame synchronization circuit that operates stably without being deteriorated in transmission characteristics due to the use of a multilevel QAM system.
【図1】本発明の一実施例におけるフレーム同期回路の
ブロック結線図FIG. 1 is a block connection diagram of a frame synchronization circuit according to an embodiment of the present invention.
【図2】同実施例における相関器のブロック結線図FIG. 2 is a block connection diagram of a correlator in the example.
【図3】同実施例における16QAM信号とDQPSK
信号の信号点配置を示した図FIG. 3 is a 16QAM signal and DQPSK in the same embodiment.
Diagram showing signal point arrangement of signals
1 直交復調器 2 局部発振器 3 I出力 4 Q出力 5 QPSK遅延検波器 6 相関器 7 比較器 8 DPLL 9 フレーム同期回路 1 Quadrature demodulator 2 Local oscillator 3 I output 4 Q output 5 QPSK delay detector 6 Correlator 7 Comparator 8 DPLL 9 Frame synchronization circuit
Claims (1)
元接続方式で、多値直交振幅変調信号の最大振幅値、あ
るいは最小振幅値を与える4相位相変調信号に相当する
信号点で構成した送信側のユニークワードを有し、上記
多値直交振幅変調信号を差動符号化4相位相変調信号と
して遅延検波する4相位相変調遅延検波器と、上記送信
側のユニークワードの差動符号化4相位相変調信号に相
当する受信側のユニークワードを有する相関器と、上記
相関器の相関出力がある一定値以上である時、相関パル
スを出力する比較器と、上記相関パルス出力よりフレー
ム同期信号を発生するディジタル・フェーズ・ロック・
ループを具備するフレーム同期回路。1. A time division multiple access system using a multi-valued quadrature amplitude modulation system, comprising signal points corresponding to a four-phase phase modulation signal which gives a maximum amplitude value or a minimum amplitude value of the multi-valued quadrature amplitude modulation signal. And a four-phase phase modulation delay detector for differentially detecting the multilevel quadrature amplitude modulation signal as a differentially encoded four-phase phase modulation signal, and a differential code for the unique word on the transmission side. A correlator having a unique word on the receiving side corresponding to the quadrature phase-modulated signal, a comparator that outputs a correlation pulse when the correlation output of the correlator is above a certain value, and a frame from the correlation pulse output. Digital phase-locked to generate sync signal
A frame synchronization circuit having a loop.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP01837593A JP3178138B2 (en) | 1993-02-05 | 1993-02-05 | Frame synchronization circuit and frame synchronization method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP01837593A JP3178138B2 (en) | 1993-02-05 | 1993-02-05 | Frame synchronization circuit and frame synchronization method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH06232939A true JPH06232939A (en) | 1994-08-19 |
JP3178138B2 JP3178138B2 (en) | 2001-06-18 |
Family
ID=11969971
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP01837593A Expired - Fee Related JP3178138B2 (en) | 1993-02-05 | 1993-02-05 | Frame synchronization circuit and frame synchronization method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3178138B2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1999000957A1 (en) * | 1997-06-30 | 1999-01-07 | Thomson Consumer Electronics, Inc. | Apparatus and method for processing a quadrature amplitude modulated (qam) signal |
WO2003075505A1 (en) * | 2002-03-06 | 2003-09-12 | Hitachi Kokusai Electric Inc. | Synchronization detection method and its circuit, and radio base station |
JP2004336707A (en) * | 2003-05-06 | 2004-11-25 | Northrop Grumman Corp | Equalizer system |
JP2008160355A (en) * | 2006-12-22 | 2008-07-10 | Japan Radio Co Ltd | Burst signal detection method, and arq communication demodulator |
JP2015122564A (en) * | 2013-12-20 | 2015-07-02 | 三星電子株式会社Samsung Electronics Co.,Ltd. | Communication device, channel estimation method, and communication system |
-
1993
- 1993-02-05 JP JP01837593A patent/JP3178138B2/en not_active Expired - Fee Related
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1999000957A1 (en) * | 1997-06-30 | 1999-01-07 | Thomson Consumer Electronics, Inc. | Apparatus and method for processing a quadrature amplitude modulated (qam) signal |
WO2003075505A1 (en) * | 2002-03-06 | 2003-09-12 | Hitachi Kokusai Electric Inc. | Synchronization detection method and its circuit, and radio base station |
JP2004336707A (en) * | 2003-05-06 | 2004-11-25 | Northrop Grumman Corp | Equalizer system |
JP2008160355A (en) * | 2006-12-22 | 2008-07-10 | Japan Radio Co Ltd | Burst signal detection method, and arq communication demodulator |
JP2015122564A (en) * | 2013-12-20 | 2015-07-02 | 三星電子株式会社Samsung Electronics Co.,Ltd. | Communication device, channel estimation method, and communication system |
Also Published As
Publication number | Publication date |
---|---|
JP3178138B2 (en) | 2001-06-18 |
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