JPH06204406A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To provide a semiconductor integrated circuit which can supply a number of supply voltages without limiting their orders, and is provided with a highly efficient substrate voltage generation circuit having low current consumption. CONSTITUTION:A semiconductor integrated circuit is provided with first and second power voltage supply terminals, a high voltage priority generation circuit 9 that selects and outputs either a power supply voltage, which is first supplied, or a high power voltage Va from among power supply voltages supplied from the first and second power voltage supply terminals, and a low voltage priority generation circuit 8 that selects and outputs either a power supply voltage, which is first supplied, or a low power supply voltage Vb from among the power supply voltages supplied from the first and second power voltage supply terminals. The semiconductor integrated circuit is also provided with a substrate voltage generation circuit 4 that receives, as an input, the power supply voltages outputted from the high voltage priority generation circuit 9 and the low voltage priority generation circuit 8 and outputs a substrate voltage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit effectively used in a semiconductor integrated circuit having a substrate voltage generating circuit.

[0002]

2. Description of the Related Art In recent years, in semiconductor products, particularly in semiconductor memory devices, circuit technology operating with a plurality of external power supplies has been used. The semiconductor memory device has a substrate voltage generation circuit inside and supplies the generated voltage to the substrate.

A semiconductor memory device having a plurality of power supply voltage supply terminals has a structure shown in FIG. 5, and its operation will be described below with reference to FIG.

In FIG. 5, reference numeral 10 denotes a substrate voltage generating circuit, and 11
Is an internal circuit, and 12 is a semiconductor memory device including a substrate voltage generating circuit 10 and an internal circuit 11. The internal circuit 11 operates with two power supply voltages Va and Vb (for example, Vb is 3.3V and Va is 5V), and when only the power supply voltage Vb is supplied, the substrate voltage generation circuit 10 does not operate. The power supply voltage Vb is supplied to the internal circuit 11 in a state where the voltage VBB is not generated. In such a state, since the internal circuit 11 operates while the threshold voltage Vt of the transistor in the internal circuit 11 that depends on the substrate voltage is low, the current to the substrate increases due to leakage or the like, and the substrate potential rises. Therefore, the internal circuit 11 may be damaged due to latch-up or the like.

Therefore, in the conventional semiconductor integrated circuit operating with a plurality of external power supply voltages, the power supply voltage Va supplied to the substrate voltage generating circuit 10 must be supplied first.

[0006]

As described above, a semiconductor integrated circuit which operates with a plurality of external power supply voltages has a use condition that the power supply voltage used for the substrate voltage generation circuit must be supplied first. Therefore, the system using this integrated circuit has been burdened with the provision of means for controlling the power-on sequence.

The present invention has been made to solve the above problems, and provides a semiconductor integrated circuit having a substrate voltage generating circuit capable of supplying a plurality of power supply voltages without order restriction.

Further, the present invention provides a semiconductor integrated circuit equipped with a substrate voltage generating circuit which can supply a plurality of power supply voltages without order restriction and has low current consumption and high efficiency.

[0009]

As a first means for solving the above problems, the present invention has a structure having a plurality of substrate voltage generating circuits corresponding to a plurality of types of power supply voltage supply terminals. .

As a second means, the power supply voltage supplied first from the power supply voltages supplied from the first and second power supply voltage supply terminals is selected, and the power supply voltage supplied from the first and second power supply voltage supply terminals is selected. When both power supply voltages are supplied, a selection means for selecting one of them and a substrate voltage generation circuit for inputting the power supply voltage output from the selection means and outputting a substrate voltage are provided. is there.

Further, as a third means, the selecting means selects a high power supply voltage or a high power supply voltage which is supplied first from the power supply voltages supplied from the first and second power supply voltage supply terminals, and outputs it. Voltage priority generation circuit and the first
And a low voltage priority generation circuit that selects and outputs a power supply voltage supplied first or a low power supply voltage of the power supply voltages supplied from the second power supply voltage supply terminal.

[0012]

According to the present invention, the substrate voltage can be generated by any of the first and second means described above regardless of which power supply voltage is supplied, so that the order of supply can be eliminated.

Further, since the substrate voltage can be generated by the third means regardless of which power supply voltage is supplied, it is possible to eliminate restrictions on the supply order and to drive the control unit at a low voltage. By operating the unit at a high voltage, it is possible to realize a substrate voltage generating circuit with low current consumption and high efficiency.

[0014]

(Embodiment 1) FIG. 1 is a configuration diagram of a semiconductor integrated circuit having a substrate voltage generating circuit according to a first embodiment of the present invention. The configuration of FIG. 1 will be described below.

In FIG. 1, 1 is a substrate voltage generating circuit for a Va power source which operates at a power source voltage Va, 2 is a substrate voltage generating circuit for a Vb power source which operates at a power source voltage Vb, 3 is an internal circuit, 1
Reference numeral 2 is a semiconductor integrated circuit composed of a Va power supply substrate voltage generation circuit 1, a Vb power supply substrate voltage generation circuit 2 and an internal circuit 3.

In the above structure, when the power supply voltage Va is supplied, the Va power supply substrate voltage generation circuit 1 operates to generate the substrate voltage VBB.
Generate a and supply it to the substrate. When the power supply voltage Vb is supplied, V
The power supply substrate voltage generation circuit 2 operates to generate the substrate voltage VBBb and supply it to the substrate.

When the power supply voltages Va and Vb are both supplied, the substrate voltages VBBa and VBBb are both supplied to the substrate. However, since VBBa and VBBb are set to have the same potential, there is a problem. Does not happen.

As described above, since the substrate voltage generating circuit corresponding to the respective power source voltages Va and Vb is provided, the substrate voltage can be generated regardless of which power source voltage is supplied first. It is possible to realize a semiconductor integrated circuit that does not limit the supply order of.

In this embodiment, the case where the power supply voltage is set to two has been described, but the present invention is not limited to the number of power supply voltages.

(Embodiment 2) FIG. 2 is a block diagram showing a second embodiment of a semiconductor integrated circuit having a substrate voltage generating circuit of the present invention, and the configuration of FIG. 2 will be described below.

In FIG. 2, reference numeral 4 is a substrate voltage generating circuit, which is composed of an oscillator 5 for outputting a pulse signal, a level shifter 6 for converting the level of the pulse signal, and a charge pump circuit 7 for generating a substrate voltage. 3 is an internal circuit. 8 is a high-voltage power supply Va (for example, Va is 5V), a low-voltage power supply
It is a low voltage (Vb) priority generation circuit that selects and outputs Vb when Vb (for example, Vb is 3.3V, Va> Vb + Vt) is supplied first or both are supplied. A concrete circuit example is shown in FIG. Reference numeral 9 is a high voltage (Va) priority generation circuit that selects and outputs Va of Va and Vb which is supplied first or both of them, and a concrete circuit example is shown in FIG. .

In FIG. 3, 13, 15 to 19 are P-channel transistors, and 14 is an N-channel transistor. The size of each transistor is small because the transistors 15 and 17 are for pull-down and the current always flows.
Transistor so that node N1 becomes "L" when N
13 is small, transistor 14 is large, transistor
The transistors 17 and 16 are small so that the node N2 becomes Va when both are on, and the transistor 16 is large, and the transistors 18 and 19 are large enough to supply the power supply voltage to the node Nosc. .

When neither Va nor Vb is supplied, the transistors 15 and 17 bring both the node Nb and the node N2 to "L".

If Va is supplied first, first the node
Since Nb is "L", transistor 14 turns off and transistor 13
Is turned on, the node N1 becomes Va and the transistors 16 and 19 are turned on.
FF. Since the node N2 is "L", the transistor 18 is O
Then, Va is supplied to the node Nosc (Vosc = Va). After Vb is supplied, the transistor N14 is
Since it is turned on, the node N1 becomes "L" and the transistors 16 and 19 are turned on.
To do. Also, since the transistor 16 turns on at node N2, Va
Then, the transistor 18 is turned off and the transistor 19 is turned on, so that Vb is supplied to the node Nosc (Vosc = Vb).

When Vb is supplied first, first the node
Since Nb is Vb, transistors 14 and 13 are turned on, so node N1
Becomes "L" and the transistors 16 and 19 are turned on. Also the node
N2 is Vb when the node Na is Vb when it is ON at "L",
Since the transistor 16 is on, the node N2 is Vb and the transistor 18 is off. Therefore, Vb is supplied to the node Nosc. (Vosc = Vb). After Va is supplied, node N1
Remains "L", transistors 16 and 19 are turned on. In addition, the node N2 becomes Va because the transistor 16 is turned on, the transistor 18 is turned off, and the transistor 19 is turned on.
Is supplied to Vb (Vosc = Vb). In this way, Va, Vb
Among them, when the power supply voltage to be supplied first or both are supplied, Vb is selected and output.

In FIG. 4, 20, 22, 23, 25 to 27 are P-channel transistors, and 21 and 24 are N-channel transistors. The size of each transistor is small because the transistors 22 and 25 are for pull-down and current always flows, so the size of the transistors 20 and 21 is small so that the node N1 is "L" when both transistors are ON. Is large, transistor 24 is small so that node N2 is Va when both transistors 23 and 24 are ON, transistor 23 is large, and transistors 26 and 27 are node Npomp.
The power supply voltage is large enough to supply.

When neither Va nor Vb is supplied, the transistors 22 and 25 bring both the node Na and the node Nb to "L".

If Va is supplied first, first the node
Since Nb is "L", the transistor 24 is off. Since the transistor 23 is NO when Va is supplied, the node N2 is Va.
Next, the transistor 27 is turned off. Also, the node Na is Va
Therefore, the transistor 21 is turned on, the node N1 becomes "L", and the transistor 26 is turned on, so that Va is supplied to the node Npomp (Vpomp = Va). After Vb is supplied, node Nb
So the transistor 24 turns on, but since the size of the transistor 23 is large, the node N2 is Va and the transistor 27 is turned off.
To do. Also, the transistor 20 is turned on when Vb is supplied.
However, since the size of transistor 21 is large, node N1
Since "L" turns on the transistor 27, Va is supplied to the node Npomp (Vpomp = Va).

If Vb is supplied first, the node
Since Na is "L", transistor 21 is off. When Vb is supplied, the transistor 20 becomes NO, so the node N1
Next, the transistor 26 is turned off. Also, the node Nb is Vb
Therefore, the transistor 24 turns on, the node N1 becomes "L", and the transistor 27 turns on, so that Vb is supplied to the node Npomp (Vpomp = Vb). After Va is supplied, the supply of Va causes the transistor 23 to turn on, and the node N1 turns off the transistor 27 at Va. Since the node Na is Va, the transistor 21 is turned on, and the node N1 is "L" and the transistor 27 is turned on.
Is turned on, Va is supplied to the node Npomp (Vpomp = V
a). In this way, of Va and Vb, Va is selected and output when the power supply voltage supplied first or both are supplied.

In the configuration of FIG. 2, when Va is supplied first, first, both of the Vb priority voltage generation circuit 8 and the Va priority voltage generation circuit 9 select and output Va (Vosc = Vpomp = Va ),
The substrate voltage generation circuit 4 is operated to generate the substrate voltage VBB. After Vb is supplied, Vb priority voltage generation circuit 8
(Vosc = Vb), the Va priority voltage generation circuit 9 selects and outputs Va (Vpomp = Va) .Therefore, the oscillator 5 is operated at Vb and the level shifter 6 and the charge pump circuit 7 are operated at Va. Generates voltage VBB. When Vb is supplied first, first the Vb priority voltage generation circuit 8 and the Va priority voltage generation circuit 9
In both cases, Vb is selected and output (Vosc = Vpomp = Vb), the substrate voltage generation circuit 4 is operated, and the substrate voltage VBB is generated. Va
Is supplied, the Vb priority voltage generation circuit 8 outputs Vb (Vosc = V
b), the Va priority voltage generation circuit 9 selects and outputs Va (Vpomp = Va), so the oscillator 5 is operated at Vb and the level shifter 6
And the charge pump circuit 7 is operated at Va to drive the substrate voltage V
BB is generated.

Here, in the operation of the substrate voltage generating circuit 4, the oscillator 5 generates a pulse signal, and it is desirable to operate it with a low voltage power source in order to reduce current consumption. On the other hand, since the charge pump circuit 7 drives the substrate, it is desirable that the charge pump circuit 7 be operated at a high voltage to increase the driving ability.

Therefore, according to the configuration of FIG. 2, the substrate voltage generating circuit 4 can be operated regardless of which power supply voltage is supplied first, and after the supply of both power supply voltages, the oscillator 5 Is a low voltage Vb, and the level shifter 6 and the charge pump circuit 7 can realize a substrate voltage generating circuit that operates at a high voltage Va with low current consumption and high efficiency.

In this embodiment, the Vb priority voltage generating circuit 8
The Va and Vb are supplied to the substrate voltage generating circuit 4 by using both the voltage generating circuit 9 and the Va priority voltage generating circuit 9, and as shown in FIG.
Vb priority voltage generation circuit 8 or Va priority voltage generation circuit 9
Even if the semiconductor integrated circuit is configured by using, the substrate voltage can be generated regardless of the supply voltage of either Va or Vb, and thus the supply order can be eliminated.

[0034]

As described above, according to the present invention, in a semiconductor integrated circuit which operates with a plurality of power supplies, a plurality of power supply voltages can be supplied without order restriction, so that the semiconductor integrated circuit of the present invention can be provided. The load on the system used can be reduced.

In a semiconductor integrated circuit which requires two power supplies having different voltage levels, there are no restrictions on the supply order.
Since it is possible to realize a low-current-consumption and high-efficiency substrate voltage generation circuit compatible with a power supply, it is effective in reducing power consumption of a semiconductor integrated circuit.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a semiconductor integrated circuit having a substrate voltage generating circuit according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of a semiconductor integrated circuit having a substrate voltage generation circuit showing a second embodiment of the present invention.

FIG. 3 is a specific circuit configuration diagram of a low voltage priority generation circuit.

FIG. 4 is a specific circuit configuration diagram of a high voltage priority generation circuit.

FIG. 5 is a configuration diagram of a semiconductor integrated circuit having a conventional substrate voltage generation circuit.

FIG. 6 is a configuration diagram of a semiconductor integrated circuit having a substrate voltage generating circuit according to another embodiment of the present invention.

[Explanation of symbols]

 1,2,4,10 Substrate voltage generation circuit 5 Oscillator 6 Level shifter 7 Charge pump circuit 8 Low voltage priority generation circuit 9 High voltage priority generation circuit 13 Selection means

Claims (3)

[Claims] 1. A semiconductor integrated circuit comprising a plurality of power supply voltage supply terminals and a plurality of substrate voltage generation circuits corresponding to the plurality of types of power supply voltage supply terminals. 2. The first and second power supply voltage supply terminals and the power supply voltage supplied first from the power supply voltages supplied from the first and second power supply voltage supply terminals are selected to select the first power supply voltage. And a selection means for selecting one of the two power supply voltages supplied from the second power supply voltage supply terminal, and a substrate voltage generation circuit for inputting the power supply voltage output from the selection means and outputting the substrate voltage. And a semiconductor integrated circuit including. 3. The selection means according to claim 2, wherein the first and second selection means are provided.
Of the high-voltage priority generation circuit that selects and outputs the power supply voltage that is supplied first or the higher power supply voltage among the power supply voltages that are supplied from the power supply voltage supply terminals of the first power supply voltage supply terminal and the first and second power supply voltage supply terminals. A semiconductor integrated circuit including a low voltage priority generation circuit that selects and outputs a power supply voltage that is supplied first or a low power supply voltage among the power supply voltages that are supplied.