JPH06177904A

JPH06177904A - Atm cell separation system

Info

Publication number: JPH06177904A
Application number: JP19762590A
Authority: JP
Inventors: Takamasa Kobayashi; 隆征小林; Hiroshi Yamashita; 廣山下
Original assignee: NEC Corp
Current assignee: NEC Corp
Priority date: 1990-07-27
Filing date: 1990-07-27
Publication date: 1994-06-24

Abstract

PURPOSE:To reduce the scale of equipment for the system by devising the system such that ATM cells are separated while switching the ATM cells during the routing of an STM-m signal to plural STM-n signals. CONSTITUTION:A multiplexed STM-16 signal 101 is inputted to a routing control circuit 1 and gates 2-1 to 2-4. The signal 101 includes ATM cells, connection information representing the connection from the STM-16 to an STM-4 signal and connection destination information representing the connection from the STM-16 to an STM-1 signal. The circuit 1 discriminates which of gates 2-1 to 2-4 is to be through and gives control signals 102-105 to the gates 2-1 to 2-4. Output signals 106-108 in the multiplexed STM-16 are given to buffers 3-1 to 3-3 through the gates 2-1 to 2-3 according to the control signals 102-104 from the circuit 1, and the signals are converted and STM-4 output signals 109-111 are outputted. Similarly, buffers 6-1 to 6-4 output STM-1 outputs as signals 121-124.

Description

【発明の詳細な説明】〔産業上の利用分野〕本発明は、ＳＴＭ（同期転送モード）−ｍに多重化された所定セル長のＡＴＭ（非同期転送モード）セル列をセル単位に振り分けるＡＴＭセルのスイッチング方式に関する。特に、本発明は、様々なＳＴＭ単位に多重化されたＶＣ−４_NCを領域とするセル長５３バイトのＡＴＭセル列をセル単位に振り分けるＡＴＭセルのスイッチング方式にに使用されるＡＴＭセル分離方式に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial field of use] The present invention distributes ATM (asynchronous transfer mode) cell strings of a predetermined cell length, which are multiplexed in STM (synchronous transfer mode) -m, in cell units. It relates to a switching method of ATM cells. In particular, the present invention is an ATM cell used in an ATM cell switching system in which an ATM cell string having a cell length of 53 bytes and having VC-4 _NCs multiplexed in various STM units is allocated to each cell unit. Regarding separation method.

[Conventional technology]

従来のＡＴＭセルのスイッチング方式では、ｍ本のＡＴＭセル列を多重化せずにＡＴＭセルスイッチでセル単位に振り分けていた。 In the conventional ATM cell switching method, m ATM cell strings are not multiplexed but are distributed in cell units by the ATM cell switch.

〔発明が解決しようとする課題〕このような従来のＡＴＭセルのスイッチング方式では、ｍが大きい場合にはｍ×ｍのマトリックスの膨大な規模のＡＴＭセルスイッチが必要になる。その為、装置規模が膨大になるという欠点がある。[Problems to be Solved by the Invention] In such a conventional ATM cell switching method, when m is large, an ATM cell switch of enormous scale of m × m matrix is required. Therefore, there is a drawback that the scale of the device becomes huge.

本発明の目的は装置規模に小さいＡＴＭセル分離方式を提供することにある。 It is an object of the present invention to provide an ATM cell decoupling system that is small in device scale.

[Means for Solving the Problems]

本発明のＡＴＭセル分離方式は、ＡＴＭセルと共に送られてくるＳＴＭ−ｍから複数のＳＴＭ− ｎ（ｍ＞ｎ，ｎ及びｍは整数）への接続先情報に従いゲートに対して制御信号を出力するルーティング制御回路と、前記ルーティング制御回路からの制御信号により、必要なＡＴＭセルのみを通過させるゲートと、前記ゲートからのＡＴＭセルをＳＴＭ−ｎの周波数に変換するバッファとを有している。 The ATM cell separation method of the present invention controls the gate according to the connection destination information from the STM-m sent together with the ATM cell to a plurality of STM-n (m> n, n and m are integers). A routing control circuit that outputs a signal, a gate that passes only necessary ATM cells by a control signal from the routing control circuit, and a buffer that converts the ATM cells from the gate to the STM-n frequency. ing.

[Work]

上記構成により、ＳＴＭ−ｍから複数のＳＴＭ −ｎへＡＴＭセルのスイッチングを行いながらＡＴＭセルを分離することが可能となる。 With the above configuration, it becomes possible to separate ATM cells while switching ATM cells from STM-m to a plurality of STM-n.

〔Example〕

以下、本発明について図面を参照して説明する。 Hereinafter, the present invention will be described with reference to the drawings.

第１図は本発明の一実施例によるＡＴＭセル分離方式を示すブロック図である。第２図は第１図のＡＴＭセル分離方式の動作を説明するためのタイミング図である。この実施例では、ＳＴＭ−１６からＳＴＭ−４とＳＴＭ−１への分離方法を示している。以下、第１図及び第２図を参照して本実施例のＡＴＭセル分離方式の構成及び動作について説明する。 FIG. 1 is a block diagram showing an ATM cell separation system according to an embodiment of the present invention. FIG. 2 is a timing diagram for explaining the operation of the ATM cell separation system of FIG. In this example, a method for separating STM-16 from STM-4 and STM-1 is shown. The configuration and operation of the ATM cell separation system of this embodiment will be described below with reference to FIGS. 1 and 2.

多重化されたＳＴＭ−１６信号１０１は第１のルーティング制御回路１及び＃１〜＃４の４個の第１段目のゲート２−１，２−２，２−３，及び２−４に供給される。ＳＴＭ−１６信号１０１には、ＡＴＭセルと共に、ＳＴＭ−１６信号からＳＴＭ−４信号への接続先情報（以下、ＳＴＭ−４接続先情報と呼ぶ。）とＳＴＭ−１６信号からＳＴＭ−１信号への接続先情報（以下、ＳＴＭ−１接続先情報と呼ぶ。）が含まれている。 The multiplexed STM-16 signal 101 is sent to the first routing control circuit 1 and the four first stage gates 2-1, 2-2, 2-3, and 2-4 of # 1 to # 4. Supplied. The STM-16 signal 101 includes ATM cells, connection destination information from the STM-16 signal to the STM-4 signal (hereinafter referred to as STM-4 connection destination information), and STM-16 signal to STM-1. The connection destination information to the signal (hereinafter referred to as STM-1 connection destination information) is included.

第１のルーティング制御回路１はＳＴＭ−４接続先情報に従って＃１〜＃４の第１段目のゲート２−１〜２−４のうちどのゲートを開くかを判断し、制御信号１０２〜１０５をそれぞれ第１段目のゲート２−１〜２−４に送出する。 The first routing control circuit 1 determines which of the first-stage gates 2-1 to 2-4 of # 1 to # 4 to be opened according to the STM-4 connection destination information, and the control signal 102 to 105 are sent to the first-stage gates 2-1 to 2-4, respectively.

＃１〜＃３の第１段目のゲート２−１〜２−３は、第１のルーティング制御回路１からの制御信号１０２〜１０４に従い、多重化されたＳＴＭ− １６信号中のＡＴＭセルのうち接続先情報が一致したＡＴＭセルのみを出力信号１０６〜１０８として＃１〜＃３の３個の第１段目のバッファ３− １，３−２，及び３−３に送出する。 The first-stage gates 2-1 to 2-3 of # 1 to # 3 are ATM cells in the multiplexed STM-16 signal according to the control signals 102 to 104 from the first routing control circuit 1. Among them, only the ATM cells having the same connection destination information are sent as output signals 106 to 108 to the three first stage buffers 3-1, 3-2 and 3-3 of # 1 to # 3. .

＃１〜＃３の第１段目のバッファ３−１〜３− ３では、＃１〜＃３の第１段目のゲート２−１〜２−３からの出力信号１０６〜１０８を、それぞれＳＴＭ−４の周波数に変換し、ＳＴＭ−４出力信号１０９〜１１１として出力する。 In the first-stage buffers 3-1 to 3-3 of # 1 to # 3, the output signals 106 to 108 from the first-stage gates 2-1 to 2-3 of # 1 to # 3 are supplied to the buffers 3-1 to 3-3. Each is converted to the STM-4 frequency and output as STM-4 output signals 109 to 111.

＃４の第１段目のゲート２−４は、第１のルーティング制御回路１からの制御信号１０５に従い、多重化されたＳＴＭ−１６信号中のＡＴＭセルのうち接続先情報が一致したＡＴＭセルのみを出力信号１１２として出力する。 According to the control signal 105 from the first routing control circuit 1, the gate 2-4 of the first stage of # 4 is the ATM cell of the ATM cells in the multiplexed STM-16 signal whose connection destination information matches. Only the cell is output as the output signal 112.

この出力信号１１２は、第２のルーティング制御回路４及び＃１〜＃４の４個の第２段目のゲート５−１，５−２，５−３，及び５−４に供給される。 The output signal 112 is supplied to the second routing control circuit 4 and the four second-stage gates 5-1, 5-2, 5-3, and 5-4 of # 1 to # 4. Be done.

第２のルーティング制御回路４はＳＴＭ−１接続先情報に従って＃１〜＃４の第２段目のゲート５−１〜５−４のうちどのゲートを開くかを判断し、制御信号１１３〜１１６をそれぞれ第２段目のゲート５−１〜５−４に送出する。 The second routing control circuit 4 determines which of the second-stage gates 5-1 to 5-4 of # 1 to # 4 is to be opened according to the STM-1 connection destination information, and the control signal 113 to 116 are sent to the second-stage gates 5-1 to 5-4, respectively.

＃１〜＃４の第２段目のゲート５−１〜５−４は、第２のルーティング制御回路４からの制御信号１１３〜１１６に従い、＃４の第１段目のゲート２−４からの出力信号１１２中のＡＴＭセルのうち接続先情報が一致したＡＴＭセルのみを出力信号１１７〜１２０として＃１〜＃４の４個の第２段目のバッファ６−１，６−２，６−３，及び６−４に送出する。 The gates 5-1 to 5-4 of the second stage of # 1 to # 4 follow the control signals 113 to 116 from the second routing control circuit 4 and the gate 2 of the first stage of # 4. Among the ATM cells in the output signal 112 from No. 4, only the ATM cells having the same connection destination information are output as the output signals 117 to 120. The four second-stage buffers 6-1 and 6-2 of # 1 to # 4 , 6-3, and 6-4.

＃１〜＃４の第２段目のバッファ６−１〜６− ４では、＃１〜＃４の第２段目のゲート５−１〜５−４からの出力信号１１７〜１２０を、それぞれＳＴＭ−１の周波数に変換し、ＳＴＭ−１出力信号１２１〜１１４として出力する。 In the buffers 6-1 to 6-4 in the second stage of # 1 to # 4, the output signals 117 to 120 from the gates 5-1 to 5-4 in the second stage of # 1 to # 4 are transferred to the buffers 6-1 to 6-4. Each is converted to the STM-1 frequency and output as STM-1 output signals 121 to 114.

〔The invention's effect〕

以上説明したように、本発明によれば、ＳＴＭ −ｍから複数のＳＴＭ−ｎに対しＡＴＭセルのスイッチングを行いながら分離することが可能である。また、同様の回路を組み合わせることにより、ＳＴＭ−ｍから複数のＳＴＭ−ｎ、各ＳＴＭ−ｎから複数のＳＴＭ−１というように、ＡＴＭスイッチング及び分離を階層的に組むことができ、スイッチ機能の分散が図れるという効果がある。 As described above, according to the present invention, it is possible to separate the STM-m from the plurality of STM-n while switching the ATM cells. In addition, by combining similar circuits, ATM switching and separation can be hierarchically organized, such as STM-m to multiple STM-n and each STM-n to multiple STM-1. This has the effect of distributing the functions.

[Brief description of drawings]

第１図は本発明の一実施例によるＡＴＮセル分離方式を示すブロック図、第２図は第１図のＡＴＭセル分離方式の動作を説明するためのタイミング図である。１…ルーティング制御回路、２−１〜２−４… ゲート、３−１〜３−３…バッファ、４…ルーティング制御回路、５−１〜５−４…ゲート、６− １〜６−４…バッファ。 FIG. 1 is a block diagram showing an ATN cell separation system according to an embodiment of the present invention, and FIG. 2 is a timing diagram for explaining the operation of the ATM cell separation system of FIG. 1 ... Routing control circuit, 2-1 to 2-4 ... Gate, 3-1 to 3-3 ... Buffer, 4 ... Routing control circuit, 5-1 to 5-4 ... Gate, 6-1 to 6-4 …buffer.

Claims

[Claims]

1. A STM-n (n is an integer) Sui etching method of an ATM cell for distributing an ATM cell sequence of cell length 53 bytes to region V C-4 _NC multiplexed in the cell unit, the ATM cell A routing control circuit that outputs a control signal according to connection destination information from the STM-m sent together with a plurality of STM-n (m> n, m is an integer), and only the necessary ATM cells by the control signal. And a buffer for converting the ATM cells from the gates to the STM-n frequency, and separating the ATM cells from the STM-m while switching the ATM cells to a plurality of STM-n. A possible ATM cell separation method.

2. m (m> 2, m is an integer) multiplexed A
In the ATM cell separation system, which divides a TM cell string into a plurality of n (m> n ≧ 1, n is an integer) multiplexed ATM cell string according to the connection destination information, a control signal according to the connection destination information. A gate for passing only the necessary ATM cells in response to the control signal, receiving the m-multiplexed ATM cell string, and the n-th ATM cell separation system having means for converting to a multiplexed ATM cell sequence.

3. The ATM cell separation system according to claim 2, wherein the m is 16 and the n is 4.