JPH06148683A - Liquid crystal display device - Google Patents

Liquid crystal display device

Info

Publication number
JPH06148683A
JPH06148683A JP30342492A JP30342492A JPH06148683A JP H06148683 A JPH06148683 A JP H06148683A JP 30342492 A JP30342492 A JP 30342492A JP 30342492 A JP30342492 A JP 30342492A JP H06148683 A JPH06148683 A JP H06148683A
Authority
JP
Japan
Prior art keywords
layer
film
layers
liquid crystal
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP30342492A
Other languages
Japanese (ja)
Other versions
JP2988159B2 (en
Inventor
Keizo Kobayashi
敬三 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP30342492A priority Critical patent/JP2988159B2/en
Publication of JPH06148683A publication Critical patent/JPH06148683A/en
Application granted granted Critical
Publication of JP2988159B2 publication Critical patent/JP2988159B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To improve response speed and to prevent the open defect, etc., in junctures by constituting all metallic wiring layers of multilayered structures formed by holding the upper layer and lower layer metals of an intermediate layer consisting of Al or Al alloy with the same metals. CONSTITUTION:The lower layer Cr 21, the Al 22 and the upper layer Cr 23 are deposited by continuous sputtering on a glass substrate 10. The metals of these three layers are continuously etched by using a photoresist 30 as a mask and using gaseous chlorine via a photolithography stage and are then subjected to a post treatment with O2 plasma. The photoresist 30 is removed from three layers of the metallic wirings 20 formed in such a manner and a silicon nitride film 40 is deposited thereon. The silicon nitride film in through- hole parts 50 is selectively removed. The wiring resistance and signal delay time of about 1/3 the wiring resistance and signal delay time in the case of formation with the single layer of the Cr are attained if the wirings are constituted in such a manner. The Al does not come into direct contact with the other thin film layers even in the structure during the production process and after the production and eventually, the open defect and joint leakage in the junctures are prevented and the adhesive strength to the glass substrate, etc., is improved.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、液晶表示装置に関し、
特に応答速度の早い液晶表示装置の配線構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device,
Particularly, it relates to a wiring structure of a liquid crystal display device having a high response speed.

【0002】[0002]

【従来の技術】従来の液晶表示装置の金属配線には、T
a,Ti,CrあるいはMo等が用いられていた。又、
高速化のためにAl,Al合金の単層あるいはAl,A
l合金膜とTa,Ti,CrまたはMo膜との2層金属
が用いられていた。さらに、接続部にはTa,Ti,C
rあるいはMo、配線部にはAlまたはAl合金のよう
に両者を場合により使いわけて用いられることがあっ
た。
2. Description of the Related Art The metal wiring of a conventional liquid crystal display device has T
a, Ti, Cr or Mo was used. or,
Single layer of Al, Al alloy or Al, A for high speed
A two-layer metal of an l alloy film and a Ta, Ti, Cr or Mo film was used. Furthermore, Ta, Ti, C
In some cases, r or Mo, and Al or Al alloy for the wiring part, are used properly depending on the case.

【0003】[0003]

【発明が解決しようとする課題】配線にTa,Ti,C
rあるいはMo等を用いた場合には、これら金属の抵抗
率が高いため(Al比で2〜5倍)、高速応答が要求さ
れる場合や、大画面表示装置では問題になってくる。ま
た、AlまたはAl合金を用いた場合は、抵抗率は低い
ものの、(a)表面が酸化し酸化アルミニウムができや
すくその結果接続部でオープン不良を起し易い、(b)
不純物添加半導体Siとのコンタクト部でスパイクを発
生し接合リークの原因となる、(c)ガラス基板、透明
導電膜(ITO:Indrum Tin Oxide
膜)等との密着強度が小さい、(d)仕事関数が金属に
より異なるため、TFTのゲート電極に従来通りのT
a,Ti,CrあるいはMoを用いた場合に比べ、Al
を用いると閾値電圧が異なる。従って駆動回路の設計変
更が必要になる場合がある、(e)外部からの機械的衝
撃に弱い、(f)原子量が比較的小さく(26.9
8)、エレクトロマイグレーション,ヒロック等に起因
した断線不良を起しやすい、(g)塩素、水分及び電界
等の影響で化学反応が起り、Al腐食が発生して断線の
原因となる、等の問題点がある。
[Problems to be Solved by the Invention] Ta, Ti, C for wiring
When r, Mo, or the like is used, the resistivity of these metals is high (2 to 5 times as high as the Al ratio), which causes a problem when high-speed response is required or in a large-screen display device. Further, when Al or an Al alloy is used, although the resistivity is low, (a) the surface is easily oxidized to form aluminum oxide, and as a result, an open defect is likely to occur at the connection portion, (b)
(C) Glass substrate, transparent conductive film (ITO: Indium Tin Oxide) that causes a junction leak by generating a spike at a contact portion with the impurity-added semiconductor Si
The adhesion strength with the film etc. is small, and (d) the work function differs depending on the metal.
Compared with the case of using a, Ti, Cr or Mo, Al
, The threshold voltage is different. Therefore, it may be necessary to change the design of the drive circuit, (e) weak against mechanical shock from the outside, (f) relatively small atomic weight (26.9).
8), problems such as easy disconnection failure due to electromigration, hillock, etc., (g) chemical reaction under the influence of chlorine, moisture, electric field, etc., causing Al corrosion and causing disconnection. There is a point.

【0004】上記(b)の対策としてAl−Si,
(f)の対策としてAl−Cu,Al−Ti等のAl合
金を用いる場合があるが、(a)〜(g)の問題点全て
を解決できる訳ではない。AlまたはAl合金とTa,
Ti,CrあるいはMo等との2層金属配線では、Al
層側で引き起される問題が必ず残り(a)〜(g)の問
題点全てを解決できない。又、場所的にAl層またはA
l合金層と、Ta,Ti,CrあるいはMo金属を使い
わける方法ではリソグラフィ工程数の増加を招いたり、
やはり(a)〜(g)の内解決されない問題点が残ると
いう欠点を有する。
As a measure against the above (b), Al--Si,
As a measure against (f), an Al alloy such as Al-Cu or Al-Ti may be used, but not all the problems (a) to (g) can be solved. Al or Al alloy and Ta,
For a two-layer metal wiring such as Ti, Cr or Mo, Al
The problems caused on the layer side always remain and cannot solve all the problems (a) to (g). Also, the Al layer or A
The method of properly using the alloy layer and the Ta, Ti, Cr, or Mo metal causes an increase in the number of lithography processes,
As a matter of course, there is a problem that some of the problems (a) to (g) that cannot be solved remain.

【0005】[0005]

【課題を解決するための手段】本発明の液晶表示装置で
は、Ta/Al/Ta,Ti/Al/Ti,Cr/Al
/CrあるいはMo/Al/MoのようにAlをTa,
Ti,Cr,Mo等で挟み込んだ3層金属配線構造とし
ている。又、金属配線パターニング後、スルーホール部
を除き金属表面あるいは側壁部をシリコン窒化膜より成
る表面保護膜あるいはゲート絶縁膜で被覆している。
In the liquid crystal display device of the present invention, Ta / Al / Ta, Ti / Al / Ti, Cr / Al
Al as Ta / Cr or Mo / Al / Mo,
It has a three-layer metal wiring structure sandwiched by Ti, Cr, Mo and the like. Further, after patterning the metal wiring, the metal surface or side wall portion is covered with a surface protective film made of a silicon nitride film or a gate insulating film except for the through holes.

【0006】[0006]

【作用】かくしてAlの導入により配線抵抗を十分低く
できると共に、他の薄膜材料との接触はTa,Ti,C
rあるいはMoを介しているためAlでの問題点(a)
〜(e)は全て解消される。問題点(f)もAlを他の
金属でサンドイッチ構造にしヒロックの発生を迎えてい
るため解消される。問題点(g)も周囲を耐湿性の大き
いシリコン窒化膜で被覆しているために解消される。
Thus, by introducing Al, the wiring resistance can be made sufficiently low, and the contact with other thin film materials is Ta, Ti, C.
Problems with Al due to r or Mo (a)
All of (e) are eliminated. The problem (f) is also solved because Al is made into a sandwich structure with another metal and hillocks are generated. The problem (g) is also solved because the surrounding area is covered with a silicon nitride film having high moisture resistance.

【0007】[0007]

【実施例】次に本発明について図面を参照して説明す
る。図1(a)〜(c)は本発明の骨格となる概念を示
す配線構造の模式的断面図である。図1(a)に示すよ
うにガラス基板10上に連続スパッタにより下層Cr2
1,Al22,上層Cr23をそれぞれ500,100
0,500オングストローム堆積する。次に図1(b)
のようにフォトリソグラフィ工程を経てフォトレジスト
30をマスクにして塩素系ガス(Cl2 ,CCl4 等)
を用い、上層Cr23,Al22,下層Cr21を連続
エッチングして終りに残存塩素を除去するためにO2
ラズマ後処理を行う。かくして、3層の金属配線20が
形成される。次に図1(c)のようにフォトレジスト3
0を除去し、シリコン窒化膜40を堆積し、フォトリソ
グラフィ工程を経て、スルーホール部50のシリコン窒
化膜を選択除去する。
The present invention will be described below with reference to the drawings. 1A to 1C are schematic cross-sectional views of a wiring structure showing the concept of the skeleton of the present invention. As shown in FIG. 1A, a lower layer Cr2 is formed on the glass substrate 10 by continuous sputtering.
1, Al22, upper layer Cr23 500, 100 respectively
Deposit 0.5 Å. Next, FIG. 1 (b)
Through the photolithography process as described above, using the photoresist 30 as a mask, chlorine-based gas (Cl 2 , CCl 4, etc.)
The upper layer Cr23, Al22, and the lower layer Cr21 are continuously etched by using the above, and an O 2 plasma post-treatment is performed to remove residual chlorine at the end. Thus, the three-layer metal wiring 20 is formed. Next, as shown in FIG. 1C, the photoresist 3
0 is removed, a silicon nitride film 40 is deposited, and a silicon nitride film in the through hole portion 50 is selectively removed through a photolithography process.

【0008】このように構成にすると、Alの抵抗率
(約2.5μΩ・cm)はCrの抵抗率(約13μΩ・
cm)の約1/5であり、Cr単層で同一膜厚2000
オングストロームを形成した場合の約1/3の配線抵
抗、信号遅延時間となる。又、スルーホール部以外は耐
湿性の優れたシリコン窒化膜で表面及び側壁部が被覆さ
れ、Alと接しているのは上層Cr23,下層Cr21
あるいは側壁部のシリコン窒化膜のみである。
With this structure, the resistivity of Al (about 2.5 μΩ · cm) is equal to that of Cr (about 13 μΩ · cm).
Approximately ⅕ of the same thickness of a single Cr layer 2000
The wiring resistance and the signal delay time are about 1/3 of the case of forming the angstrom. The surface and side walls are covered with a silicon nitride film having excellent moisture resistance except the through holes, and the upper layer Cr23 and the lower layer Cr21 are in contact with Al.
Alternatively, it is only the silicon nitride film on the side wall.

【0009】図2は本発明の一実施例を示す液晶表示装
置の逆スタガーTFT構造ガラス基板の断面図である。
(a)はTFT部,(b)は走査信号配線部,(c)は
映像信号配線部,(d)はスルーホール部,(e)は走
査信号配線部と外部配線との接続部,(f)は映像信号
配線部と外部配線との接続部を示す。ガラス基板10上
に蓄積容量電極用透明導電膜61としてITOを選択形
成する。次にゲート金属配線24として図1で説明した
3層金属配線を選択形成する。次にゲート絶縁膜41と
してシリコン窒化膜,Si膜71,n形Si膜72を連
続成長し、n形Si膜72とSi膜71を選択エッチン
グする。次にスルーホール部形成のためゲート絶縁膜4
1を選択エッチングする。さらにドレイン金属配線25
として3層金属配線を選択形成し、次に画素電極用透明
導電膜62としてITOを選択形成する。次にTFT形
成のためTFTチャネル部上のn形Si膜72を選択エ
ッチングする。さらに表面保護膜42としてシリコン窒
化膜を堆積し、外部配線との接続部,画素部等を選択エ
ッチングする。外部配線と接続部には異方性導電膜90
を介して外部接続端子100に取付けられる。又、外部
接続端子100は水分浸透防止のため樹脂コート膜11
0が被覆される。かくして(a)〜(f)に示す各部で
の断面構造ができる。
FIG. 2 is a sectional view of an inverted stagger TFT structure glass substrate of a liquid crystal display device according to an embodiment of the present invention.
(A) is a TFT portion, (b) is a scanning signal wiring portion, (c) is a video signal wiring portion, (d) is a through hole portion, (e) is a connection portion between the scanning signal wiring portion and external wiring, ( f) shows a connecting portion between the video signal wiring portion and the external wiring. ITO is selectively formed on the glass substrate 10 as the transparent conductive film 61 for storage capacitor electrodes. Next, the three-layer metal wiring described in FIG. 1 is selectively formed as the gate metal wiring 24. Next, a silicon nitride film, a Si film 71, and an n-type Si film 72 are continuously grown as the gate insulating film 41, and the n-type Si film 72 and the Si film 71 are selectively etched. Next, the gate insulating film 4 is formed to form the through holes.
1 is selectively etched. Further drain metal wiring 25
Then, a three-layer metal wiring is selectively formed, and then ITO is selectively formed as the transparent conductive film 62 for pixel electrodes. Next, the n-type Si film 72 on the TFT channel portion is selectively etched to form a TFT. Further, a silicon nitride film is deposited as the surface protection film 42, and the connection portion with the external wiring, the pixel portion and the like are selectively etched. Anisotropic conductive film 90 is provided on the external wiring and the connecting portion.
It is attached to the external connection terminal 100 via. In addition, the external connection terminal 100 has a resin coating film 11 for preventing water penetration.
0 is coated. Thus, the cross-sectional structure at each part shown in (a) to (f) can be obtained.

【0010】図3は図2(e),(f)に示した接続部
でのTFTガラス基板側の外部接続端子部の平面図であ
る。
FIG. 3 is a plan view of the external connection terminal portion on the TFT glass substrate side at the connection portion shown in FIGS. 2 (e) and 2 (f).

【0011】図1〜図3に見られるように金属配線部の
Al22は上層Cr23,下層Cr21で被覆され、さ
らに側壁部をゲート絶縁膜41あるいは表面保護膜42
のシリコン窒化膜で被覆されていることになる。
As shown in FIGS. 1 to 3, Al22 of the metal wiring portion is covered with an upper layer Cr23 and a lower layer Cr21, and the side wall portion is further covered with a gate insulating film 41 or a surface protective film 42.
Will be covered with the silicon nitride film.

【0012】尚、上記実施例ではCr−Al−Crの3
層金属膜について説明した。しかし、AlはAl−S
i,Al−Cu,Al−Ti等のAl合金であっても良
い。さらに上,下層のCrはTa,Ti,Mo等の通常
液晶表示装置の金属配線に用いられる他の金属を用いて
も良い。
In the above embodiment, the Cr-Al-Cr 3
The layer metal film has been described. However, Al is Al-S
It may be an Al alloy such as i, Al-Cu, Al-Ti. Further, as the upper Cr, other metals such as Ta, Ti and Mo which are usually used for metal wiring of liquid crystal display devices may be used.

【0013】[0013]

【発明の効果】以上説明したように本発明はCr−Al
−Crと3層金属を連続成長し、かつ3層金属を一括リ
ソグラフィしているので、製造工程中でも製造後の構造
においてもAlが他の薄膜層と直接接触することはな
い。従って課題の項で述べた(a)〜(e)の問題点は
全て解決される。又、上層,下層がCrでサンドイッチ
されているため、(f)の問題点であるヒロック,エレ
クトロマイグレーションの発生も抑制される。更に
(g)の問題点であるAl腐食に関しては、Al側壁も
含めて配線全体を耐湿性の高いシリコン窒化膜で被覆す
ることにより解決している。特に外部配線との接続部で
異物質の界面を介して浸透する水分が問題となるが図3
に見られるよにスルーホール部をパネル側3層金属配線
に対して内抜きコンタクトとし、シリコン窒化膜で側壁
部及びスルーホールの外周部を被覆することにより解決
している。
As described above, the present invention is based on Cr-Al.
Since -Cr and the three-layer metal are continuously grown and the three-layer metal is subjected to the batch lithography, Al does not come into direct contact with other thin film layers in the manufacturing process and the structure after the manufacturing. Therefore, all the problems (a) to (e) described in the section of problem are solved. Further, since the upper layer and the lower layer are sandwiched by Cr, the occurrence of hillock and electromigration, which is the problem of (f), is suppressed. Further, the problem of (g) Al corrosion is solved by covering the entire wiring including the Al side wall with a silicon nitride film having high moisture resistance. In particular, water that permeates through the interface of a different substance at the connection with the external wiring becomes a problem.
As can be seen from the above, the problem is solved by making the through hole part an internal contact with the panel side three-layer metal wiring and covering the side wall part and the outer peripheral part of the through hole with a silicon nitride film.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)〜(c)は、本発明の概念を示す配線構
造の模式的断面図である。
1A to 1C are schematic cross-sectional views of a wiring structure showing the concept of the present invention.

【図2】(a)〜(f)は、本発明の一実施例を示す液
晶表示装置のTFTガラス基板の各部分の断面図であ
る。
FIGS. 2A to 2F are cross-sectional views of respective portions of a TFT glass substrate of a liquid crystal display device showing an embodiment of the present invention.

【図3】図2における接続部でのTFTガラス基板側の
外部接続端子部での平面図である。
3 is a plan view of an external connection terminal portion on the TFT glass substrate side in the connection portion in FIG.

【符号の説明】[Explanation of symbols]

10 ガラス基板 20 3層金属配線 21 下層Cr 22 Al 23 上層Cr 24 ゲート金属配線 25 ドレイン金属配線 30 フォトレジスト 40 シリコン窒化膜 41 ゲート絶縁膜 42 表面保護膜 50 スルーホール部 61 蓄積容量電極透明導電膜 62 画素電極用透明導電膜 71 Si膜 72 n形Si膜 90 異方性導電膜 100 外部接続端子 110 樹脂コート膜 10 glass substrate 20 three-layer metal wiring 21 lower layer Cr 22 Al 23 upper layer Cr 24 gate metal wiring 25 drain metal wiring 30 photoresist 40 silicon nitride film 41 gate insulating film 42 surface protective film 50 through hole portion 61 storage capacitor electrode transparent conductive film 62 transparent conductive film for pixel electrode 71 Si film 72 n-type Si film 90 anisotropic conductive film 100 external connection terminal 110 resin coat film

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 全ての金属配線層が、AlまたはAl合
金を中間層とし、該中間層の上層及び下層金属を同一金
属で狭み込んだ三層金属配線であることを特徴とする液
晶表示装置。
1. A liquid crystal display, wherein all metal wiring layers are three-layer metal wirings in which Al or Al alloy is used as an intermediate layer and upper and lower metal layers of the intermediate layer are sandwiched by the same metal. apparatus.
【請求項2】 上記上層及び下層同一金属がTa,T
i,CrまたはMoであることを特徴とする請求項1記
載の液晶表示装置。
2. The same metal in the upper and lower layers is Ta, T
The liquid crystal display device according to claim 1, wherein the liquid crystal display device is i, Cr or Mo.
【請求項3】 金属配線層の外部接続端子部の表面外周
部及び側壁部が、表面保護膜あるいはゲート絶縁膜によ
って被覆されていることを特徴とする請求項1記載の液
晶表示装置。
3. The liquid crystal display device according to claim 1, wherein the outer peripheral surface portion and the side wall portion of the external connection terminal portion of the metal wiring layer are covered with a surface protective film or a gate insulating film.
【請求項4】 表面保護膜およびゲート絶縁膜が、シリ
コン窒化膜の単層あるいはシリコン窒化膜の層を含んだ
多層膜であることを特徴とする請求項3記載の液晶表示
装置。
4. The liquid crystal display device according to claim 3, wherein the surface protective film and the gate insulating film are a single layer of a silicon nitride film or a multilayer film including a layer of the silicon nitride film.
JP30342492A 1992-11-13 1992-11-13 Liquid crystal display Expired - Lifetime JP2988159B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30342492A JP2988159B2 (en) 1992-11-13 1992-11-13 Liquid crystal display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30342492A JP2988159B2 (en) 1992-11-13 1992-11-13 Liquid crystal display

Publications (2)

Publication Number Publication Date
JPH06148683A true JPH06148683A (en) 1994-05-27
JP2988159B2 JP2988159B2 (en) 1999-12-06

Family

ID=17920852

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30342492A Expired - Lifetime JP2988159B2 (en) 1992-11-13 1992-11-13 Liquid crystal display

Country Status (1)

Country Link
JP (1) JP2988159B2 (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001257350A (en) * 2000-03-08 2001-09-21 Semiconductor Energy Lab Co Ltd Semiconductor device and its preparation method
US6529251B2 (en) 1999-02-23 2003-03-04 Sharp Kabushiki Kaisha Liquid crystal display device and method of manufacturing the same
JP2005317983A (en) * 2005-05-16 2005-11-10 Semiconductor Energy Lab Co Ltd Semiconductor device
US6982768B2 (en) 1996-02-20 2006-01-03 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device
KR100800986B1 (en) * 2000-03-06 2008-02-11 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Method of fabricating display device
JP2008209931A (en) * 2008-03-12 2008-09-11 Semiconductor Energy Lab Co Ltd Liquid crystal display device
JP2011053651A (en) * 2009-09-02 2011-03-17 Samsung Mobile Display Co Ltd Display device
JP2013110397A (en) * 2011-10-24 2013-06-06 Semiconductor Energy Lab Co Ltd Semiconductor device and method for manufacturing semiconductor device
US8873011B2 (en) 2000-03-16 2014-10-28 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device and method of manufacturing the same
US9048146B2 (en) 2000-05-09 2015-06-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
JP2020526778A (en) * 2017-07-17 2020-08-31 京東方科技集團股▲ふん▼有限公司Boe Technology Group Co.,Ltd. Display boards, display board manufacturing methods, and display devices

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6982768B2 (en) 1996-02-20 2006-01-03 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device
US6529251B2 (en) 1999-02-23 2003-03-04 Sharp Kabushiki Kaisha Liquid crystal display device and method of manufacturing the same
KR100800979B1 (en) * 2000-03-06 2008-02-11 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Display device
US9099355B2 (en) 2000-03-06 2015-08-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of fabricating the same
KR100800986B1 (en) * 2000-03-06 2008-02-11 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Method of fabricating display device
US9368514B2 (en) 2000-03-08 2016-06-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
JP2001257350A (en) * 2000-03-08 2001-09-21 Semiconductor Energy Lab Co Ltd Semiconductor device and its preparation method
US9786687B2 (en) 2000-03-08 2017-10-10 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US7414266B2 (en) 2000-03-08 2008-08-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US9059045B2 (en) 2000-03-08 2015-06-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US8873011B2 (en) 2000-03-16 2014-10-28 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device and method of manufacturing the same
US9298056B2 (en) 2000-03-16 2016-03-29 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device and method of manufacturing the same
US9048146B2 (en) 2000-05-09 2015-06-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US9429807B2 (en) 2000-05-09 2016-08-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
JP2005317983A (en) * 2005-05-16 2005-11-10 Semiconductor Energy Lab Co Ltd Semiconductor device
JP2008209931A (en) * 2008-03-12 2008-09-11 Semiconductor Energy Lab Co Ltd Liquid crystal display device
JP2011053651A (en) * 2009-09-02 2011-03-17 Samsung Mobile Display Co Ltd Display device
JP2013110397A (en) * 2011-10-24 2013-06-06 Semiconductor Energy Lab Co Ltd Semiconductor device and method for manufacturing semiconductor device
JP2017073557A (en) * 2011-10-24 2017-04-13 株式会社半導体エネルギー研究所 Semiconductor device manufacturing method
JP2020526778A (en) * 2017-07-17 2020-08-31 京東方科技集團股▲ふん▼有限公司Boe Technology Group Co.,Ltd. Display boards, display board manufacturing methods, and display devices

Also Published As

Publication number Publication date
JP2988159B2 (en) 1999-12-06

Similar Documents

Publication Publication Date Title
US6529251B2 (en) Liquid crystal display device and method of manufacturing the same
JP2963529B2 (en) Active matrix display device
TWI404213B (en) Thin film transistor array panel and manufacturing method thereof
US6528357B2 (en) Method of manufacturing array substrate
JP2006258965A (en) Liquid crystal display device and its manufacturing method
US7499119B2 (en) Liquid-crystal display device with thin-film transistors and method of fabricating the same
JPH10319431A (en) Thin film transistor array substrate
JPH06148683A (en) Liquid crystal display device
JP2009230022A (en) Method of manufacturing liquid crystal display device, and liquid crystal display device
JPH112835A (en) Active matrix substrate
JPH1062818A (en) Production of liquid crystal display device
US7105896B2 (en) Thin film transistor circuit device, production method thereof and liquid crystal display using the think film transistor circuit device
JP2000101091A (en) Thin film transistor
JP4184522B2 (en) Thin film transistor substrate
JPH10135465A (en) Thin film transistor and its manufacture
US20080003527A1 (en) Wiring line structure and method for forming the same
JP3514985B2 (en) Active matrix substrate
JPH10170951A (en) Production of liquid crystal display device
JPH0385530A (en) Active matrix display device
US8826528B2 (en) Electrical connections for anodized thin film structures
KR100254154B1 (en) Liquid crystal display and its fabrication method
JP3982730B2 (en) Method for manufacturing thin film transistor array substrate
JP2003152188A (en) Thin film transistor panel
KR100623820B1 (en) Lcd and method for manufacturing lcd
JPH04240824A (en) Array substrate for liquid crystal display device

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19990907

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081008

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091008

Year of fee payment: 10

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091008

Year of fee payment: 10

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101008

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111008

Year of fee payment: 12

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111008

Year of fee payment: 12

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111008

Year of fee payment: 12

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121008

Year of fee payment: 13