JPH06132930A - Synchronization acquiring method and device for spectrum diffusion communication - Google Patents

Abstract

PURPOSE:To provide the synchronization acquiring method and device for spectrum diffusion communication which can secure the stable communication despite a sudden change of the transmission characteristic and also can accurately acquire the synchronization. CONSTITUTION:At the side of a receiver part 11, a comparator 31 compares the peak value P1 received from a peak detector 21 with the threshold value PTH. A setter sets the peak position PT1 received from the detector 21 at a prescribed point in the following single cycle of data after the output of the comparator 1 becomes active. A window comparator 32 checks whether the position PT1 is included or not in a prescribed section including a prescribed position. Then a decider continuously observe the peak of a correlative signal in a prescribed period of data after the output of the comparator 31 becomes active and the setter sets the position PT1 at a prescribed point. Then the decider decides the acquisition of synchronization when the active states are confirmed in the prescribed frequency for the outputs of both comparators 31 and 32.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronization acquisition method and a synchronization acquisition device in spread spectrum communication suitable for use in communication using a power line as an information transmission path.

[0002]

2. Description of the Related Art Since electric power lines are used in all households, when viewed as an information transmission medium in the home, they are very effective information transmission media that are highly economical and expandable. Since various electric devices such as lighting, air conditioner, TV, etc. are connected to the
The transmission characteristics of the power line change momentarily due to non-use (power ON / OFF, etc.). For example, in the case of a power line using a TV or a switching power supply, the phase characteristics are synchronized with the power frequency. Changes rapidly.

As described above, since the transmission characteristics of the power line are not flat and unstable, there is a problem that high quality transmission is difficult.

As measures against this, for example, the literature “Light line communication (data transmission)”, the second kind of technical report SSTA89-7 (1989), the document “High performance SS power line modem”, NEC technical report Vo1.42 No9pp.9.
As described in 8-106 (1989), a spread spectrum communication method (hereinafter referred to as "SS
Communication method ". ) Is being considered for introduction.

[0005]

However, in such an SS communication method, a code transformation method of inverting a PN (Pseudo Nois) sequence each time a transition from 1 to 0 or 0 to 1 is used, In order to demodulate the received signal, it is necessary to generate the same sequence synchronized with the PN sequence used on the transmission side on the receiver side. Therefore, the correlation between the received signal and the PN sequence generated in the receiver is monitored, and the synchronization acquisition (synchronization detection) is performed depending on whether the correlation value exceeds a certain threshold value, and the synchronization is acquired after the synchronization acquisition. Hold synchronization (synchronization tracking). After the synchronization is established, if the correlation value is on the + side with respect to the threshold value, it is demodulated as logic “1”, and if it is on the − side, it is demodulated as logic “0”.

When the demodulation is performed based on the magnitude relationship between the correlation output and the threshold value, stable communication may not be performed when the transmission characteristic changes abruptly.

If demodulation is performed in a state where synchronization acquisition is not properly performed, a peak generated by noise or the like may be recognized as a data signal and may be erroneously demodulated.

The present invention has been made in order to solve the above problems, and in spread spectrum communication capable of performing stable communication even when the transmission characteristic changes rapidly and performing synchronization acquisition appropriately. An object is to provide a synchronization acquisition method and a synchronization acquisition device.

[0009]

SUMMARY OF THE INVENTION The present invention has been made in view of such a problem, and in spread spectrum communication in which transmission data is code-transformed with a PN sequence for communication, the transmission side logically 1 ”, logic“ 0 ”
The first PN sequence and the second PN sequence having a phase different from that of the first PN sequence are respectively allocated and transmitted via the transmission path, and the receiving side receives the same PN sequence and the same PN sequence as the first PN sequence. A first correlation value of the signal and a second correlation value of the same PN sequence as the second PN sequence and the received signal,
A synchronization acquisition method used for spread spectrum communication in which both correlation values are compared and a logic "1" or a logic "0" is assigned and demodulated according to the magnitude, and reception of 1-bit data in 1 cycle The correlation value between the signal and the PN code is observed over a predetermined cycle of the data, the peak value of the observed correlation value is larger than a preset threshold value, and the peak position of the correlation value is one cycle of the data. The synchronous acquisition method is characterized in that when a state appearing at the same position occurs in a predetermined number of times, it is judged as synchronous acquisition.

Further, the peak value and the correlation peak position of the first correlation value are obtained, the correlation peak value and the peak position of the second correlation value are obtained, and both peak values are both larger than a preset threshold value. , Both peak positions are data 1 respectively
When it occurs at a predetermined position of the cycle and the positional relationship between both correlation peak positions corresponds to the phase difference of the PN code, it is possible to determine the synchronous acquisition.

[0011]

According to such means, on the transmitting side, according to the logic "1" and the logic "0" of the transmission data, respectively, the first P
The N sequence and the second PN sequence are allocated and transmitted, and the receiving side detects the peak that appears in each cycle of the PN sequence of the correlation output between the received signal and the two PN sequences generated in the receiving unit, and When the peak value of the values is larger than the preset threshold value, it is judged that the carrier is detected, and after this judgment, which correlator the peak appears in is judged and the received signal data is logically set to "1". , Or to a logical “0”.

Therefore, due to the abrupt change of the transmission characteristic, 2
Even if the shape of the waveform of one correlation output changes abruptly, only the peak (peak value and peak position) of the correlation output needs to be detected, and stable synchronization acquisition, synchronization holding, and data demodulation can be performed.

Further, when the peak value is larger than a preset threshold value and the peak position of the correlation value appears at the same position of one data cycle for a predetermined number of times, it is determined that the synchronization is captured. Therefore, the peak generated by noise or the like is not recognized as a data signal and is not demodulated.

Further, a peak value and a correlation peak position of the first correlation value are obtained, a correlation peak value and a peak position of the second correlation value are obtained, and both peak values are both larger than a preset threshold value. , If both peak positions occur at predetermined positions in one data cycle, and the positional relationship between both correlation peak positions corresponds to the phase difference of the PN code, it is determined to be synchronous acquisition, so that more reliable synchronization is achieved. Can be captured.
In particular, when performing power line communication, even if a correlation peak is distorted due to the characteristics of the power line and a large correlation output occurs at an erroneous position, it is possible to prevent acquisition of synchronization.

[0015]

1 to 7 show an embodiment of the present invention.

The spread spectrum communication apparatus of this embodiment comprises, for example, a transmitter 1 as shown in FIG. 2 and a receiver 11 as shown in FIG.

The transmitter 1 is as follows.
In FIG. 2, 2A, 2B and 2C are EXOR gates. The EXOR gate 2A inputs the output of a specific stage of the 5-stage shift register 3, and the output of the EXOR gate 2A is fed back to the input of the 5-stage shift register 3. In the present embodiment, the 5-stage shift register 3 receives the output. A value other than "00000" is set as an initial value, the output of the 5-stage shift register 3 and the clock c are input to the EXOR gate 2B, and the Manchester-encoded M sequence PN1 having the code length 31 is generated. The five-stage shift register 3, EXO
The R gate 2A and the EXOR gate 2B form a first M sequence generator 4 as a first PN sequence generator. Here, it is assumed that the clock speed of the clock c given to the first M-sequence generator 4 is much faster than the data transmission speed.

Reference numeral 5 is a 14-stage shift register,
The 14-stage shift register 5 receives the output of the 5-stage shift register 3 and is driven by the same clock c as the clock c given to the first M-sequence generator 4, while the EXOR gate 2C controls the 14-stage shift register 5. Manchester coded M sequence PN by inputting output and clock c
Generates 0. The phase of this signal PN0 is delayed from that of the signal PN1 by 17 chips. The 14-stage shift register 5 and the EXOR gate 2C form a second M-sequence generator 6 as a second PN sequence generator.

Then, the selector 7 outputs 1 of the transmission data D.
For the bit, the Manchester-encoded signal PN1 is selected when the logic is 1, and the Manchester-encoded signal PN0 is selected when the logic is 0. This becomes the SS signal.

Reference numeral 8 is a timing signal generator, which is composed of an AND gate, and ANDs the outputs of all the stages of the 5-stage shift register 3, and outputs P of this AND gate 8.
T (a signal representing one cycle of the M-sequence code) is transmission data D
Is a timing signal PT for synchronizing with the signals PN0 and PN1.

Then, the SS signal is band-limited (10 KHz to 450 KHz in the case of a power line) by a filter 9, amplified by a transmission amplifier (not shown) to a predetermined level, and then transmitted through a coupler (not shown). Sent to 10.

FIG. 3 shows the relationship between PNO, PN1, PT and PT and an example of synchronized transmission data D.
Further, FIG. 4 illustrates an SS signal when the transmission data D is “001011”.

In the transmission data D sent from the transmitter 1 via the transmission line 10, the correlation peak may be distorted due to the characteristics of the power line, and a large correlation output may occur at an erroneous position. For this reason, in order to perform accurate data demodulation, the receiving unit 11 first determines whether or not a carrier is sent, and then performs synchronization acquisition and synchronization tracking to demodulate data. I have to.

The circuit of the receiving section 11 is composed of all digital circuits including the comparator, and the clock is common to the flip-prop and the latch, but it is omitted in the figure.

In the receiver 11 of FIG. 1, reference numeral 12 is a PNO correlator (PNO.COR) as a first correlator.
R, matched filter), which is the received signal and M-sequence PNO
And outputs a first correlation value with. Reference numeral 13 is a PN1 correlator (PN1.CORR, matched filter) as a second correlator, which outputs a second correlation value between the received signal and the M sequence PN1. As shown in FIG. 5, the PNO correlator 12 and the PN1 correlator 13 have the values of the respective stages of the shift register 14 and the respective stages of the PN code pattern generator 15 to which the A / D converted reception signal is input. The values are multiplied and the added value is added by the adder 16. For example, in FIG. 6A, when PN1, PN0, and PN1 (101) are received, in (b), PN0, PN0, and PN1 (0) are received.
The output waveform from each correlator 12 and 13 at the time of receiving 01) is shown. Here, it is assumed that the outputs from the correlators 12 and 13 have absolute values.

Here, the Manchester-encoded M sequence is used as the PN sequence, and the outputs from the correlators 12 and 13 have absolute values, and the maximum value thereof is set to 124 (decimal number). Now, the PN sequence has a code length of 31 chips,
When the clock is eight times as large as one chip, one PN sequence is assigned to one bit of data, so one data period period starts at 248 clocks and one data period period ends at 0. The PN series PN1 for data "1" is delayed by 17 chips (advance 14 chips) with respect to the PN series PNO for data "0".

Reference numeral 17 in FIG. 1 is a comparator,
The magnitude of the output of the PNO correlator 12 and the magnitude of the output of the PN1 correlator 13 are compared, and the output is supplied to the demodulation unit 49 via the OR circuit 18. Reference numeral 20 is a selector,
This selector 20 outputs the output of the PNO correlator 12 and the PN
One of the outputs of the 1 correlator 13 is selected and supplied to the first peak detector 21. This first peak detector 21 is
The peak value P1 and the peak position (synchronization point) PT1 during one cycle of the PN series are detected.

That is, the peak detection by the first peak detector 21 is performed as follows. First, the NAND gate 22 performs a negative operation of the logical product with the signal from the selector 20 (details will be described later), and the comparator 24
Only when it is "H", an active signal is output. Then, when the 1-bit data period starts, a clock is input to the first peak detector 21 from a device (not shown),
Each time it is input, the output from the selector 20 and the latch 2
The output of 5 is compared by the comparator 24, and when (signal d)> (output of the latch 25), the enable signal of the latch 25 becomes active, so that the value of the signal d at that time is taken into the latch 25. Further, since the same enable signal as that of the latch 25 is also supplied to the latch 26, the count value of the down counter 27 at that time is taken into the latch 26 at the same time. This operation is data period 1
Since it is carried out over the period, the peak value P1 and the peak position PT1 of the correlation value in the period of 1 bit of data are obtained as the outputs of the latch 25 and the latch 26, respectively.

At the stage when the data period ends, the decoder 28 gives the enable signal e to the latch 29 and the latch 30, and the values of the latch 25 and the latch 26 are respectively latch 29.
Is taken into the latch 30. The enable signal e is also a clear signal to the latch 25, and the latch 25 is cleared. The latches 25 and 26 continue to detect the correlation peak value P1 and the correlation peak position PT1 again during the next data period. Correlation peak value P which is the output of the latch 29
Reference numeral 1 denotes a comparator 31 which is a first comparator, and correlation peak position PT1 which is an output of the latch 30 is a window comparator 32 which is a first window comparator.
Are output respectively.

The operation of the receiver 11 will be described below step by step. 1) Carrier Detection First, carrier detection is performed to determine whether or not communication is being performed. In the initial state, the carry CA1 of the counter 33 is "H".

This is the selection signal SEL1 of the selector 20.
(“H”), and the selector 20 selects the absolute value-correlated output COR1 from the PN1 correlator. When communication is not performed, the peak value P1 obtained from the first peak detector 21 via the selector 20 is a small value, and therefore smaller than the threshold value (for example, 50) set in advance in the comparator 31. The output COM1 of is "L" and is not activated. When the output COM1 is "L", the output TR of the decoder 34 selects the value LDD3 of the selector 35 corresponding to one cycle of 1-bit data (here, 247 in decimal), that is, the A input side of the selector 35. Therefore, the down counter 27 is loaded with 247 after 0 by a load signal that clears the latch 25 in the first peak detector 21.

At the same time, when the output CA1 is "H", the output PEN of the selector 23 selects the signal WA of the NAND gate 36. This signal WA has a counter value of 247.
When it is ˜0, it becomes active (“L” in this case), is input to the first peak detector 21, and is output to the first peak detector 2
At 1, the peaks are observed from 247 to 0, and the peaks are detected all the time over one data cycle to detect the carriers. When the carrier is not detected, the decoder 37 continues to output the clear signal CLR, and the counters 33 and 3 are output.
By setting 8 and 39 to the initial state (CA1 is H, that is, the signal SEL1 remains “H”), the operation is repeated until the carrier is detected.

When the communication is started, the data "1" is continuously sent from the transmitter 1 as a synchronization signal, so that the peak value P1 from the first peak detector 21 becomes a sufficiently large value. 5 preset to 31
It becomes larger than 0, and the signal COM1 becomes active "H". At this time, the output TR of the decoder 34 is determined so that the output K1 from the calculator 40 is selected as the output LDD3 of the selector 35. The computing unit 40 has a peak position PT1.
The load value of the down counter 27 is calculated so that is the center 124 of the data section (center of 0 to 247), and is output as K1. Specifically, K1 = 371-PT1 is calculated and output. For example, if the signal PT1 is 50, K1 becomes 321 and the down counter 27 is loaded with 321 and down counting starts from 321 instead of 247, so the peak position PT1 is the previous one.
If it does not change from the period, the peak position PT1 becomes 124 in this observation (because it enters the observation window A (92 to 156), the signal PW1 becomes “L”). As a result, the signal LDD3 is loaded to the down counter 27 as data by the signal for clearing the latch 25 in the first peak detector 21, and the peak position PT1 is observed in the observation window A (92 ~ 156). Therefore, the output PW1 of the window comparator 32 becomes "L" active and is input to the decoder 37. Here, the width of the observation window A is set so that the correlation peak does not appear from the observation window A even if the correct correlation peak position PT1 shifts due to a sudden change in the characteristics of the power line,
Even if the position of the secondary peak generated by noise or the like shifts, this peak is set to 92 to 156 so that this peak does not enter the observation window A.

Although this may be used for carrier detection with this (that is, the signal COM1 is "H"), a portion OPD41 surrounded by a one-dot chain line is added to further increase the certainty. The OPD 41 is a second peak detector 42 that receives only the signal CORO, and a comparator 4 that is a second comparator that detects the magnitude of the correlation peak value P0.
3. A window comparator 44 which is a second window comparator for observing the correlation peak position PT0.

The correlation output CORO has a peak having a size substantially the same as the peak of the output COR1 at a point delayed by 17 chips from COR1, and the peak positions PT1 and PT0 of the outputs COR1 and COR0 have a substantially constant relationship.
By utilizing this fact and the like, it is determined that the carrier is detected when the following conditions are satisfied, so that the certainty is further increased.

The condition is that (a) the signal COM1 is "H" and the signal PW1 is "L" in the observation of the next one data period section in which the output COM1 becomes "H" and the peak position PT1 is pulled to the position 124. And (a) the signal COM0 is "H" and the signal PW0 is "L" (that is, the signal CDO is "L" active).

The second peak detector 42 detects the peak value P0 and the peak position PTO of the output COR0, like the first peak detector 21 described above. When the peak value PO is equal to or larger than a predetermined value (50 here), the output COM0 of the comparator 43 becomes "H", and the peak position PTO is reached.
Is in the observation window B (here, 36 or less 0 or more or 220 or more and 247 or less) including the position delayed by 17 chips from PT1, the output PWO of the comparator 44 becomes “L”, and in this state, the carrier detection continues. Enter synchronization acquisition.

When any one of the above (a) and (a) is not satisfied, the decoder 37 outputs the clear signal CLR and carries out the carrier detection operation again. In this embodiment,
The signal CLR can be used as a carrier detect signal.

By doing so, even if a peak happens to occur at an abnormal position due to the characteristics of the power line, it will not be erroneously detected as a normal peak.

In the present embodiment, the comparator 31 and the decoder 37 constitute a carrier detector.

2) Synchronous capture When the above (a) and (a) states (carrier detection) continue, the clear signal CLR is not generated from the decoder 37, so the reset signal of the counter 33 is released and one cycle of data is obtained. The counter 33 counts for each section, and when the carrier detection state continues for a predetermined number of times (e.g., 8 times), the carry CA1 changes from "H" to "L". With this, it is determined that the synchronization is established. When the carrier is detected, the peak position is set to PCEN (124), the output TR of the decoder 34 is always set to the output of the selector 35 at the time of synchronous acquisition, and the correlation peak position is not controlled (that is, data 1). Cycle period is fixed).

If either of the conditions (a) and (b) is not satisfied before the predetermined number of times is reached, it is determined that no carrier is detected, the clear signal CLR is output from the decoder 37, the counter 33 is cleared, and the counter 33 is cleared again. Enter carrier waiting mode.

It is needless to say that the condition (a) may be ignored and the condition (a) may be determined to have established synchronization by continuing for a predetermined number of times. In this case, CA1 can be used as the synchronization establishment signal.

When the synchronization is established and the signal CA1 becomes "L", the decoder 37 changes the signal EN1 from "H" to "L" and stops the counter 33 (the signal CA1 remains "L").

FIG. 7 shows correlation output waveforms from the correlators 12 and 13 in the ideal state when the received data is 111 (the received data is 111 even when carrier detection / synchronization is established).

3) Sync tracking When the sync capture signal CA1 "L" is output, the sync tracking mode is entered. Synchronous tracking can be said to be an operation of setting the peak position PT1 to 124 when the peak position PT1 deviates from the originally supposed position 124. During synchronization tracking, the decoder 37 outputs the signal CO
Ignore MO, PWO (ie PTO).

When the signal CA1 becomes "L", the selector 2
The selection signal SEL1 of 0 is the output CH of the comparator 17.
Then, the selector 20 outputs the larger one of the signals COR1 and COR0 as the signal S1OUT. Since the signal CA1 becomes "L" in the selector 23, the NAND gate 4
The signal WT from 7 is selected, and the value of the down counter 27 becomes 156 to 92 for peak observation. That is, since the correlation peak is observed only within the observation window A,
The peak generated by noise or the like is not included in this observation window A.

Further, the reset terminal of the counter 38 is
A signal obtained by inverting the signal CA1 is input, and the signal CA
When 1 is “L”, the forced reset from the outside is released and the counting is started. Further, signals WH and WL from the comparators 45 and 46 indicating that the peak position PT1 has deviated from the originally expected position 124 are input to the counter 38. If the peak position is between 125 and 156, the signal WH is H (active), and if it is between 123 and 92, the signal WL is H (active). The counter 38 outputs OCONT when the signal WH is "H" continuously for a predetermined number of times (e.g. 8 times) or when the signal WL is "H" continuously for a predetermined number of times (e.g. 8 times). "L"
Set to (active). Otherwise, counter 38
Is reset (the signal OCONT remains “H”), and it is observed again whether the signal WH is “H” or the signal WL is “H” for a predetermined number of times, and the selector 35 selects 247. .

When the signal OCONT is in the "L" state, the output TR of the decoder 34 is set so that the output LDD3 of the selector 35 becomes K1. When the signal LDD3 is set to K1, the LDD3 is loaded into the down counter 27 at the timing when the latch 25 in the first peak detector 21 is cleared, as described in 1) Carrier detection above, and the peak position is detected. Control is performed such that PT1 is set to 124.

The counter 38 is provided in this way, and only when the peak position PT1 is continuously deviated in the same direction several times,
By performing the synchronous tracking control, compared with the case where the tracking control is immediately applied when the deviation from 124 is once,
Improves reliability.

In the present embodiment, the counters 33 and 38, the decoder 34, the selectors 23 and 35, etc. constitute a synchronization control section.

4) Data Demodulation In the synchronous tracking state, the signal CA1 is "L",
From the OR circuit 18, the comparator 17 outputs the signal COR1.
And a signal representing the magnitude of the signal COR0 are output to the demodulation unit 49. Further, the latch 1 is generated only when the signal PEN is active, that is, when the peak position PT1 is in the range of the observation window A.
9 is supplied with the enable signal, and only at this time is the comparator 1
The signal from 7 is taken into the latch 19. Therefore, since the observation window A does not include a secondary peak generated by noise or the like, only the peak of the accurate data signal is demodulated.

At the end of the data period, as in the case of the first peak detector 21, the decoder 28 has the latch 4
8 to the enable signal, and the value of the latch 19 is latch 4
Taken in 8. This enable signal is also a clear signal to the latch 19, and the latch 19 is cleared. Latch 19 again provides comparator 1 for the next data period.
Input the signal from 7.

As a result, by determining which correlator 12 or 13 the correlation peak is obtained from during one period of the data, the demodulated data output from the latch 48 has the correlation peak from the PNO correlator 12. The demodulated data is 0 when it is obtained, and the demodulated data is 1 when the correlation peak is obtained from the PN1 correlator 13.

5) Termination of Communication When the communication is terminated and there is no carrier, the peak value P1 from the first peak detector 21 falls below the threshold value 50, and the signal COM1 becomes "L". At this time, that is, when the signal COM1 is "L" and the signal CA1 is "L", the decoder 37 sets the signal C1 to the counter 39 to "H" (inactive) (at the time of carrier detection / at the time of synchronization acquisition / The signal C1 outputs "L" during synchronous tracking). Since this signal C1 is a reset signal for the counter 39, the counter 39 is reset during carrier detection / synchronization acquisition / synchronization tracking, and the carry output NCA of the counter 39 remains “H” (inactive). Is. When the signal C1 becomes "H", the reset of the counter 39 is released, the signal COM1 is "L", and the signal CA
When 1 is "L" (synchronization has been established), counting is performed once for each 1-bit data section, and when the state of the signal COM1 is "L" continues for a predetermined number of times (for example, 16 times), the carry output NCA becomes " L ”(active). When the signal NCA becomes "L", the decoder 37 sets the signal CLR to "L" (active) and resets the counter 33 to notify the end of communication (carrier not detected).

The circuit waits for the start of the next signal when the signal CA1 becomes "H" again. That is, the mode of carrier detection is entered.

In the present embodiment, the portion "continuously for a predetermined number of times" is not limited to this, and for example, "the state occurs a predetermined number of times during a certain number of observations", It can be changed to "continuous for a predetermined number of times".

As described above, according to the present embodiment, the condition that the peak value P0 of the correlation signal COR0 is equal to or greater than the threshold value "50" and the correlation signal COR0 are used when determining the synchronization acquisition after the carrier detection. Peak position PT0 of "0-3
6 "(0 or more and 36 or less) observation window or" 220-24
7 ”(220 or more and 247 or less) is satisfied at the same time, and these conditions are 8
If it continues only once, it is determined that synchronization has been established. As a result, in the present embodiment, it is possible to make a reliable and accurate determination of synchronization acquisition.

In the present embodiment, the received PN sequence 1
When the peak appearing in each cycle is detected and the synchronous operation is performed, and when this peak appears in the output of the PNO correlator 12,
When it is demodulated to logic "0" and appears in the output of the PN1 correlator 13, it is demodulated to logic "1". If it can be determined in which correlator the peak appears, data can be demodulated. Therefore, since it is only necessary to detect the peak value and the peak position of the two correlation outputs, this determination can be performed accurately and reliably, and demodulation is not performed based on the magnitude relationship between the correlation output and the threshold value. Even when the waveform of the correlation output changes abruptly, stable synchronization acquisition and synchronization can be performed, and thus stable communication can be performed.

Further, in the present embodiment, if matched filters are used as the correlators 12 and 13, synchronization acquisition can be performed at high speed.

Further, using an M sequence of code length 31,
The low-frequency component of the signal becomes large, and in the case of power line communication, this low-frequency component is preferably small in terms of coupling loss. Because in power line communication, between the communication device and the power line,
Since a combiner for separating commercial power is required and this combiner is provided with a high-pass filter for cutting the commercial power frequency, when the M-sequence is used, this high-pass filter is used for the low-pass component of the M-sequence. This also cuts off a considerable part of the signal component. This can be improved by using the Manchester-coded M sequence, and the low frequency component can be reduced to reduce the coupling loss with the transmission line 10.

In the present embodiment, the setter includes a selector 35, a down counter 27, decoders 28 and 34.
And a calculator 40, and the determiner includes a decoder 37 and a counter 33.

The PNO and PN1 are out of phase with each other by 17 clocks, but may be out of phase by ± 1 chip or more. Since PN1 is obtained through the delay device 4, the transmitting side P
Only one N-series generator is required, and when the PN1 is delayed by, for example, four chips from the PNO, the 17-stage shift register 15 for delaying is unnecessary, and the shift of the PN-series generator 3 is eliminated. You can use a register instead.

In the present embodiment, the case where the two correlators 12 and 13 shown in FIG. 1 are used is described as an example, but one shift register, one PN code pattern generator and two Both correlators can be configured by one adder and EXORs for the number of stages.

Further, in the present embodiment, the two PN sequences are not limited to specifying and limiting the combination of codes, but any PN sequence can be selected, and the two PN sequences only need to be offset by one chip or more. Therefore, when a signal from another system exists on the transmission line during communication between SS modems of a system, if different PN sequences with small cross-correlation are used in both systems, even if a collision occurs, Can be demodulated with high probability.

Also, when there are a plurality of communication terminals in one system, different PN sequences having a small cross-correlation are assigned to each communication terminal so that demodulation can be substantially performed even if a collision occurs. be able to. Further, each PN sequence can be used as an address of each communication terminal, and in this case, each communication terminal can be identified by the PN sequence. Of course, instead of PN sequences having different and small cross-correlations, the same PN sequence with a shifted phase can be used, and in this case, it is necessary to prevent the phase shift amounts from overlapping each other.

[0067]

As described above, according to the present invention, the transmitting side prepares a first PN sequence and a second sequence obtained by passing this PN sequence through a delay device, and stores the data in each. Corresponding to the logic, the receiving side detects the correlation between the received signal and the two PN sequences generated on the receiving side, and the logical value depends on which correlation output the peak value of the correlation output appears. Since it is demodulated, stable communication can be performed even in the case where the transmission characteristic changes abruptly, as compared with the conventional case where demodulation is performed based on the magnitude relationship between the correlation output and the threshold value.

When the peak value is larger than the preset threshold value and the peak position of the correlation value appears at the same position in one data cycle for a predetermined number of times, it is determined that the synchronization is captured. Therefore, it is possible to prevent the influence of a peak generated by noise or the like at the time of synchronization acquisition. As a result, the peak generated by noise or the like is not recognized as a data signal and is not demodulated.

Further, the peak value and the correlation peak position of the first correlation value are obtained, the correlation peak value and the peak position of the second correlation value are obtained, and both peak values are larger than a preset threshold value. , If both peak positions occur at predetermined positions in one data cycle, and the positional relationship between both correlation peak positions corresponds to the phase difference of the PN code, it is determined to be synchronous acquisition, so that more reliable synchronization is achieved. Can be captured.
In particular, when performing power line communication, even if a correlation peak is distorted due to the characteristics of the power line and a large correlation output occurs at an erroneous position, it is possible to prevent acquisition of synchronization.

Further, the positional relationship between the two correlation peak positions is also used as a criterion for determining the synchronous acquisition, so that the synchronous acquisition can be performed more reliably. Especially when performing power line communication, even if a correlation peak is distorted due to the characteristics of the power line and a large correlation output occurs at a wrong position, it is mistakenly regarded as a correct peak and this peak does not cause synchronization capture. ,
It has a practically useful effect.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a receiving section showing an embodiment of a synchronization acquisition method and a synchronization acquisition device in spread spectrum communication according to the present invention.

FIG. 2 is a block diagram showing a transmission unit of the same embodiment.

FIG. 3 is a timing chart showing the relationship between PNO, PN1 and timing signal PT in the same embodiment.

FIG. 4 is a diagram showing an example of an SS signal transmitted by a transmitter of the same embodiment.

FIG. 5 is a block diagram showing a correlator in the same embodiment.

FIG. 6 shows signals (101) and (00) in the same embodiment.
It is a figure which shows the correlation output from each correlator at the time of receiving 1).

FIG. 7 is a diagram showing a correlation output from each correlator when receiving a signal (111) in the same embodiment.

[Explanation of symbols]

 21 peak detector 31 comparator 32 window comparator P1 peak value PTH threshold

Claims (4)

[Claims] 1. In spread spectrum communication in which transmission data is code-modulated with a PN sequence for communication, the transmission side has a first PN sequence according to a logic "1" and a logic "0" of the transmission data, respectively. A second PN sequence having a phase different from that of the first PN sequence is assigned and transmitted via a transmission line, and at the receiving side, the same PN sequence as the first PN sequence and the first correlation value of the received signal , A second PN sequence that is the same as the second PN sequence and a second correlation value of the received signal are compared, and both correlation values are compared, and logic "1" or logic "0" is assigned depending on the magnitude. A synchronization acquisition method used for demodulating spread spectrum communication, in which a correlation value between a received signal and a PN code in one cycle of 1-bit data is observed over a predetermined cycle of data, and the correlation value of the observed correlation value is Preset peak value The greater the threshold, and the synchronization acquisition method for determining synchronization acquisition and when the conditions peak position of the correlation value appear at the same position of the data one cycle occurs a predetermined number of times. 2. A peak value of a first correlation value and a correlation peak position are obtained, a correlation peak value and a peak position of a second correlation value are obtained, and both peak values are larger than a preset threshold value. 2. The synchronization according to claim 1, wherein when both peak positions occur at predetermined positions in one data cycle, and the positional relationship between the correlation peak positions corresponds to the phase difference of the PN code, it is determined to be synchronous acquisition. Capture method. 3. A transmission unit, a first PN sequence generator for generating a first PN sequence, and a second PN sequence generation for generating a second PN sequence having a phase different from that of the first PN sequence. A vessel,
A selector for selecting the first PN sequence or the second PN sequence according to the logic of 1 bit of transmission data, and transmitting the selected data signal to a receiving unit via a transmission line, and receiving The section includes a first correlator that obtains a first correlation value from the first PN sequence and the received signal, and a second correlator that obtains a second correlation value from the second PN sequence and the received signal. A vessel,
A comparator that compares the first correlation value and the second correlation value and generates a selection command to select the first correlation value or the second correlation value according to the magnitude; A selector for selecting the correlation value by an output, a peak detector for inputting the output of the selector to detect a peak value and a peak position, and a logic "1" or a logic for the binary output of the comparator, respectively. A synchronization acquisition device for use in a spread spectrum communication device, comprising: a demodulation unit that assigns "0"; and a synchronization control unit that generates an enable that causes the demodulation unit to perform a latching operation in synchronization with the peak position. A comparator for comparing a peak value from the peak detector with a preset threshold value and generating an active output when the peak value is larger than the threshold value; After the output of the palletizer becomes active, a setter that sets the peak position from the peak detector to a predetermined position in the next one data cycle, and a peak from the peak detector in a predetermined section including the predetermined position. A window comparator that detects whether or not there is a position and generates an active output when the peak position exists in the predetermined section and the output of the comparator become active, and the peak position is set to the predetermined position by the setting device. After setting, the peak of the correlation signal is continuously observed for a predetermined period of data, and when the output of the comparator and the window comparator has been activated a predetermined number of times, it is determined to be the synchronous acquisition. And a synchronization acquisition device. 4. A transmission unit, a first PN sequence generator for generating a first PN sequence, a second PN sequence generator for generating a second PN sequence having a phase different from that of the first PN sequence, and transmission data 1 The selector has a selector that selects the first PN sequence or the second PN sequence according to the bit logic, and transmits the selected data signal to a receiving unit via a transmission path, and the receiving unit A first correlator that obtains a first correlation value from the first PN sequence and the received signal; a second correlator that obtains a second correlation value from the second PN sequence and the received signal;
A comparator that compares the first correlation value and the second correlation value and generates a selection command to select the first correlation value or the second correlation value according to the magnitude; A selector that selects the correlation value by output, a first peak detector that inputs the output of the selector to detect a peak value and a peak position, and an output from the second correlator that inputs the peak value And a second peak detector for detecting the peak position, a demodulation section for allocating logic "1" or logic "0" to the binary output of the comparator, and the demodulation in synchronization with the peak position. A synchronization acquisition device for use in a spread spectrum communication device having a synchronization control unit for generating a clock for performing a latch operation in a unit, comprising: a peak value from the first peak detector; and a preset threshold value. value And a first active output when the peak value is greater than the threshold value.
And the output of the first comparator becomes active,
A setter for setting the peak position from the first peak detector to a predetermined position in the next one data cycle, and a peak position from the first peak detector in a predetermined section including the predetermined position. Whether or not a peak position exists in the predetermined section, a first window comparator that generates an active output, a peak value from the second peak detector, and a preset threshold value. A second value for generating an active output when the peak value is greater than the threshold value.
Of the comparator and the second peak detector detects whether the peak position is in a preset predetermined section, and when the peak position is in the predetermined section, an active output is generated. After the outputs of the second window comparator and the first comparator become active and the setter sets the peak position to the predetermined position, the peak of the correlation signal is continuously observed for the predetermined period of data. When the active states of the outputs of the first comparator and the second comparator and the active states of the outputs of the first window comparator and the second window comparator occur a predetermined number of times, A synchronization acquisition device, comprising: a determiner for determining synchronization acquisition.