JPH06101709B2 - Digital signal transmission device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described in the following order.

A. Industrial field of use B. Outline of invention C. Prior art D. Problems to be solved by the invention E. Means for solving the problem F. Action G. Example G-1. Overall Schematic configuration G-2. Specific example of encoder G-3. Specific example of filter selection operation G-4. Noise due to finite operation word length G-5. Specific example of measurement result H. Effect of invention A. Industrial use FIELD OF THE INVENTION The present invention relates to a digital signal transmission device, and more particularly to a digital signal transmission device preferably applied to a bit reduction system for reducing a bit rate of a digital signal to be transmitted.

B. Summary of the Invention The present invention selects one of the encoding filters having a plurality of characteristics different from each other and transmits a digital signal through the encoding filter having the selected characteristics. an apparatus for, as a criterion for selecting characteristics of the encoding filters, the maximum absolute value of the output from the encoding filter for each of the characteristics as compared with a constant value L _0, this value L ₀ or less By selecting the lowest-order encoding filter that outputs the maximum absolute value above, it becomes easier to select a lower-order filter when a minute signal is input, and the S / N is designed to prevent deterioration.

C. Conventional Technology Predictive filter processing is known as an information compression technology for reducing the transmission bit rate when converting an audio signal, a video signal, or the like into a digital signal and transmitting the digital signal. This is to extract and transmit the error component between the input signal and its predicted value signal, and the higher the prediction, the larger the prediction gain can be obtained, and the higher the information compression rate. However, in the case of performing such a high-order prediction filter process, the information compression rate decreases when the input signal is in the high frequency range.
A signal transmission apparatus that performs a predictive filtering process to previously provide a plurality of encoding filters for obtaining the above prediction error and selects any one of the plurality of filters is disclosed in, for example, Japanese Patent Application No. It is proposed in No. 59-278501.

That is, in this prior art, the input digital signal is divided into blocks by a certain number of words along the time axis, transmitted through a filter for obtaining a prediction error for the signal of each block, and at the same time as the above-mentioned filter. , N
A plurality of filters including a next-order predictor and a predictor of order N or less are provided, and the output from each filter is compared with each other by comparing the maximum absolute value in the block or the maximum absolute value multiplied by a coefficient with each other. A signal transmission device characterized by selecting a filter having a minimum value is disclosed,
As a result, the selection of each of the above filters is made according to the frequency of the main component of the input signal.

D. Problems to be Solved by the Invention By the way, when trying to reduce the transmission bit rate by using predictive filtering as described above, in order to obtain an ideal S / N improvement close to a logical value, , It is necessary to make the operation word length of the digital filter sufficiently long.

For example, if an encoding filter (FIRD digital filter) with a prediction gain of 36 dB using a second-order predictor is used on the encoder side, the operation word length of the IIR digital filter on the decoder side is at least LSB (maximum). A 6-bit margin is required on the lower side of (lower digit). Even if a 6-bit margin is taken, the noise level when there is no input cannot be made equal to the noise level of a normal PCM signal that is not subjected to bit compression processing. Need to take. Therefore, multipliers such as IIR digital filters, adders,
The word length of memory and the like becomes long, and the circuit scale becomes large.

In view of such a situation, the present invention has an S / N close to the theoretical value or an S / N equivalent to the theoretical value with the same or shorter operation word length as the conventional one.
An object of the present invention is to provide a digital signal transmission device that can obtain / N and has a simple configuration.

E. Means for Solving the Problems In order to solve the above problems, the digital signal transmission apparatus according to the present invention divides the input digital signal into blocks for each predetermined number of words, and Of the plurality of encoding filters having different characteristics from each other, the digital output signal obtained through the selected filter, and a filter indicating the selected filter as selection information. Is a digital signal transmission device for transmitting the digital output signal to a receiving side and decoding the digital output signal with a decoding filter having a characteristic according to the filter selection information, wherein the encoding filter includes filters of different orders. , To select the encoding filter, select the encoding filter of each characteristic from the encoding filter. It is characterized in that the maximum absolute value in the lock is compared with a constant value L _0, and the filter with the lowest order is selected from the filters that output the maximum absolute value in the block below this value L ₀ .

F. Action When the input signal is at a very low level, at least one of the maximum absolute values in each block of the output from the encoding filter of each characteristic becomes the above fixed value L ₀ or less, and the maximum absolute value of L ₀ or less is output. The lowest of the filters to be selected is selected. That is, when a small signal is input in which the lower-order margin bit of the operation word length in the filter is important, a lower-order side filter that does not require the lower-order margin bit of the operation word length is selected, so the lower-order margin bit is selected. S / N deterioration can be prevented even by shortening.

G. Embodiment An embodiment in which the digital signal transmission device according to the present invention is applied to an audio bit rate reduction system will be described below with reference to the drawings.

G-1. Overall Schematic Configuration FIG. 1 is a block circuit diagram showing the overall schematic configuration. The audio bit rate shown in FIG.
The reduction system is composed of an encoder 10 on the recording side (or generally on the transmitting side) and a decoder 30 on the reproducing side (generally on the receiving side). _An audio PCM signal x (n) obtained by sampling at _s , performing quantization and encoding is supplied.

The input signal x (n) is sent to the predictor 12 and the adder 13, respectively, and the predictive signal (n) from the predictor 12 is sent.
Is sent to the adder 13 as a subtraction signal. Therefore, in the adder 13, the prediction signal (n) is subtracted from the input signal x (n) so that the prediction error signal or the (broadly defined) difference output d (n), that is, d (n) = X (n)-(n) ... Is output.

Here, the predictor 12 generally has p past inputs x (n-
p), x (n-p + 1), ..., x (n-1) are linearly combined to calculate the predicted value (n), However, α _k (k = 1, 2, ..., P) is a coefficient. Therefore, the prediction error output or (broadly defined) difference output d (n) is Can be expressed as The FIR filter 14 for obtaining such a prediction error output d (n) is hereinafter referred to as an encode filter or a difference processing filter.

Further, in the present embodiment, the data of the input digital signal within one name time, that is, the input data of a fixed number of words l is divided into blocks, and the above-mentioned encoding filter (difference processing filter) having optimum characteristics is provided for each block. ) I'm trying to select 14. For example, as shown in FIG. 2, a plurality of (for example, three) having different characteristics from each other is used.
Encoding filters 14A, 14B, 14C are provided in advance,
It can be realized by selecting a filter having an optimum characteristic from among these filters 14A to 14C. However, in the structure of a general digital filter, a plurality of sets (for example, three sets) of coefficient α _k groups of the predictor 12 of one encoding filter 14 shown in FIG. In many cases, by switching and selecting these coefficient sets, an operation substantially equivalent to selecting one of the plurality of encoding filters is performed.

Next, the difference output d (n) as the prediction error is added to the adder.
It is sent to the bit compression means consisting of the shifter 15 of the gain G and the quantizer 16 via 21, and the exponent part in the floating point display form is the gain G mentioned above.
Further, compression processing or ranging processing is performed such that the mantissa part corresponds to the output from the quantizer 16, respectively. That is, the shifter 15 switches the so-called range by shifting the digital binary data by the number of bits corresponding to the gain G (arithmetic shift), and the quantizer 16 changes the range of the bit-shifted data. Requantization is performed so as to extract a certain number of bits. Next, the noise shaping circuit (noise shaper) 17 obtains a so-called quantization error, which is an error between the output and the input of the quantizer 16, by the adder 18, and the quantization error is shifted by a gain G ^-1 . It is sent to the predictor 20 via 19 and the prediction signal of the quantization error is added by the adder.
The so-called error feedback is performed such that the signal is fed back to 21 as a subtraction signal. In this way, requantization by the quantizer 16 and error feedback by the noise shaping circuit 17 are performed, and the output terminal 22 Is taken out.

By the way, the output d '(n) from the adder 21 becomes a prediction signal (n) of the quantization error from the noise shaper 17 from the difference output d (n), and the output d from the shifter of the gain G. ″ (N) is d ″ (n) = G · d ′ (n). Also, from the quantizer 16 If the quantization error in the quantization process is e (n), Then, the quantizing error e (n) is taken out by the adder 18 of the noise shaper 17, passes through the shifter 19 of gain G ⁻¹ , and passes through the predictor 20 that takes the linear combination of the past r inputs. The prediction signal (n) of the quantization error obtained by Becomes This equation has the same form as the above equation, and the predictors 12 and 20 have system functions Is a FIR (finite impulse response) filter. From these ~ equations, Substituting the above expression into d (n) of this expression, Next to this Are taken out via the output terminal 22. Where above Z transformation of Then, Becomes

Next, the prediction / range adaptation circuit 24 outputs the mode selection information as the optimum filter selection information, and the encoding filter (difference processing filter) 14 such as the predictor 1 outputs the mode selection information.
2. It is sent to the predictor 20 and the output terminal 27 of the noise shaping circuit 17, and the range information for determining the gains G and G ⁻¹ or the bit shift amount is output, and each shifter 15, 19 and output terminal 26.

Here, as the selection operation of the optimum filter in the prediction / range adaptation circuit 24, for example, the same operation as the signal transmission device of Japanese Patent Application No. 59-278501 previously proposed by the inventors of the present invention, that is, the above-mentioned different The maximum absolute value (peak value) in each block of the output from a plurality of characteristic encoding filters (difference processing filters) or the values obtained by weighting these peak values with a predetermined value are compared with each other, and the value is determined to be the minimum value. It suffices to perform an operation or the like to select an encoding filter that is, but the filter selection operation that is the main part of the present invention is performed in priority to the selection of such an optimum filter. This priority filter selection operation is performed by the comparison circuit 23 to determine whether or not the maximum absolute value (peak value) in each block of the outputs from the plurality of encoding filters is equal to or less than a predetermined positive value L _0. By comparison, the operation is such that the lowest-order one of the plurality of encoding filters having the peak value equal to or less than the constant value L ₀ is selected. By performing this priority filter selection, as will be described later, without increasing the operation word length,
It is possible to reduce the noise level at the time of low level input or when unattended. The constant value L ₀ is, for example, when the word length (the number of requantization bits) of the data requantized by the quantizer 16 and output from the terminal 22 is N bits, for example,
It suffices to set L ₀ = 2 ^N-1 -1.

Next, the input terminal 31 of the decoder 30 on the receiving side or the reproducing side
From the output terminal 22 of the above-mentioned concoder 10. Was obtained by being transmitted or recorded / played back Is being supplied. this It is sent to the adder 33 via the shifter 32 having the gain G ⁻¹ . The output '(n) from the adder 33 is sent to the predictor 34 to become the predicted signal' (n), and this predicted signal '(n) is sent to the adder 33 and sent from the shifter 32. Is added. This added output is the decoded output '(n)
Further, the range information and the mode selection information output from the output terminals 26 and 27 of the encoder 10 and transmitted or recorded / reproduced are output from the output terminal 35 of the encoder 10.
Each is entered in 37. Then, the range information from the input terminal 36 is sent to the shifter 32 to determine the gain G ^-1 ,
The mode selection information from the input terminal 37 is sent to the predictor 34 to determine the prediction characteristic. The prediction characteristic of the predictor 34 is selected to be equal to the characteristic of the predictor 12 of the encoder 10.

In the decoder 30 having such a configuration, the shifter 32 And the output of adder 33 ′ (n) is Becomes Here, the predictor 34 is the predictor 12 of the encoder 10.
Since a property equal to is selected, Therefore, from the formula, Becomes next, Z transformation of Then, Therefore, Becomes Here, assuming that there is no error in the transmission path or recording medium, Then, from the above formula and formula, Becomes

From this equation, it is clear that the noise reduction effect of G ⁻¹ is obtained with respect to the quantization error E (z). At this time, if the spectral distribution of noise appearing at the decoder output is N (z), Becomes

G-2. Specific Example of Encoder Next, FIG. 2 shows a specific example of the encoder 10 of the above-mentioned bit rate reduction system, and corresponds to each part of FIG. 1 among the respective parts of FIG. The parts are given the same reference numbers.

In FIG. 2, a plurality of, for example, three filters 14A, 14B, 14C are provided in advance as the encode filter (difference processing filter) 14, and these filters are provided for each block according to an input signal. The best characteristics are selected from 14A to 14C. These encoding filters 14A to 14C have predictors 12A to 12C, respectively, and output from each predictor 12A to 12C is added to each adder 13A.
It is sent to A to 13C and subtracted from the original input signal. That is, each predictor 12A, 12B, 12
When the system functions of C are P ₁ (z), P ₂ (z), and P ₃ (z), the transfer functions of the filters 14A, 14B, and 14C are 1-P ₁ (z), 1-P, respectively. ₂ (z), 1-P ₃ (z). An example of the characteristics of the filters 14A, 14B and 14C is shown in characteristic curves A, B and C of FIG. 3, respectively. In this FIG.
The characteristic curves A, B, and C are, for example, A: 1-P ₁ (z) = 1 B: 1-P ₂ (z) = 1-0.9375z ^-1 C: 1-P ₃ (z) = 1- 1.796875z ^-1 + 0.8125z ^-2 ,
The sampling frequency s is 37.8 KHz. That is, normal straight PCM data is output from the filter 14A corresponding to the characteristic curve A, primary difference PCM data is output from the filter 14B corresponding to the characteristic curve B, and normal linear PCM data is output from the filter 14C corresponding to the characteristic curve C. Secondary differential PCM data is output.

The output from each of these encoding filters 14A, 14B, 14C is an l-word (1 block) delay circuit 41A, 41, respectively.
B, 41C and maximum absolute value (peak value) hold circuit 42A, 4
2B, 42C, each 1-word delay circuit 41A, 41B, 41
Each output from C is sent to each selected terminal a, b, c of the mode switching (or filter selection) switch circuit 43. That is, each 1-word delay circuit 41A, 41B, 41
In C, a delay of 1 block each is performed,
During this time, each maximum absolute value (peak value) hold circuit 42A, 42
In B and 42C, the maximum absolute value (peak value) d ₁ p (m) of each output data d ₁ (n), d ₂ (n), and d ₃ (n) from each filter 14A, 14B, 14C in the block ), D ₂ p (m), d ₃
p (m) is detected. However, m means a block number, and generally, when the maximum integer that does not exceed the numerical value x is represented as [x], it is a 1-word l block, so the block number m is Becomes

The peak values in these blocks d ₁ p (m), d ₂ p (m),
The d ₃ p (m) is multiplied by the weights (coefficients) β ₁ , β ₂ , β ₃ by the coefficient multipliers 44A, 44B, 44C, respectively, and sent to the prediction / range adaptation circuit 24. In the prediction / range adaptation circuit 24, the weighted peak values β ₁ · d ₁ p (m) and β ₂ from the coefficient multipliers 44A, 44B and 44C, respectively.
・ Compare d ₂ p (m) and β ₃ · d ₃ p (m) with each other, detect the smallest value among them, and select the above-mentioned encoding filter that outputs this minimum block peak value. Output the mode selection information. This mode selection information includes changeover switch 43, predictor 20 and output terminal.
Sent to 27.

Here, the selection of the encoding filters 14A, 14B, 14C when the weighting factors β ₁ , β ₂ , β ₃ of the coefficient multipliers 44A, 44B, 44C are set to about 0.7, ₁ , 2.0, respectively. This is shown in FIG. In FIG. 4, the straight
Characteristic curve A corresponding to the filter 14A that outputs PCM data
The frequency response of is a curve A'moved downward by about 3 dB (on the low level side) by weighting β ₁ ≈0.7 by the coefficient multiplier 44, and the quadratic differential PCM
As for the characteristic curve C corresponding to the filter 14C that outputs data, the coefficient C44 is weighted with β ₃ = 2.0 by the coefficient multiplier 44C, and is moved up about 6 dB (high level side) to the curve C '.
Becomes Note that the filter 1 that outputs the first-order difference PCM data
The characteristic curve B corresponding to 4B is not weighted by the coefficient multiplier 44B (β ₂ = 1), and thus the original curve B is used as it is. The frequencies at the intersections of these curves A'and B, and B and C'are respectively (However, s is the sampling frequency) and s = 3
At 7.8kHz, Becomes In the prediction / range adaptation circuit 24, the lowest level of these characteristic curves A ', B, C'is selected, so that the frequency of the input signal changes from the low range as shown by the thick line in FIG. Up to, the secondary differential PCM mode selection information corresponding to the curve C is output, Up to, the first-order differential PCM mode selection information corresponding to the curve B is output, In the above case, the straight PCM mode selection information is output. When the mode selection information from the prediction / range adaptation circuit 24 is the straight PCM mode, the changeover switch 43 is changeably connected to the selected terminal a and the filter 14A is connected.
From the 1 word delay circuit 41A through straight P
The CM data is sent from the changeover switch 43 to the adder 21 in the next stage. Similarly, the above mode selection information is the primary difference PCM.
In the mode, the change-over switch 43 is changeably connected to the terminal b, and is obtained from the filter 14B through the delay circuit 41B.
When the second-order differential PCM data is sent to the adder 21 and the mode selection information is the second-order differential PCM mode, the changeover switch 43 is switch-connected to the terminal c and obtained from the filter 14C through the delay circuit 41C. Secondary difference PCM data is added by adder 21
Sent to. Therefore, the frequency response of the output d (n) sent from the addition switch 43 to the adder 21 by the changeover switch 43 is represented by the bold line in FIG.

Further, in the present invention, the peak value in the block of the output from the encoding filter on the low order side has a constant value in preference to the mode switching or the selection operation of the optimum filter depending on the frequency of the input signal. When L ₀ or less, the operation is performed such that the filter is selected as the optimum filter.

The constant value L _{0 at} this time is generally L ₀ =, for example, according to the word length or the requantization bit number N of the transmission data requantized by the quantizer 16 and sent from the output terminal 22. 2 ^N-1 -1. As an example, when the number of requantization bits is 4 bits (N = 4), if L _{0 is set} to “7”, transmission can be performed without missing bits during the above requantization.
That is, when the intra-block peak value (maximum absolute value) d ₁ p (m) of the straight PCM data from the filter 14A is equal to or less than “7” which is the L ₀ , the straight PCM data output for straight PCM data is output regardless of the input signal frequency. The filter 14A is preferentially selected so that the high-order (higher prediction gain) difference processing filters 14B and 14C of the first-order difference or more are not selected, and
Even if the in-block peak value d ₁ p (m) is larger than the L ₀ , the in-block peak value d ₂ p (m) of the first-order differential PCM data from the filter 14B is L ₀ “7”. In the following cases, the primary difference processing filter 14B is preferentially selected,
The higher-order (larger prediction gain) second-order difference processing filter 14C is not selected. Peak values d ₁ p (m) and d ₂ p (m) in each block of the data from the filters 14A and 14B on the low-order side (small prediction gain)
Is sent to the comparison circuit 23 to be compared with the constant value L ₀ , the comparison result is sent to the prediction / range adaptation circuit 24, and the above-described priority optimum filter selection is performed. . Therefore, the mode selection information from the prediction / range adaptation circuit 24 becomes information for performing the mode selection according to the above-mentioned filter output level, prior to the mode selection according to the input signal frequency.

G-3. Specific Example of Filter Selection Operation Next, specific examples of operations when the above-described preferential optimum filter selection is performed in the encoder 10 of FIG. 2 as described above are shown in FIG. 5 and FIG. This will be described with reference to the flowchart of FIG.

First, in FIG. 5, in step 101, the straight P
The peak value d ₁ p (m) in the block of CM data is the above constant value
It is determined whether or not it is equal to or less than L ₀ (for example, “7”), and if YES, the process proceeds to step 102, where the straight P
The CM data d ₁ (n) or the pointer address is stored in the register _RC , and if NO, the process proceeds to step 103. In step 103, it is judged whether or not the in-block peak value d ₂ p (m) of the primary differential PCM data is equal to or less than the constant value L ₀ , and YE
In the case of S, the process proceeds to step 104 and the primary difference PCM data d ₂
(N) or its pointer address is stored in the register _RC , and if NO, the routine proceeds to step 105.

The above operation corresponds to the above-mentioned priority filter selection operation in the comparison circuit 23 in FIG.
The subsequent operation corresponds to the optimum filter selecting operation similar to the technique previously proposed by the applicant in Japanese Patent Application No. 59-278501.

That is, in step 105, the peak value d ₁ p (m) in the block of straight PCM data is multiplied by the weighting coefficient β ₁ (for example, β ₁ = 0.7) β ₁ · d ₁ p (m)
And the block value d ₂ p (m) of the primary difference PCM data multiplied by the weighting coefficient β ₂ (for example, β ₂ = 1.0) β ₂
・ Comparison with d ₂ p (m), β ₁ · d ₁ p (m) is β ₂ · d ₂ p
It is determined whether or not it is smaller than (m). If YES, the process proceeds to step 106, and if NO, the process proceeds to step 107. In step 106, the β ₁ · d ₁ p (m) is stored in the register R _B , and the straight PCM data d ₁ (n) or its pointer address is stored in the register R _C , and the process proceeds to step 108. In step 107, the above value β ₂ · d ₂
p (m) is stored in the register R _B and the primary difference PC
The M data d ₂ (n) or its pointer address is stored in the register R _C , and the routine proceeds to step 108. In step 108, the peak value d ₃ in the block of the secondary difference PCM data
Whether or not a value β ₃ · d ₃ p (m) obtained by multiplying p (m) by a weighting coefficient β ₃ (eg β ₃ = 2.0) is smaller than the data in the register R _B (which is indicated by R _B ) If YES, the process proceeds to step 109, and if NO, the process proceeds to step 110. Next, in step 109, the secondary differential PCM data
d ₃ (n) or its pointer address in register R _C
After storing in, proceed to step 110. In step 110,
The data in the register R _C or the data at the address designated by the data in R _C is sent to the ranging and noise shaping circuit system of the next stage as the optimum filter output data. It should be noted that the process proceeds to step 110 even after the above steps 102 and 104 are executed.

The order of the steps in the flow chart of FIG. 5 can be changed in various ways, and the operation substantially similar to that of FIG. 5 can be realized by the procedure shown in FIG. 6, for example.

That is, in FIG. 6, the in-block peak value is determined in order from the higher-order difference processing filter. First, in step 201, the weighted in-block peak value β of the second-order difference filter is determined. ₃ · d ₃
After storing p (m) in the register R _B and the data d ₃ (n) in the block or its pointer address in the register R _C , the process proceeds to step 202. In step 202, the peak value in the block of the primary difference PCM data
It is determined whether or not d ₂ p (m) is equal to or less than the constant value L _{0, and} if NO, the process proceeds to step 203, and if YES, the process proceeds to step 204.
In step 203, it is determined whether or not each weighted peak value β ₂ · d ₂ p (m) in the block is smaller than β ₃ · d ₃ p (m). If YES, the process proceeds to step 204, and NO If so, go to step 205. In step 204, stores the weighted peak value beta ₂ · d ₂ p (m) is the register R _B, data d ₂ (n) of or an address that register
After storing in _RC , go to step 205. In step 205, the peak value d ₁ p in the block of straight PCM data
It is determined whether or not (m) is smaller than the constant value L _{0, and} if NO, the routine proceeds to step 206, and if YES, the routine proceeds to step 207. In step 206, it is judged whether or not the value β ₁ · d ₁ p (m) is smaller than the data (R _B ) in the register R _B , and YE
If S, proceed to step 207, and if NO, proceed to step 208. At step 207, the data d ₁ (n) or its address is stored in the register R _C , and the routine proceeds to step 208. Step 208 corresponds to step 110 of FIG. 5, and sends the data in the register R _C or the data at the address designated by this to the circuit section of the next stage as the optimum filter output data.

By executing the filter selecting operation according to the procedure of the flowchart shown in FIG. 5 or 6 as described above, the peak value d ₁ within the block of the straight PCM data is obtained.
p (m) or the peak value d ₂ p (m) in the block of the first-order differential PCM data is a fixed value L ₀ or less (for example, in the case of 4-bit transmission, L ₀ = 7) The next filter, that is, the first-order difference processing filter is selected over the second-order difference processing filter, and the straight RCM data output filter is selected over the first-order difference processing filter. Note that, in general, the constant value L ₀ may be set to L ₀ = 2 ^N−1 −1 when the requantization bit is N, as described above.

G-4. Noise due to finite operation word length As described above, when the filter output level is low, the operation word length inside the filter is set by preferentially selecting the low-order side filter (small prediction gain). The noise level can be kept low without taking a long time.

This is because a filter with a smaller prediction gain is more advantageous for noise caused by the limitation of the operation word length,
The reason will be described below.

Here, in the above-described digital filters such as the predictors 12, 20, 34, etc., generally, the input data and its delayed output data are multiplied by a coefficient, and arithmetic processing such as adding these data is performed. However, when the operation word length in this operation processing is limited, noise, so-called operation error, occurs due to rounding down or rounding off.

Such calculation error is
₁ (n), er ₂ (n), and er ₃ (n), and their respective z-transforms are sequentially ER ₁ (z), ER ₂ (z), ER as shown in FIG.
₃ (z). That is, on the encoder 10 side,
Let ER ₁ (z) be the calculation error in the filter 14 including the predictor 12 whose transfer function or system function is P (z), and R
The calculation error in the filter including the predictor 20 of (z) is ER
₂ (z), and on the decoder 30 side, the calculation error in the filter including the predictor 34 whose system function is P (z) is ER ₃ (z). The noise added by each of these filters is scattered as white noise uncorrelated with the input signal. When the encoding and decoding characteristics are calculated in consideration of these noises, X (z) (1-P (z))-ER ₁ (z) = D (z).
(D (z) -E (z ) · G -1 · R (z) -ER 2 (z)) G
+ E (z) = (z) ...... When the expression is substituted into the expression and rearranged, the encoded output is Similarly, the decoding characteristics are Here, assuming that there is no error in the transmission line, And substituting the expression into the expression, As a result, for the sum of the noise added by each filter, What will be filtered will appear in the output. This corresponds to the predictive gain of the encode filter 14. It means that the smaller the gain of the filter is, the more advantageous it is to the noise due to the operation word length.

By the way, when the audio bit rate reduction system according to the present embodiment is applied to an optical data file disk system, a so-called CDROM system, etc., an optical disk reproducing device is used by a general user. , It is enough to have a so-called CDROM player,
Since it is not necessary to record data, it is sufficiently practical if the configuration of the decoder 30 can be simplified even if the configuration of the encoder 10 is complicated to some extent.

Considering such a point, it is assumed that the encoder 10 side can have a sufficiently long operation word length, and both the noises ER ₁ (z) and ER ₂ (z) on the encoder side due to the operation word length are 0. Consider the operation word length required on the decoder side at this time, that is, the maximum allowable noise ER ₃ (z).

FIGS. 8 and 9 schematically show the signal levels at points a to e in FIG. 7 when the secondary difference mode is selected, and FIG. 8 shows that the input signal level is low. In the case of data represented within the range of 4 bits from the LSB (least significant bit), FIG. 9 shows the case where the input signal level is relatively large and represented within the range of 10 bits from the LSB. .

Here, in the difference processing filter 14, the prediction gain in the second-order difference mode is as large as about 36 dB on the low frequency side (DC to about 1 kHz), which is equivalent to being shifted by about 5 to 6 bits, This corresponds to the level shift from point a to point b in FIGS. 8 and 9. Next, the shifter 15, the quantizer 16, and the noise shaping circuit 17 perform a ranging process and a noise shaping process.
Here, in the present system, when the word length of the data which is subjected to the ranging process is 4 bits, the bit extraction position at the time of ranging for the smallest input signal is from LSB (least significant bit) B _0. The range is up to bit B ₃ on the higher-order side of 4 bits. Therefore, the eighth
As shown in the figure, the data at the point b, which is shifted to a lower position than the LSB (that is, the bit B ₀ ) by the difference process, is changed by the noise shaping process as a change of the bits B ₀ and B ₁ (see FIG. 8c). Thick line arrow) will be transmitted. This is because even with 4 bits of bits B _{0 to} B ₃ , it is possible to transmit data up to 6 bits lower than the LSB (bit B ₀ ) for low frequency signals by noise shaping. The low-frequency component of noise exists 6 bits below the LSB (about 36 dB below). Next, the decoder 30 is supplied with the 4-bit data of the bits B _{0 to} B _{3 at} the point d, further decodes the lower 6 bits from the 4-bit data, and inputs the lower 6 bits to the point a. Restore the data. For reference, FIG. 9 shows the operation at a normal input level.

As is clear from the above description, when a filter having a prediction gain of about 36 dB in the second-order differential mode is used, the operation word length on the decoder side is set to LS especially when a small signal is input.
It can be seen that a margin of about 6 bits is required on the lower side of B.

Furthermore, according to the actual measurement data, when there is unmanned power, there is still a shortage of the lower 6 bits, which means that when the order of the decoding side filter (11R filter) is high,
The influence of so-called limit cycle, in which a minute signal is output despite unmanned power, is also conceivable.

Therefore, in the present invention, as described above, at the time of minute input, a low-order filter, that is, a filter with a small prediction gain is preferentially selected so that the margin bit on the lower side of the LSB of the operation word length does not need to be lengthened. We are trying to realize a sufficient S / N.

That is, for example, at the time of a minute input such that the input signal can be represented within the number N of requantization bits, even if the signal is compressed by performing high-order (first or higher order) difference processing, there is no S / N improvement effect. However, only the adverse effect of the operation word length limitation at the time of decoding will increase. At this time, the intra-block peak value d ₁ P (m) of the straight PCM data is a constant value L ₀ (= 2 ^N-1 −
1) Since it becomes the following, the straight PCM mode encoding filter (filter 14A in FIG. 2) is selected, and the original sampling peak value PCM data (however,
The number of bits effective as a signal is less than or equal to the requantization bit N. ) Is requantized as it is (lower N bits are extracted) and transmitted, and at the time of decoding, the original input signal can be restored without being adversely affected by noise due to the operation word length limitation, and as a result, S / N Good decoding output can be obtained.

Even if the effective signal component of the straight PCM data exceeds N bits, the primary difference output is represented within N bits, and the peak value d ₂ p (m) in the block is a constant value L ₀ (= 2 ^{N- 1-}
If it is 1) or less, the S / N improvement effect cannot be obtained even if a higher-order (higher prediction gain) second-order difference mode is selected, so first-order difference PCM data may be transmitted. In the decoding output at this time, noise due to the operation word length limitation can be suppressed as compared with the secondary difference mode.

Moreover, overall, the proportion of low-order filters with small prediction gains that are selected increases, so that when a code error occurs, the adverse effects of large prediction gains can be suppressed to some extent, and as a result, the code It is strong against errors.

G-5. Specific Example of Measurement Result Next, a specific measurement result of the decoded output obtained by the above configuration and operation will be described.

FIG. 10 is a block circuit diagram showing a specific example of the decoder 30 in FIG. 1, in which the predictor 34 includes two unit delay elements 41, 4
It has an apparently second-order FIR (finite impulse response) digital filter configuration including two and two coefficient multipliers 43 and 44 and an adder 45. Note that the predictor 34 having the FIR filter configuration is inserted and connected in the feedback path from the output side of the adder 33 to the adder 33 itself, so that an apparently second-order IIR (infinite impulse response) digital signal is obtained. -The filter is configured.

When a digital signal having a word length of, for example, 16 bits is supplied from the shifter 32 to the IIR filter including the adder 33 and the predictor 34, the word length of 16 bits is used.
It is assumed that x extra bits are added to the lower side of the LSB (least significant bit) to perform the operation inside the filter. The operation word length of each part at this time is shown in FIG.

In the case where the decoder 30 having the configuration shown in FIG. 10 is used and the lower side margin bits at the time of the filter calculation on the encoder side are sufficiently set (for example, 6 bits or more), the above-described priority filter selection processing is not performed ( Hereinafter, referred to as a comparative example, or an example without processing), and the S / N measurement result of the decoder output in the case of performing the priority filter selection processing according to the filter output level as in the present invention, FIG. First
Shown in Figure 3.

First, FIG. 11 shows the noise level of the decoder output with respect to the input signal level. The polygonal line a in the figure shows the lower side margin bits of the decoder 30 of FIG. The case where x is 4 bits is shown. In addition, broken lines b and c in FIG. 11 both show the case without the process of the comparative example, and the lower margin bit x on the decoder side is 6 bits for b and 4 bits for c. An example is shown.

As is clear from FIG. 11, when the input level becomes smaller, the lower margin bits in the comparative example (example without processing) are 6 bits (broken line b) and 4 bits (broken line c). Although the difference in each noise level becomes large, in the example (broken line a) where the processing of the present invention is applied, even if the lower side margin bit x is as small as 4 bits, it is almost 6 bits in the above comparative example (broken line c). The noise level is similar to that of S /
N Deterioration is suppressed.

Next, FIG. 12 and FIG. 13 show the frequency spectrum of the decoder output. FIG. 12 shows the case where the priority filter selection processing of the present invention is applied, and FIG. 13 shows a comparative example. Each case is shown without processing. The operation word length has a margin of 6 bits on the lower side. Further, A in each figure shows a case where a 1 kHz signal is input at -60 dB, B shows a case where an input signal is 1 kHz at -80 dB, and C shows an unmanned state.

When the level of the input signal changes in this way, in the example of FIG. 12 in which the processing of the present invention is performed, the first-order difference mode and the second-order difference mode are selected according to the −60 dB, 1 kHz input of A, Only the straight PCM mode is selected according to the 80 dB, 1 kHz input of B, and only the straight PCM mode is selected even when there is no input of C. On the other hand, in the case of FIG. 13 without the processing as the comparative example, the first-order difference mode and the second-order difference mode are selected for the −60 dB, 1 kHz input of A, but the −B of − The first-order differential mode is selected for 80 dB, 1 kHz input, and the second-order differential mode is selected for C unmanned force.

Comparing these FIG. 12 and FIG. 1, FIG. 13B, C of the comparative example when a minute signal is input (including unmanned power)
It can be seen that the S / N ratios shown in FIGS. 12B and 12C of the present invention are clearly improved as compared with FIG. In particular, when unmanned, the noise level in the entire band of Fig. 13C is as high as -89.9 dB, while the noise level of Fig. 12C is as low as -93.7 dB, which is excellent S / N Improvement effect is obtained.

H. Effect of the Invention According to the digital signal transmission device of the present invention, a low-order filter having a small prediction gain is easily selected when a small signal is input, and therefore, a calculation word when a high-order filter having a large prediction gain is used. It is possible to suppress noise due to the limitation of the length. In addition, since the proportion of low-order filters selected increases, the effect of being strong against code errors can be obtained at the same time. Further, at least the lower-order margin bits of the filter internal operation word length on the decoder side can be reduced, so that the circuit configuration of the decoder can be simplified.

[Brief description of drawings]

FIG. 1 is a block circuit diagram schematically showing the overall configuration of an embodiment of the present invention, FIG. 2 is a block circuit diagram showing a concrete example of the encoder shown in FIG. 1, and FIG. Graph showing a specific example of frequency characteristics of each encoding filter, 4th
FIG. 7 is a graph for explaining an example of a filter selecting operation according to the input signal frequency, FIGS. 5 and 6 are flow charts showing examples of different steps of the optimum filter selecting operation according to the present invention, and FIG. A block circuit diagram of the overall configuration in which noise due to a finite operation word length is taken into consideration, FIGS. 8 and 9 are graphs showing the signal levels at points a to e of FIG. 7 for input signals of mutually different levels,
10 is a block circuit diagram showing a concrete example of the decoder in FIG. 1, FIG. 11 is a graph showing the noise level of the decoder output with respect to the input signal level, and FIGS. 12 and 13 are frequency spectra of the decoder output. It is a graph which shows. 10 …… Encoder 12,20,34 …… Predictor 14 …… Encoding filter (difference processing filter) 23 …… Comparison circuit 24 …… Prediction / range adaptation circuit 30 …… Decoder

Claims (1)

[Claims] 1. An input digital signal is divided into blocks of a predetermined number of words, and one of a plurality of encoding filters having different characteristics is selected for the digital signal of each block, and this is selected. The digital output signal obtained through the filter and the filter selection information indicating the selected filter are transmitted, and the digital output signal is received on the receiving side by the decoding filter having the characteristic according to the filter selection information. A digital signal transmission device for decoding, wherein the encoding filter includes filters of different orders, and in order to select the encoding filter, the maximum absolute value in the block from the encoding filter of each characteristic is selected. Compares the value with a fixed value L _0, and outputs the maximum absolute value in the above block below this value L ₀ A digital signal transmission device, characterized in that the filter on the lowest order side is selected from the filters.