JPH0582404A - Method for joining silicon substrate - Google Patents

Method for joining silicon substrate

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Publication number
JPH0582404A
JPH0582404A JP23999991A JP23999991A JPH0582404A JP H0582404 A JPH0582404 A JP H0582404A JP 23999991 A JP23999991 A JP 23999991A JP 23999991 A JP23999991 A JP 23999991A JP H0582404 A JPH0582404 A JP H0582404A
Authority
JP
Japan
Prior art keywords
silicon substrate
plasma
joining
silicon substrates
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23999991A
Other languages
Japanese (ja)
Other versions
JP3134391B2 (en
Inventor
Masatoshi Onoda
真稔 小野田
Kazuhiko Kano
加納  一彦
Takashi Kurahashi
崇 倉橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP03239999A priority Critical patent/JP3134391B2/en
Publication of JPH0582404A publication Critical patent/JPH0582404A/en
Application granted granted Critical
Publication of JP3134391B2 publication Critical patent/JP3134391B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To provide a method for joining silicon substrates by which heat treatment can be performed at a relatively low temperature and a firm joining strength is obtained and, at the same time, a uniform joining strength and joining property can be obtained over the entire surface of a substrate. CONSTITUTION:At the time of performing hydrophilic treatment on the polished surfaces of two silicon substrates to be joined together after polishing the joining surfaces to mirror surfaces, the hydrophilic treatment on at least one of the silicon substrates performed in an atmosphere containing oxygen produced by a plasma generating device 1 using a high-frequency power source 5, while the self-bias voltage across the plasma and electrode plate 4 (cathode) is adjusted to 125-225V, so that a plasma oxide layer containing such a sub-oxide as Si<3+>, Si<2+>, Si<+>, etc., can be formed. Thereafter, the two silicon substrates are joined together by directly sticking the joining surfaces which have been subjected to the hydrophilic treatment to each other and heat-treating them at 200-450 deg.C for 5-120 minutes.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、シリコン基板の接合
方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for joining silicon substrates.

【0002】[0002]

【従来の技術】従来、2枚のシリコン基板を接合する方
法として、ウェハ直接接合(W,D,B)方法がある
(例えば、T.Abe et al :JPn,J.App
l.Phys.29(1990)L2315、新保優;
応用物理56(1987)373.)。この方法は、接
合界面に接着剤等による中間層が存在せず、熱歪みによ
る影響を解消できる。しかし、十分な接合強度を得るた
めには800〜1100℃以上の熱処理が必要である。
そこで、特開平3−91227号公報においては、シリ
コン基板の研磨面の親水化処理として酸素イオンあるい
は酸素ラジカルと反応させシリコン基板の接合面に酸化
層を形成させることで、比較的低温で接合している。
2. Description of the Related Art Conventionally, as a method for joining two silicon substrates, there is a wafer direct joining (W, D, B) method (for example, T. Abe et al: JPn, J. App.
l. Phys. 29 (1990) L2315, Shinpo Yu;
Applied Physics 56 (1987) 373. ). This method does not have an intermediate layer of an adhesive or the like at the bonding interface and can eliminate the influence of thermal strain. However, heat treatment at 800 to 1100 ° C. or higher is necessary to obtain sufficient bonding strength.
Therefore, in Japanese Patent Laid-Open No. 3-91227, as a hydrophilic treatment for a polished surface of a silicon substrate, it is reacted at a relatively low temperature by reacting with oxygen ions or oxygen radicals to form an oxide layer on the bonding surface of the silicon substrate. ing.

【0003】[0003]

【発明が解決しようとする課題】しかし、この公報によ
る方法では、接合強度が0.7〜2.9kgf/mm2 と大き
くばらついたり、接合面積割合(実際の接合面積/全接
着面積)が20〜90%と変化したりする問題点があっ
た。
However, in the method according to this publication, the bonding strength largely varies from 0.7 to 2.9 kgf / mm 2, and the bonding area ratio (actual bonding area / total bonding area) is 20. There was a problem that it changed to 90%.

【0004】この発明の目的は、比較的低温で加熱処理
でき、かつ、強固な接合強度を得るとともに、基板全面
で均一な接合強度と接合性が得られるシリコン基板の接
合方法を提供することにある。
An object of the present invention is to provide a method for bonding silicon substrates, which can be heat treated at a relatively low temperature, can obtain strong bonding strength, and can obtain uniform bonding strength and bondability over the entire surface of the substrates. is there.

【0005】[0005]

【課題を解決するための手段】この発明は、2枚のシリ
コン基板の各接合面を鏡面研磨し、各研磨面をそれぞれ
親水化処理し、この親水化した接合面同士を直接密着
し、これを加熱処理して前記2枚のシリコン基板を相互
に接合するシリコン基板の接合方法であって、前記研磨
面の親水化処理において、前記2枚のシリコン基板のう
ち少なくとも一方のシリコン基板の研磨面の親水化処理
は、高周波電源によるプラズマ発生装置を用いて酸素を
含んだ雰囲気下で、プラズマとカソード電極との間の自
己バイアス電圧を100〜250ボルトにした状態に
て、サブオキサイド、即ち、図11(b)に示すS
3+、図11(c)に示すSi2+、図11(d)に示す
Si+ を有する酸化層を形成させるシリコン基板の接合
方法をその要旨とする。尚、図11(a)にはSiO2
に相当するSi4+を示す。
According to the present invention, the bonding surfaces of two silicon substrates are mirror-polished, and the polishing surfaces are hydrophilized, and the hydrophilized bonding surfaces are directly adhered to each other. A method of joining silicon substrates, wherein the two silicon substrates are bonded to each other by heat treatment, wherein in the hydrophilic treatment of the polishing surface, at least one of the two silicon substrates has a polishing surface. The hydrophilization treatment of the sub-oxide, that is, the sub-oxide, that is, the self-bias voltage between the plasma and the cathode electrode is set to 100 to 250 V in an atmosphere containing oxygen using a plasma generator with a high frequency power source, S shown in FIG. 11 (b)
i 3+, Si 2+ shown in FIG. 11 (c), a method of bonding a silicon substrate to form an oxide layer having a Si + shown in FIG. 11 (d) and its gist. Incidentally, SiO FIG 11 (a) 2
Indicates Si 4+ .

【0006】[0006]

【作用】2枚のシリコン基板の各接合面が鏡面研磨され
る。そして、2枚のシリコン基板のうち少なくとも一方
のシリコン基板の研磨面の親水化処理において、高周波
電源によるプラズマ発生装置を用いて酸素を含んだ雰囲
気下で、プラズマとカソード電極との間の自己バイアス
電圧を100〜250ボルトにした状態にて、サブオキ
サイドを有する酸化層が形成される。このサブオキサイ
ドを有する酸化層により接合界面において有効に働くシ
リコンの未結合手が多く形成される。
Function: The respective bonding surfaces of the two silicon substrates are mirror-polished. Then, in the hydrophilic treatment of the polished surface of at least one of the two silicon substrates, a self-bias between the plasma and the cathode electrode is performed in an atmosphere containing oxygen by using a plasma generator with a high frequency power source. An oxide layer containing suboxide is formed under the condition that the voltage is 100 to 250 volts. Due to the oxide layer containing the sub-oxide, many dangling bonds of silicon that effectively work at the bonding interface are formed.

【0007】その後、この親水化した接合面同士が直接
密着され、加熱処理して2枚のシリコン基板が相互に接
合される。このとき、サブオキサイドを有する酸化層に
よる接合界面にシラノール基(Si−OH)が多いこと
により、水素結合の密度が高くなり、比較的低温で水素
結合からSi−O−Siの共有結合に変化でき、低温で
も高い結合強度が得られる。
After that, the hydrophilic bonding surfaces are brought into direct contact with each other and subjected to heat treatment to bond the two silicon substrates to each other. At this time, since there are many silanol groups (Si—OH) at the bonding interface due to the oxide layer containing suboxide, the density of hydrogen bonds becomes high, and the hydrogen bonds change to Si—O—Si covalent bonds at a relatively low temperature. It is possible to obtain high bond strength even at low temperature.

【0008】[0008]

【実施例】以下、この発明を具体化した一実施例を図面
に従って説明する。図1にはプラズマ発生装置1を示
す。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a plasma generator 1.

【0009】チャンバ2内には一対の電極板3,4が上
下に対向配置されている。上側の電極板3はアースされ
アノード電極となり、下側の電極板4には高周波電源5
が接続されカソード電極となっている。又、チャンバ2
にはガス導入口6とガス排出口7とが設けられ、ガス導
入口6から酸素ガスが導入されるとともに、ガス排出口
7から排気ポンプ8によりチャンバ2内のガスが抜かれ
て最高到達真空度を1Pa以下にすることができる。そ
して、ガス導入口6から酸素ガスがチャンバ2内に導入
され、この両電極板3,4間において酸素ガスのプラズ
マが発生する構造となっている。下側の電極板4上には
シリコン基板9が配置され、シリコン基板9が電極板3
に対向した、いわゆるカソードカップルの状態に設置さ
れる。この状態で、チャンバ2内を真空引きにより1P
a以下にし、その後ガス導入口6より酸素ガスを導入
し、高周波電源5の電力によって電極板3,4間に放電
を起こし、酸素プラズマが発生するようになっている。
In the chamber 2, a pair of electrode plates 3 and 4 are vertically opposed to each other. The upper electrode plate 3 is grounded to serve as an anode electrode, and the lower electrode plate 4 has a high frequency power source 5
Are connected to form a cathode electrode. Also, chamber 2
Is provided with a gas inlet 6 and a gas outlet 7. Oxygen gas is introduced from the gas inlet 6, and the gas in the chamber 2 is evacuated from the gas outlet 7 by the exhaust pump 8 to achieve the highest vacuum degree. Can be 1 Pa or less. Then, oxygen gas is introduced into the chamber 2 through the gas introduction port 6, and plasma of oxygen gas is generated between the two electrode plates 3 and 4. A silicon substrate 9 is arranged on the lower electrode plate 4, and the silicon substrate 9 serves as the electrode plate 3.
It is installed in a so-called cathode-coupled state facing the. In this state, the chamber 2 is evacuated to 1P
Then, oxygen gas is introduced from the gas introduction port 6, and electric power of the high frequency power source 5 causes a discharge between the electrode plates 3 and 4 to generate oxygen plasma.

【0010】次に、図2に示すように、第1のシリコン
基板10と第2のシリコン基板11を接合する場合の接
合工程を説明する。まず、少なくとも一方の面が鏡面研
磨された第1のシリコン基板10と第2のシリコン基板
11とを、例えば1・1・1トリクロロエタン煮沸、ア
セトン超音波洗浄及び純水洗浄を順次行ない、十分に洗
浄する。その後、HF:H2 O=1:20の混合液によ
り、自然酸化膜を除去する。その後、図1に示すプラズ
マ発生装置1におけるチャンバ2内に、第1のシリコン
基板10の鏡面研磨された面を上向きにして設置する。
Next, as shown in FIG. 2, a bonding process for bonding the first silicon substrate 10 and the second silicon substrate 11 will be described. First, the first silicon substrate 10 and the second silicon substrate 11 whose at least one surface is mirror-polished are subjected to, for example, 1.1.1 trichloroethane boiling, acetone ultrasonic cleaning, and pure water cleaning in order to sufficiently perform the cleaning. Wash. After that, the natural oxide film is removed with a mixed solution of HF: H 2 O = 1: 20. Then, the mirror-polished surface of the first silicon substrate 10 is placed in the chamber 2 of the plasma generator 1 shown in FIG.

【0011】そして、チャンバ2内を真空引きして1P
a以下にし、ガス導入口6から酸素ガスを導入し、高周
波電源5の電力によって電極板3,4間に放電を起こ
し、酸素プラズマを発生させる。この時のガス圧は1〜
25Pa,放電電力は50〜300W/m2 程度にす
る。又、プラズマ発生領域13と下側の電極板(カソー
ド)4の間に生じる自己バイアス電位を125〜225
ボルトにする。これにより、第1のシリコン基板10の
表面は酸素プラズマに晒され表面にプラズマ酸化層12
が形成されることになる。
Then, the chamber 2 is evacuated to 1P.
Then, oxygen gas is introduced from the gas introduction port 6, and the electric power of the high frequency power source 5 causes a discharge between the electrode plates 3 and 4 to generate oxygen plasma. The gas pressure at this time is 1
The discharge power is set to 25 Pa and the discharge power is set to about 50 to 300 W / m 2 . In addition, the self-bias potential generated between the plasma generation region 13 and the lower electrode plate (cathode) 4 is 125 to 225.
Make it a bolt. As a result, the surface of the first silicon substrate 10 is exposed to the oxygen plasma and the plasma oxide layer 12 is formed on the surface.
Will be formed.

【0012】このとき、酸素プラズマ中には酸素ラジカ
ル(図1で添字*を付けた酸素)あるいは酸素イオン
(図1でO+ で示す)が存在し、これらは化学的に活性
な状態にあるため、常温中でも容易に酸化反応を進行さ
せられる。さらに、第1のシリコン基板10は上記のよ
うにカソードカップルの状態で配置されるため、酸素イ
オンは第1のシリコン基板10上に到達しやすく、その
ため酸化反応は促進する。又、プラズマ発生領域13に
面した第1のシリコン基板10は上面のみであり、下面
へのプラズマ損傷はない。さらに、常温中での処理であ
るため、酸化を行わない下面に素子が形成されていて
も、素子特性の劣化を導くことはない。
At this time, oxygen radicals (oxygen with suffix * in FIG. 1) or oxygen ions (indicated by O + in FIG. 1) exist in the oxygen plasma, and these are in a chemically active state. Therefore, the oxidation reaction can easily proceed even at room temperature. Furthermore, since the first silicon substrate 10 is arranged in the cathode-coupled state as described above, oxygen ions easily reach the first silicon substrate 10, which promotes the oxidation reaction. Further, the first silicon substrate 10 facing the plasma generation region 13 has only the upper surface, and there is no plasma damage to the lower surface. Further, since the treatment is performed at room temperature, even if the element is formed on the lower surface which is not oxidized, the element characteristic is not deteriorated.

【0013】一方、第2のシリコン基板11の鏡面研磨
面には、公知の熱酸化、化学的気相成長法、スパッタ、
蒸着等の方法により酸化膜14を形成する。さらに、H
2 SO4 −H2 2 混合液中に液温80℃以上で浸漬す
る化学的表面処理を施しておく。
On the other hand, on the mirror-polished surface of the second silicon substrate 11, known thermal oxidation, chemical vapor deposition, sputtering,
The oxide film 14 is formed by a method such as vapor deposition. Furthermore, H
Chemical surface treatment is performed by immersing in a 2 SO 4 —H 2 O 2 mixed solution at a liquid temperature of 80 ° C. or higher.

【0014】そして、プラズマ酸化層12を形成した第
1のシリコン基板10と、所定の方法で形成した酸化膜
14を有する第2のシリコン基板11とを、純水中にて
洗浄し、乾燥窒素等による乾燥を行い、シリコン基板1
0,11の表面に吸着する水分子量を制御する。その
後、図2に示すように、第1のシリコン基板10のプラ
ズマ酸化層12を形成した面と第2のシリコン基板11
の酸化膜14面同志を密着させる。これにより、2枚の
シリコン基板10,11は表面に形成されたシラノール
基及び表面に吸着した水分子の水素結合により接着す
る。さらに、この接着したシリコン基板10及び11を
10Pa以下の真空中にて乾燥させる。このとき、シリ
コン基板10及び11の反りを補償するため、30gf
/cm2 以上の荷重を印加してもよい。
Then, the first silicon substrate 10 having the plasma oxide layer 12 formed thereon and the second silicon substrate 11 having the oxide film 14 formed by a predetermined method are washed in pure water and dried with nitrogen. Silicon substrate 1
Controls the molecular weight of water adsorbed on the surface of 0,11. After that, as shown in FIG. 2, the surface of the first silicon substrate 10 on which the plasma oxide layer 12 is formed and the second silicon substrate 11 are formed.
The oxide film 14 surfaces are adhered to each other. As a result, the two silicon substrates 10 and 11 are bonded by the hydrogen bond of the silanol groups formed on the surface and the water molecules adsorbed on the surface. Further, the bonded silicon substrates 10 and 11 are dried in a vacuum of 10 Pa or less. At this time, in order to compensate the warp of the silicon substrates 10 and 11, 30 gf
A load of / cm 2 or more may be applied.

【0015】さらに、図3に示すように、この接着状態
にあるシリコン基板10及び11をチャンバ15内に配
置する。このチャンバ15は排気ポンプ16により到達
真空度を10Pa以下することができるようになってい
る。そして、シリコン基板10,11の接着界面に存在
する過剰な水分子を抜きながらチャンバ15内のヒータ
17により200〜450℃,5〜120分保持の熱処
理を行い、シリコン基板10,11を接合する。
Further, as shown in FIG. 3, the silicon substrates 10 and 11 in the bonded state are arranged in the chamber 15. The chamber 15 can be made to have an ultimate vacuum of 10 Pa or less by an exhaust pump 16. Then, while removing excess water molecules existing at the bonding interface between the silicon substrates 10 and 11, the heater 17 in the chamber 15 performs heat treatment at 200 to 450 ° C. for 5 to 120 minutes to bond the silicon substrates 10 and 11. ..

【0016】ここで、本実施例のように図1に示す装置
で酸素プラズマ処理によりプラズマ酸化層12を形成す
る場合、特に放電電力とガス圧を変化させることでプラ
ズマ発生領域13と下側の電極板(カソード)4の間に
生じる自己バイアス電位を変化させることが可能であ
る。そこで、放電電力とガス圧、処理時間を種々変化さ
せてプラズマ酸化処理を行い、第1のシリコン基板10
上にプラズマ酸化層12を形成した。さらに、図4,5
に示すような第2のシリコン基板11に穴径が1mmの貫
通穴18を3mmピッチで形成し、このような第2のシリ
コン基板11と第1のシリコン基板10とをプラズマ酸
化層12を介して接合を行った。接合後に第1のシリコ
ン基板10と第2のシリコン基板11を図4,5に示す
破線の位置でダイシングカットした。そして、その各チ
ップに対し両基板10,11の接合性と、貫通孔18を
通して圧力を加えることによる耐圧を測定した。
Here, when the plasma oxide layer 12 is formed by the oxygen plasma treatment in the apparatus shown in FIG. 1 as in the present embodiment, the plasma generation region 13 and the lower side of the plasma generation region 13 are particularly changed by changing the discharge power and the gas pressure. It is possible to change the self-bias potential generated between the electrode plates (cathodes) 4. Therefore, the plasma oxidation processing is performed by changing the discharge power, the gas pressure, and the processing time variously, and the first silicon substrate 10
A plasma oxide layer 12 was formed on top. Furthermore, FIGS.
The through holes 18 having a hole diameter of 1 mm are formed at a pitch of 3 mm in the second silicon substrate 11 as shown in FIG. 2, and the second silicon substrate 11 and the first silicon substrate 10 are formed with the plasma oxide layer 12 interposed therebetween. And joined. After the bonding, the first silicon substrate 10 and the second silicon substrate 11 were cut by dicing at the positions indicated by broken lines in FIGS. Then, the bondability of both substrates 10 and 11 to each of the chips and the breakdown voltage by applying pressure through the through hole 18 were measured.

【0017】その結果を、表1に示す。尚、表1におい
て、判定としては接合率と耐圧とを加味して評価したも
のであり、実用上好ましいものには○を、実用上好まし
くないものには×を付けた。
The results are shown in Table 1. In Table 1, the judgment was made by taking the joining rate and the breakdown voltage into consideration, and was marked with "○" for practically preferable and "X" for practically unfavorable.

【0018】この表から分かるようにバイアス電位が1
25V〜225Vのとき良好な接合性を示し、大きな接
合強度を有していることが分かる。ただし、バイアス電
位は100V以下でも500V以上でも放電は安定せ
ず、このためプロセスが成り立たなくなる。
As can be seen from this table, the bias potential is 1
It can be seen that when the voltage is 25 V to 225 V, good bondability is exhibited and the bond strength is high. However, even if the bias potential is 100 V or less or 500 V or more, the discharge is not stable, so that the process cannot be established.

【0019】[0019]

【表1】 [Table 1]

【0020】次に、種々のバイアス電位でプラズマ酸化
処理を行ない形成したプラズマ酸化層12をXPS(X
線光電子分光法)により測定した。その結果を、図6に
示す。この図から分かるように、バイアス電位を変化さ
せることで、プラズマ酸化層12の最表面のSi2p光電
子スペクトルは変化している。特に、バイアス電位が高
いもの(400V,500V)は、Si4+(SiO2
相当する)が高くなっており、酸化が進んでいることが
分かる。又、バイアス電位が高いもの(400V,50
0V)は、Si4+とSi0 (メタル)の比率から相対的
な酸化膜厚が厚くなっていることも分かる。一方、バイ
アス電位が125V,225Vと低いものは、シリコン
の2pピークが103.4eVよりもエネルギーが低い
側にシフトしており、Si3+,Si2+などのサブオキサ
イドがプラズマ酸化層12の最表面に多くあることが分
かる。
Next, the plasma oxidation layer 12 formed by performing the plasma oxidation process with various bias potentials is subjected to XPS (X
Line photoelectron spectroscopy). The result is shown in FIG. As can be seen from this figure, the Si 2p photoelectron spectrum on the outermost surface of the plasma oxide layer 12 is changed by changing the bias potential. In particular, those having a high bias potential (400 V, 500 V) have high Si 4+ (corresponding to SiO 2 ), and it can be seen that oxidation is advanced. In addition, high bias potential (400V, 50
It can also be seen from the ratio of Si 4+ and Si 0 (metal) that the relative oxide film thickness becomes thicker at 0 V). On the other hand, when the bias potential is as low as 125 V and 225 V, the 2p peak of silicon is shifted to the side where the energy is lower than 103.4 eV, and sub oxides such as Si 3+ and Si 2+ are contained in the plasma oxide layer 12. It turns out that there are many on the outermost surface.

【0021】又、熱酸化されたSi(Si4+)は2.2
倍の体積に膨張する。このため、図7に示すように、一
部のSi原子が未酸化のまま酸化膜中を拡散したり、あ
るいは、図8に示すように、未酸化のSi原子が格子間
Siとして基板拡散をしたりする。又、図9に示すよう
に、シリコン基板中の空格子点がSiO2 界面で消費さ
れたり、プラズマ酸化層12中の酸素欠陥や非架橋酸化
などによる点欠陥が存在しやすくなると考えられる。こ
のため、ダングリングボンドやダイマボンドなども生成
しやすくなる。これと同様に、プラズマ酸化することで
も上述のメカニズムが生じて、低温でも活性種となりう
る酸化種が多数生成しているものと推定される。このた
め、第1のシリコン基板10のプラズマ酸化層12を低
バイアス電位で形成したものと第2のシリコン基板11
とは、450℃×2hr程度の比較的低温であっても有
効に接合される。又、耐圧試験においても、強固な接合
がなされているために強度が強いものと推定される。
Further, the thermally oxidized Si (Si 4+ ) is 2.2.
Expands to double the volume. For this reason, as shown in FIG. 7, some Si atoms diffuse in the oxide film while remaining unoxidized, or as shown in FIG. 8, unoxidized Si atoms cause substrate diffusion as interstitial Si. To do Further, as shown in FIG. 9, it is considered that vacancies in the silicon substrate are consumed at the SiO 2 interface, and point defects due to oxygen defects or non-crosslinking oxidation in the plasma oxide layer 12 are likely to exist. Therefore, dangling bonds, dimer bonds, etc. are easily generated. Similarly, it is presumed that plasma oxidation causes the above-mentioned mechanism, and a large number of oxidizing species that can be active species are generated even at low temperatures. Therefore, the first silicon substrate 10 formed with the plasma oxide layer 12 at a low bias potential and the second silicon substrate 11 are formed.
Is effectively joined even at a relatively low temperature of about 450 ° C. × 2 hr. Also, in the pressure resistance test, it is presumed that the strength is strong because of strong bonding.

【0022】次に、図10を用いて本発明を適用した半
導体式圧力センサを説明する。図10は実施例の接合方
法を適用して製造した半導体式圧力センサの一例を示す
構造図である。本圧力センサは、検知部としての第1の
シリコン基板19と、台座としての第2のシリコン基板
20とから構成されている。n型の第1のシリコン基板
19の上面にはp型拡散層21が形成され、拡散歪みゲ
ージをなしている。又、第1のシリコン基板19の上面
には保護膜22が形成され、この保護膜22にはp型拡
散層21と電気的接続をとるためのコンタクトホール2
3,24が形成され、コンタクトホール23,24にて
電極25,26が配線されている。さらに、第1のシリ
コン基板19の下面には、例えばアルカリ溶液による異
方性エッチングあるいは沸硝酸による等方性エッチング
等の公知の方法により凹部27が形成され、ダイヤフラ
ム28が加工されている。一方、台座としての第2のシ
リコン基板20には圧力導入孔29が配設されている。
Next, a semiconductor type pressure sensor to which the present invention is applied will be described with reference to FIG. FIG. 10 is a structural diagram showing an example of a semiconductor pressure sensor manufactured by applying the bonding method of the embodiment. The present pressure sensor is composed of a first silicon substrate 19 as a detector and a second silicon substrate 20 as a pedestal. A p-type diffusion layer 21 is formed on the upper surface of the n-type first silicon substrate 19 to form a diffusion strain gauge. Further, a protective film 22 is formed on the upper surface of the first silicon substrate 19, and the contact hole 2 for electrically connecting to the p-type diffusion layer 21 is formed in the protective film 22.
3, 24 are formed, and the electrodes 25, 26 are wired in the contact holes 23, 24. Further, a recess 27 is formed on the lower surface of the first silicon substrate 19 by a known method such as anisotropic etching with an alkaline solution or isotropic etching with boiling nitric acid, and a diaphragm 28 is processed. On the other hand, a pressure introduction hole 29 is provided in the second silicon substrate 20 as a pedestal.

【0023】そして、上述の所定の素子形成、加工処理
を施した第1のシリコン基板19の下面と、台座となる
第2のシリコン基板20の上面を鏡面研磨しておく。こ
の鏡面研磨された第1のシリコン基板19の下面にプラ
ズマ酸化層30を形成する。又、第2のシリコン基板2
0の鏡面研磨面に酸化膜31が形成され、さらに、H 2
SO4 −H2 2 混合液中に液温80℃以上で浸漬する
化学的表面処理を施しておく。そして、プラズマ酸化層
30を形成した第1のシリコン基板19と、所定の方法
で形成した酸化膜31を有する第2のシリコン基板20
とを純水中にて洗浄し、乾燥窒素等による乾燥を行い、
基板表面(接合する面同士)に吸着する水分子量を制御
する。この後、プラズマ酸化層30と酸化膜31を介し
て第1のシリコン基板19のダイヤフラム28と、第2
のシリコン基板20の圧力導入孔29を位置合わせして
接合する。
Then, the above-mentioned predetermined element formation and processing
And the lower surface of the first silicon substrate 19 that has been subjected to
The upper surface of the second silicon substrate 20 is mirror-polished. This
On the underside of the first mirror-polished first silicon substrate 19.
A zuma oxide layer 30 is formed. In addition, the second silicon substrate 2
Oxide film 31 is formed on the mirror-polished surface of 0. 2
SOFour-H2O2Immerse in a mixed solution at a liquid temperature of 80 ° C or higher
Chemical surface treatment is applied. And the plasma oxide layer
First silicon substrate 19 having 30 formed thereon and a predetermined method
Second silicon substrate 20 having oxide film 31 formed in
And are washed in pure water and dried with dry nitrogen etc.
Controlling the amount of water molecules adsorbed on the substrate surface (surfaces to be joined)
To do. After that, through the plasma oxide layer 30 and the oxide film 31,
The diaphragm 28 of the first silicon substrate 19 and the second
By aligning the pressure introducing hole 29 of the silicon substrate 20 of
To join.

【0024】このようにして製造された圧力センサは、
拡散層21,電極25,26等の素子形成後に第1のシ
リコン基板19と第2のシリコン基板20を接合してい
る。よって、前述のように高圧用センサとして高い接合
強度を得るために、この接合工程時において従来のよう
な高温による熱処理を必要としないため、上記素子部の
素子特性が熱処理の高温によって変化あるいは劣化する
ことはない。又、接合面の親水化処理において従来のよ
うに酸性溶液中に浸漬することもないため、耐酸性溶液
用の保護膜を特別に素子形成面に被着する必要もなく、
又、素子形成も通常の工程により行えるため、工程数の
増加あるいは工程の変更等の必要がない。
The pressure sensor manufactured in this way is
The first silicon substrate 19 and the second silicon substrate 20 are bonded after the elements such as the diffusion layer 21 and the electrodes 25 and 26 are formed. Therefore, as described above, in order to obtain high bonding strength as a high-voltage sensor, it is not necessary to perform heat treatment at a high temperature as in the past during this bonding process, and therefore the element characteristics of the element portion are changed or deteriorated due to the high temperature of the heat treatment. There is nothing to do. Further, since it is not soaked in an acidic solution as in the conventional case in the hydrophilic treatment of the bonding surface, there is no need to specially coat a protective film for an acid resistant solution on the element forming surface,
Further, since the element formation can be performed by the normal process, it is not necessary to increase the number of processes or change the process.

【0025】又、第2のシリコン基板20の接合面には
酸化膜31を形成せずに第1のシリコン基板19のプラ
ズマ酸化層30と同様なプラズマ酸化層を形成してもよ
い。ただし、第1のシリコン基板19と第2のシリコン
基板20の各々の接合する側の面をプラズマ酸化した場
合、ボイド等が界面に発生しやすいことが分かってい
る。しかしながら、強固な接合は得られるので、第1の
シリコン基板19と第2のシリコン基板20が同一材料
でしかも接着剤等の中間層を介さずに一体化できる。こ
のため化学的にも安定であり、また熱膨張係数の差によ
る温度ドリフトが問題となることもない。
Further, a plasma oxide layer similar to the plasma oxide layer 30 of the first silicon substrate 19 may be formed on the bonding surface of the second silicon substrate 20 without forming the oxide film 31. However, it has been found that when the surfaces of the first silicon substrate 19 and the second silicon substrate 20 on the bonding side are plasma-oxidized, voids or the like are likely to occur at the interface. However, since a strong bond is obtained, the first silicon substrate 19 and the second silicon substrate 20 can be integrated using the same material and without an intermediate layer such as an adhesive. Therefore, it is chemically stable, and there is no problem of temperature drift due to the difference in thermal expansion coefficient.

【0026】このように本実施例では、2枚のシリコン
基板10,11の各接合面を鏡面研磨し、各研磨面をそ
れぞれ親水化処理する際に、2枚のシリコン基板10,
11のうち少なくとも一方のシリコン基板の研磨面の親
水化処理は、高周波電源5によるプラズマ発生装置1を
用いて酸素を含んだ雰囲気下で、プラズマと電極板4
(カソード電極)との間の自己バイアス電圧を100〜
250ボルトにした状態にてSi3+,Si2+,Si+
のサブオキサイドを有するプラズマ酸化層12を形成さ
せるようした。その後、この親水化した接合面同士を直
接密着し、これを加熱処理して2枚のシリコン基板1
0,11を相互に接合した。つまり、接合面を酸性溶液
(H2 SO4 /H2 2 )中に浸漬して親水性とするの
ではなく、接合面を酸素イオンあるいは酸素ラジカルと
反応させてプラズマ酸化層12を形成させて親水性とす
るものであり、かつ、プラズマ酸化層12としてS
3+,Si 2+等のサブオキサイドを多数生成させるもの
である。即ち、このプラズマ酸化層12中のサブオキサ
イドにより接合界面において単位面積当たりのシラノー
ル基(Si−OH)の数が多くなり水素結合力が向上し
たり、あるいは接合に有効に働く未結合手が多く形成さ
れる。その結果、水素結合の密度も高くなり、比較的低
温で水素結合からSi−O−Siの共有結合に変化でき
るため、低温でも高い接合強度が得られる。さらに、全
面で有効に接合できるため、強度バラツキも低減でき、
又、XPS分析法で測定したところ、サブオキサイドの
中でSi2+、Si3+が表面に多いものの接合が特に良好
であった。
As described above, in this embodiment, two pieces of silicon are used.
Each bonded surface of the substrates 10 and 11 is mirror-polished, and each polished surface is polished.
When performing the hydrophilic treatment, the two silicon substrates 10,
Parent of the polished surface of at least one of the 11 silicon substrates
For the hydration treatment, the plasma generator 1 with the high frequency power source 5 is used.
Using an atmosphere containing oxygen, plasma and electrode plate 4
The self-bias voltage between (cathode electrode) is 100 to
Si at 250 volts3+, Si2+, Si+etc
Forming a plasma oxide layer 12 having a suboxide of
I was allowed to do it. After that, bond the hydrophilic surfaces together.
Two silicon substrates 1 that come into close contact with each other and are heat treated
0 and 11 were joined to each other. In other words, the bonding surface
(H2SOFour/ H2O2) To make it hydrophilic
Instead, the joint surface is treated with oxygen ions or oxygen radicals.
React to form plasma oxide layer 12 to render it hydrophilic
And S as the plasma oxide layer 12
i3+, Si 2+Which produces a large number of sub-oxides such as
Is. That is, the sub-oxide in the plasma oxide layer 12 is
Silano per unit area at the bonding interface due to the id
The number of radicals (Si-OH) increases and the hydrogen bond strength improves.
Or, there are many unbonded hands that work effectively for joining.
Be done. As a result, the density of hydrogen bonds is also high and relatively low.
Can change from hydrogen bond to Si-O-Si covalent bond at high temperature
Therefore, high bonding strength can be obtained even at low temperature. Moreover, all
Since it can be effectively joined on the surface, variations in strength can be reduced,
In addition, when measured by XPS analysis,
In Si2+, Si3+Bonding is especially good even though there are many
Met.

【0027】このようにして、比較的低温(450℃×
2時間以内)で加熱処理でき、かつ、強固な接合強度を
得るとともに、基板全面で均一な接合強度と接合性が得
られる。又、アルミ等の配線を施した素子であっても、
素子部を損傷することなく、他のシリコン基板と直接接
合可能となり、高信頼性を確保できる。
Thus, at a relatively low temperature (450 ° C. ×
Within 2 hours), heat treatment can be performed, and strong bonding strength can be obtained, and uniform bonding strength and bonding property can be obtained over the entire surface of the substrate. Also, even if the element is made of wiring such as aluminum,
It is possible to directly bond to another silicon substrate without damaging the element portion, and high reliability can be secured.

【0028】尚、この発明は上記実施例に限定されるも
のではなく、例えば、高周波電源によるプラズマ発生装
置でのプラズマとカソード電極との間の自己バイアス電
圧は100〜250ボルトであればよい。
The present invention is not limited to the above embodiment, and for example, the self-bias voltage between the plasma and the cathode electrode in the plasma generator using the high frequency power source may be 100 to 250 volts.

【0029】[0029]

【発明の効果】以上詳述したようにこの発明によれば、
比較的低温で加熱処理でき、かつ、強固な接合強度を得
るとともに、ウェハ全面で均一な接合強度と接合性が得
られる優れた効果を発揮する。
As described in detail above, according to the present invention,
It exhibits an excellent effect that heat treatment can be performed at a relatively low temperature, a strong bonding strength is obtained, and uniform bonding strength and bonding property are obtained over the entire surface of the wafer.

【図面の簡単な説明】[Brief description of drawings]

【図1】プラズマ発生装置を示す図である。FIG. 1 is a diagram showing a plasma generator.

【図2】第1及び第2のシリコン基板を示す図である。FIG. 2 is a diagram showing first and second silicon substrates.

【図3】真空接合装置を示す図である。FIG. 3 is a diagram showing a vacuum bonding apparatus.

【図4】試験用のシリコン基板を示す図である。FIG. 4 is a diagram showing a silicon substrate for testing.

【図5】図4のA−A断面図である。5 is a cross-sectional view taken along the line AA of FIG.

【図6】XPSによる測定結果を示す図である。FIG. 6 is a diagram showing measurement results by XPS.

【図7】シリコンの構造を説明するための図である。FIG. 7 is a diagram for explaining the structure of silicon.

【図8】シリコンの構造を説明するための図である。FIG. 8 is a diagram for explaining the structure of silicon.

【図9】シリコンの構造を説明するための図である。FIG. 9 is a diagram for explaining the structure of silicon.

【図10】本発明を圧力センサに具体化したときの断面
図である。
FIG. 10 is a cross-sectional view when the present invention is embodied in a pressure sensor.

【図11】サブオキサイドを説明するための図である。FIG. 11 is a diagram for explaining a sub oxide.

【符号の説明】[Explanation of symbols]

1 プラズマ発生装置 4 電極板(カソード電極) 5 高周波電源 10 第1のシリコン基板 11 第2のシリコン基板 12 プラズマ酸化層 DESCRIPTION OF SYMBOLS 1 Plasma generator 4 Electrode plate (cathode electrode) 5 High frequency power supply 10 First silicon substrate 11 Second silicon substrate 12 Plasma oxide layer

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 2枚のシリコン基板の各接合面を鏡面研
磨し、各研磨面をそれぞれ親水化処理し、この親水化し
た接合面同士を直接密着し、これを加熱処理して前記2
枚のシリコン基板を相互に接合するシリコン基板の接合
方法であって、 前記研磨面の親水化処理において、前記2枚のシリコン
基板のうち少なくとも一方のシリコン基板の研磨面の親
水化処理は、高周波電源によるプラズマ発生装置を用い
て酸素を含んだ雰囲気下で、プラズマとカソード電極と
の間の自己バイアス電圧を100〜250ボルトにした
状態にて、サブオキサイドを有する酸化層を形成させる
ことを特徴とするシリコン基板の接合方法。
1. Bonding surfaces of two silicon substrates are mirror-polished, each polishing surface is hydrophilized, and the hydrophilized bonding surfaces are directly adhered to each other.
A method of joining silicon substrates for joining two silicon substrates to each other, wherein in the hydrophilic treatment of the polishing surface, the hydrophilic treatment of the polishing surface of at least one of the two silicon substrates is performed by high frequency An oxide layer having a sub-oxide is formed by using a plasma generator with a power supply in an atmosphere containing oxygen and a self-bias voltage between the plasma and the cathode electrode of 100 to 250 V. And a method for joining silicon substrates.
JP03239999A 1991-09-19 1991-09-19 Silicon substrate bonding method Expired - Lifetime JP3134391B2 (en)

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