JPH0570338B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a synchronization circuit in a receiving device that receives radio waves using a frequency hopping modulation method, which is one of the modulation methods of a spread spectrum communication method.

(Prior art and its problems) The frequency hopping method is a digital modulation method that is a modification of FSK, in which the carrier frequency is switched at high speed within an appropriate frequency band for transmission, and the receiving side receives the same frequency change as the transmitting side. This method uses a local oscillator (hopping oscillator) to demodulate the received signal. If the frequency changes on the transmitting and receiving sides are different, the received signal will not be demodulated at all.
Usually, the carrier frequency is synchronized so that the frequency change of the hopping oscillator on the receiving side matches the frequency change pattern of the received signal by mutually synchronizing the same pseudo-random pattern determined in advance on both the transmitting side and the receiving side. A circuit is required.

Although there are various synchronization methods, a method called sliding correlation will be described here. FIG. 1 is an example of a conventional frequency hopping type synchronous circuit.

In Figure 1, 1 is a mixer (MIX), 2 is a bandpass filter (BPF), 3 is a demodulation circuit (DEM), 4 is an envelope detector (DET), 5 is a subtracter (SUB), and 6 is synchronization Threshold voltage input for judgment, 7 is timing control circuit (CONT), 8 is pseudo random pattern generator (PN GE), 9 is hopping oscillator (HOP LO)
It is.

Here, the BPF 2 is for removing the carrier component and the sum component in the signal multiplied by the mixer 1, and at the same time removing noise outside the band. At the start of reception, the frequencies of the reception input and the hopping oscillator 9 are switched according to a pseudo-random pattern of the same code string, but the timings do not match, and the timing difference is unknown at which point in one period of the pseudo-random pattern. It is certain. Control to eliminate this timing difference is normally performed by the following two-stage control.

First, the timing of frequency switching to the hopping oscillator 9 is shifted by 1 bit length or 1/2 bit length of the pseudorandom pattern by a signal given from the timing control circuit 7 to the pseudorandom pattern generator 8, and the receiving input is changed to the hopping oscillator 9. Control (sliding correlation) is performed to almost eliminate the timing difference between

Next, the remaining timing difference due to sliding correlation is controlled to be always zeroed by a phase locked loop known as an early-late gate.

Here, we will consider the former type of control.

Control that almost eliminates the timing difference by sliding correlation is such that when the timing difference is larger than the 1-bit length of the pseudorandom pattern, the level of the difference frequency component from mixer 1, that is, the output voltage of envelope detector 4, becomes almost zero, and the timing The difference is 1
This method utilizes the fact that a large correlation voltage is output from the envelope detector 4 only when the voltage falls within a certain bit, and when the voltage from the envelope detector 4 exceeds a certain appropriate threshold voltage 6, it is output to the subtractor 5. Control is performed to shift the frequency switching timing until the output voltage becomes positive.

In other words, whether or not the received signal and the frequency change timing of the hopping oscillator 9 coincide with each other is determined (synchronization determination) based on whether the output voltage of the subtracter 5 is positive or negative. The threshold voltage 6, which serves as a criterion for determination, has conventionally been set to the average voltage of a level detector during noise or a voltage that changes depending on the signal level of the received signal.

Such a synchronization circuit has the disadvantage that errors in synchronization determination may easily occur depending on the waveform, spectrum, and signal level of the interference. For example, when the signal level of the interference signal is very high compared to the level of the desired signal, in the conventional method that determines the threshold voltage according to the signal level of the received signal, the threshold voltage becomes higher than the correlation voltage due to the signal level of the interference signal. This may make it impossible to detect the correct synchronization position.

Further, although the correlated voltage changes depending on the signal level, it is difficult for an envelope detector to correctly detect the correlated voltage over a wide dynamic range, which is likely to cause a synchronization judgment error.

(Object of the Invention) An object of the present invention is to provide a synchronization circuit for receiving frequency hopping modulation radio waves in a spread spectrum method, which solves the above-mentioned drawbacks.

(Structure and operation of the invention) The synchronous circuit according to the present invention determines the threshold voltage based on the signal level of a frequency that is always detuned by an appropriate frequency from the received signal, and uses a logarithmic detector instead of an envelope detector. It is characterized by this.

The present invention will be explained in detail below with reference to the drawings.

FIG. 2 is a block diagram showing an embodiment of the synchronous circuit of the present invention. In the figure, 10 is a mixer (MIX), 11 and 12 are bandpass filters (BPF), 13 and 14 are logarithmic detectors (LOG), and 15
is a demodulation circuit (DEM), 16 is a subtracter (SUB), 1
7 is a timing control circuit (CONT), 18 is a pseudo random pattern generator (PN GE), 19 is a hopping oscillator (HOP LO), 20 is an offset voltage input, and 21 is an adder (ADD).

Here, the center frequency of BPF1, 11 is the frequency difference between the received signal and the hopping oscillator 19 when the received signal is synchronized, and the center frequency of BPF2, 12 is within the hopping frequency band.
This is a frequency in an attenuation range separated by an appropriate frequency from the center frequency of No. 11. Also, anti-optical detectors 13, 14
is the detected output when the input is acosωt.
Kloga (K is a constant determined by the amplifier characteristics) is obtained, and it is commercially available as an IC that combines a special AGC amplifier and an envelope detector. The offset voltage 20 is set to a voltage range that is higher than the average output voltage of the logarithmic detector when there is noise, but lower than the correlation voltage when synchronization is properly achieved.

As a supplementary explanation regarding the offset voltage 20,
FIG. 3 shows signal waveforms at various parts of the circuit shown in FIG. 2.
Each of the waveforms a to f shows a change in voltage from a state in which synchronization is not captured to a state in which synchronization is not captured.

a and b are the output waveforms of the logarithmic detectors 13 and 14, respectively, and c is the offset voltage 2 applied to the adder 21.
0 waveform, d is the output waveform of the adder 21, e is the output waveform of the subtracter 16, and f is the output waveform of the subtracter 16 when the offset voltage 20 is not applied.

As can be seen from the figure, the output voltages a and b of the logarithmic detectors 13 and 14 include small fluctuations at the time of synchronization end acquisition. This fluctuation becomes especially large when there is interference. If this voltage is directly compared and used for synchronization determination, as shown in the waveform f, the output voltage of the subtracter 16 may become positive even though synchronization has not actually been acquired. It is mistakenly determined to be synchronized acquisition. In order to prevent this, in the present invention, an offset voltage 20 is applied only to the output of the logarithmic detector 14 to prevent false synchronization. This offset voltage 20 is determined to be an appropriate voltage within the range of h, taking into consideration the degree of interference.

The present invention differs from conventional methods in that, when performing synchronization control using sliding correlation, the method of determining a threshold voltage, which is a reference for synchronization determination, and the use of a logarithmic detector for level detection are important features that differ from conventional methods.

When synchronization cannot be captured (when capturing the end of synchronization)
Since the frequency difference between the receiving input and the hopping oscillator 19 varies randomly and is not constant, the BPF
The signals passing through BPFs 1 and 11 and BPFs 2 and 12 are both random, and the voltage difference between the detection outputs a and b of logarithmic detectors 13 and 14 is almost zero. next,
Since the offset voltage 20c is added only to the output voltage b of the logarithmic detector 14 by the adder 21,
The output voltage e of the subtracter 16 is always negative. At this time, even if there is interference in the received signal, the interference component is BPF1,
Since the signal passes through both filters of the BPF 2, the output voltages of both the logarithmic detectors 13 and 14 change due to interference, so the output voltage e of the subtracter 16 is always negative.

At the time of synchronization acquisition, that is, when the timing difference of the frequency switching of the hopping oscillator 19 is controlled by shifting the timing of the hopping oscillator 19 by sliding correlation, and the timing difference disappears, only the signal components of BPF 1 and 11 pass,
Signal components passing through BPF2 and BPF12 disappear.
Therefore, the detected voltage a of the logarithmic detector 13 becomes a large correlated voltage, but the detected voltage b of the logarithmic detector 14 becomes almost zero. Adder 2 is added to this detected voltage b.
1, an offset voltage 20c is added, but
Since this offset voltage c is set to a voltage lower than the correlation voltage, the output e of the subtracter 16 is positive.

Therefore, by controlling the pseudo-random pattern generator 18 to shift the frequency switching timing of the hopping oscillator 19 by the timing control circuit 17 until the output voltage e from the subtracter 16 becomes positive, the level and spectrum of interference can be adjusted. Synchronous acquisition is possible regardless of the shape.

Furthermore, since a logarithmic detector is used to detect the signal level, a correlated voltage can be output correctly even in response to large changes in the received input level. That is, the effects of using a logarithmic detector are as follows.

The outputs of BPF1, 11, BPF2, and 12 change according to the received input level. In the case of fixed communication where neither the transmitting side nor the receiving side moves, the fluctuation range of the received input level is small, but when either the transmitting side, the receiving side or both move, the input signal level changes over a wide range of BPF1 and BPF2. It is necessary to compare the output signal levels of the two. Conventionally, an AGC amplifier is used to suppress the width of the level change in response to this large level change, but with this method, when strong interference exists within the band, the AGC amplifier keeps the level constant against this interference. Since it operates in such a way as to keep it at a certain level, synchronized acquisition becomes impossible. Since the present invention uses a logarithmic detector, this drawback does not occur.

(Effects of the Invention) As explained in detail above, the present invention enables stable and reliable synchronization even in the face of large changes in the received signal level and without being affected by the level of interference or the shape of the spectrum. This is particularly effective when either or both of the transmitting and receiving sides are mobile stations.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a conventional frequency hopping synchronous circuit, FIG. 2 is a block diagram of a frequency hopping synchronous circuit according to an embodiment of the present invention, and FIG.
FIG. 3 is a signal waveform diagram of each part in the figure. 1, 10... mixer, 2, 11, 12...
BPF, 3, 15... Demodulation circuit (DEM), 4...
Envelope detector (DET), 5, 16...Subtractor (SUB), 6...Threshold voltage, 7, 17
...Timing control circuit (CONT), 8, 18...
...pseudo-random pattern generator (PNGE), 9,
19...Hopping oscillator (HOP LO), 13,
14... Logarithmic detector (LOG), 20... Offset voltage, 21... Adder (ADD).

Claims (1)

[Scope of Claims] 1. A synchronous circuit having a frequency hopping oscillator, comprising: a first bandpass filter that extracts a desired signal from the result of multiplying a received signal and the output of the frequency hopping oscillator; a second bandpass filter having a center frequency set in an attenuation range; a first logarithmic detector and a second logarithmic detector that receive the outputs of the first bandpass filter and the second bandpass filter, respectively; and the output of the second logarithmic detector and an off-set voltage set to a value greater than the average noise voltage of the first logarithmic detector when synchronization is not acquired and smaller than the signal correlation voltage when synchronization is acquired. and a subtracter that outputs an output when the output of the first logarithmic detector is larger than the output of the adder, the timing of the frequency hopping oscillator is controlled by the output of the subtracter. A synchronization circuit in a frequency hopping modulation receiving device characterized by performing synchronization by.