JPH0557614B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microprogram control device in an information processing device, and particularly to a microprogram control device that can use the same microinstruction sequence for different macroinstructions.

[Conventional technology]

Generally, in an information processing device that employs a microprogram control system, when one macroinstruction is given, a series of microinstructions made up of a plurality of microinstructions is read out from a control storage device and executed.

For example, a macroinstruction that adds operand 0 and operand 1 and stores the addition result in an output register of an arithmetic unit conventionally includes, for example, the following microinstruction sequence.

PA=OPR0 PB=OPR1 ADD (RA, RB) OPR0=ALU However, RA and PB are registers, and ALU is the output register of the arithmetic unit.

Further, a microinstruction for subtracting operand 1 from operand 0 and storing the subtraction result in an output register of an arithmetic unit conventionally includes, for example, the following microinstruction sequence.

RA=OPR0 RB=OPR1 SUB (RA, RB) OPR0=ALU As described above, in the conventional microprogram control device, it is necessary to prepare a dedicated microinstruction sequence for each different type of operation.

Furthermore, the process of reflecting the result of an operation on the operation flag has conventionally been carried out by setting or resetting the operation flag by executing a microinstruction for updating the flag included in the microinstruction sequence corresponding to each macroinstruction. As in the case where the type of operation is different, it is necessary to prepare a dedicated microinstruction sequence in the control storage device.

[Problem that the invention seeks to solve]

Therefore, the micro-instruction string
A control storage device such as a ROM has the disadvantage that it becomes necessary to separately and independently store a microinstruction sequence corresponding to each macroinstruction, which increases the capacity of the control storage device.

If it were possible to use the same microinstruction sequence even when the types of operations differ, it would be possible to reduce the capacity of the control storage device, which would be very effective in terms of economy and space. It is also possible to implement a common microprocedure routine for each macroinstruction.

However, if the calculation type is different, the flag updating operation after the calculation is also different. Therefore, even if only the microinstruction sequences for executing operations are made common, it is necessary to prepare a microinstruction sequence for flag updating for each type of operation. In other words, it is not possible to completely standardize the microinstruction sequence.

Therefore, an object of the present invention is to update a flag without using a set or reset using a microinstruction in a microprogram control device in which the same microinstruction sequence can be used even if the microinstructions have different operation types. The purpose is to standardize flag update routines.

[Means for solving problems]

It has a calculation holding means for holding calculation type information,
In the microprogram control device in the information processing means that causes the arithmetic control means to perform arithmetic control according to the arithmetic type information held in the arithmetic holding means, the macro instruction is decoded to have the same format as the arithmetic type information included in the micro instruction. decoding means for generating operation type information, indirect operation holding means for holding the operation type information obtained by the decoding means, control according to the operation type information held in the indirect operation holding means, and a macro instruction. and selecting means for selecting one of the operation type information included in the microinstruction read from the storage device according to the content of the microinstruction and outputting the selected one to the operation holding means; , the arithmetic control means is configured to generate a flag control signal determined by the arithmetic type information in the arithmetic holding means, and the arithmetic control means generates a flag control signal determined by the arithmetic type information in the arithmetic holding means; Flag selection information for updating the calculation flag by selecting one of the plurality of inputs based on the content of the flag control signal is provided for each calculation flag.

[Effect]

When the same microinstruction sequence is used for a plurality of macroinstructions, for example, an addition macroinstruction and a subtraction macroinstruction, the following microinstruction sequence is stored in the control storage device.

PA=OPR0 PB=OPR1 ALU (RA, RB) OPR0=ALU However, ALU (RA, RB) is a microinstruction that specifies indirect operation.

For example, when an addition micro-instruction is decoded, the operation type information indicating that it is an addition is held in the indirect operation holding means, the micro-instruction sequence is read from the control storage device, and the selection means selects an indirect operation based on the indirect operation specification. The calculation type information held in the holding means is output to the calculation holding means. Therefore, the calculation control means performs calculation control of addition. For example, when a subtraction macro instruction is decoded, the indirect operation means holds operation type information indicating that it is subtraction, and the same micro instruction sequence as the above micro instruction sequence is read from the control storage device, and the indirect operation means stores the operation type information indicating that it is subtraction. In response to the operation designation, the selection means outputs the subtraction type information held in the indirect operation holding means to the operation holding means. Therefore, in this case, the arithmetic control of the subtraction is executed by the arithmetic control means.

Note that if there is no indirect operation specification in the microinstruction sequence and the same operation specification information as conventional ADD (RA, RB) is included, the selection means selects such information read from the control storage device. Calculation designation information is held in calculation holding means.

Further, the arithmetic control means generates a flag control signal based on the operation type information in the arithmetic holding means, and each flag selection means selects all the statuses and changes that cause the arithmetic flag according to the contents of the flag control signal. One input is selected from among the contents of the computation flags to be executed, and the corresponding computation flag is updated.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a schematic explanatory diagram of an embodiment of the present invention,
An embodiment will be described in which both the arithmetic routine part and the arithmetic flag update routine part of the microinstruction sequence can be made common. The apparatus of this embodiment is comprised of indirect calculation holding means 1, selection means 2, calculation holding means 3, calculation control means 4, and N flag selection means 5 and 6.

In FIG. 1, indirect calculation means 1 holds calculation type information given by a decoding section (not shown) that decodes macro instructions, and calculation holding means 3 is used to control calculations by calculation control means 4 to a calculation unit (not shown). It holds calculation information necessary for generating the signal 14 and flag control signal 15. The selection means 2 decodes the microinstruction read from the control storage device (not shown) that stores the microinstruction sequence, thereby decoding the operation type information held in the indirect operation holding means 1 and the operation type information in the microinstruction. The calculation type information to be input to the calculation holding means 3 is selected from among the selection signals 12 and 13. Further, each of the flag selection means 5 and 6 receives a plurality of input signals 16 to 16 inputted thereto according to the contents of the flag control signal 15.
The flag input signals 22 and 23 are generated by selecting a signal necessary for flag update from among the signals 21 and 21.

FIG. 2 is a block diagram of an embodiment of a part of the configuration shown in FIG. 1, in which the arithmetic routine part of the microinstruction sequence is shared;
31 is an arithmetic decoder that constitutes the selection means 2 of FIG. 1; 32 is an arithmetic register that constitutes the arithmetic holding means 3 of FIG. 1; 33 is a strobe signal A 34 is a signal line that transmits the strobe signal B; 35 is a microinstruction bus (for example, a 5-bit bus) that transmits operation type information in the microinstruction;
36 is a decoding unit that decodes macro instructions;
7 is a control storage device, 38 is a microprogram
39 is a counter updater, 40 is a decoder, 41 is a delay, 42 is a flag strobe,
43 is an arithmetic microcommand.

A predetermined microinstruction sequence is stored in the control storage device 37. For example, in this embodiment, the following microinstruction sequence is stored below address p.

PA=OPR0 PB=OPR1 ALU (RA, RB) OPR0=ALUF Here, ALU (RA, RB) is a microinstruction with indirect operation specification, OPR0=ALUF is the operand OPR0
The result of performing the operation specified by the indirect operation specification on and operand ORP1 is stored in the output register of the arithmetic unit.
This is a microinstruction that instructs to store in the ALU and update the operation flag.

The above-mentioned indirect operation designation can be implemented by assigning the indirect operation designation to a vacant code of a conventional operation microinstruction. For example, when five bits out of a plurality of bits constituting an arithmetic microinstruction are taken out to the microinstruction bus 35, the contents may be as shown in FIG. 3, for example. In Figure 3, a is the operation micro specification, mmmmm is the bit of the micro instruction bus 35, and is "10XXXX".
Arithmetic, logical, and decimal operations are specified in ``110XXX'', and shift operations are specified in ``110XXX''.
Indirect operation is specified with "111XXX",
“0XXXXX” indicates non-operation. Furthermore, the selection means (arithmetic decoder) output signal shown at the right end of Fig. 3 indicates which strobe signal A or B is output corresponding to each code, and when indirect calculation is specified. This indicates that strobe signal A is output.

Now, in FIG. 2, the operation of FIG. 2 when it is assumed that there are an addition instruction and a subtraction instruction as macro instructions that use the microinstruction sequence containing the above-mentioned indirect operation specification stored in the control storage device 37 is as follows. explain.

For example, when a macro instruction of an addition instruction is fetched and decoded by the decoding section 36, operation type information indicating that it is an addition is output from the decoding section 36 to the delay 41, and is latched to the indirect operation register 30 by an instruction start signal. be done. The decoder 36 also sets address p of the control storage device 37 for the microprogram counter 38. As a result, the microinstruction sequence including the indirect operation designation is read from the control storage device 37.

The execution of this read microinstruction sequence progresses,
When the timing for executing the arithmetic micro-instruction ALU (RA, RB) comes, since in this example the arithmetic micro-instruction includes an indirect operation specification, the arithmetic micro-instruction ALU (RA, RB) is executed to decode the arithmetic type information read from the control storage device 37. A strobe signal A is generated from the decoder 31, and the operation type information latched in the indirect operation register 30, that is, the operation type information indicating addition, is transferred to the operation register 32. Therefore, the arithmetic control means 4 of FIG. 1, which operates according to the information stored in the arithmetic register 32, executes the arithmetic control of addition.

Next, when the subtraction macro instruction is fetched and decoded by the decoding section 36, the decoding section 36
The operation type information indicating that it is a subtraction from is delayed 41.
and is latched into the indirect operation register 30 by the instruction start signal. In addition, the decoding section 36
sets address p of control storage 37 for microprogram counter 38. That is, the start address of the same microinstruction sequence as in the case of addition is specified. As a result, the same microinstruction as the microinstruction sequence including the indirect operation designation is read from the control storage device 37. Then, as the execution of the microinstruction sequence progresses, when the time comes to execute the arithmetic microinstruction, this example also applies to the arithmetic microinstruction that includes an indirect operation specification, so
A strobe signal A is generated from the arithmetic decoder 31 that decodes the arithmetic type information read from the control storage device 37, and the arithmetic type information latched in the indirect arithmetic register 30, that is, the arithmetic type information indicating that it is subtraction, is transferred to the arithmetic register 32. The arithmetic control means 4 shown in FIG. 1 executes subtraction arithmetic control.
That is, it is possible to execute different macro instructions using the same micro instruction sequence.

By the way, when executing a microinstruction sequence that combines several types of operations, the indirect operation register 30 can only hold information on one type of operation at a time, so the operation specification information included in the microinstruction It is necessary to specify the calculation. According to the configuration shown in FIG. 2, if there is no indirect calculation specification in the calculation microinstruction read from the control storage device 37, the calculation decoder 31 outputs the strobe signal B instead of the strobe signal A, so that the microinstruction bus 35 calculation type information is stored in the calculation register 32.
It is also possible to control the operation type specified in the microinstruction sequence.

FIG. 4 is a block diagram of an embodiment of the configuration shown in FIG. 1 in which the operation flag updating process of the microinstructions is performed by the same microinstruction, for example, the above-mentioned ALUF, and the operation flags to be updated are Three types of flags are measured: C flag, O flag, and Z flag. Note that the C flag selector 50, the O flag selector 51, and the Z flag selector 52 correspond to one of the flag selection means 5 and 6 shown in FIG.
6 is a delay, 57 to 59 are gate circuits, 15 is a flag control signal output from the arithmetic control means 4 in FIG. 1, 42 is a flag strobe taken out from the decoder 40 in FIG. 2, C+, SFT-C+,
DCY+ is the status required to update the C flag,
C-flag is the content of the C flag itself, C-flag-IN is the update information of the C flag, O+, SFT OV+ is the status necessary for updating the O flag, O-flag is the content of the O flag itself, O-flag- IN is the update information of the O flag, Z+, NE+ is the status necessary for updating the Z flag, Z-flag is the content of the Z flag itself, Z
-flag-IN is Z flag update information.

In FIG. 4, each flag C, O, and Z are located in a flag register 53, and flag selectors 50 to 52 are provided on the input side via gate circuits 57 to 59, and each flag selector 50 to 52 has an update function. The flag control signal 15 is inputted with the status necessary for the flag itself, the contents of the target flag itself, and the flag control signal 15. 30) and the retained information. FIG. 5 shows an example of the correspondence between the type of operation corresponding to the 5-bit operation type information held in the operation register 30 and the content of the flag control signal generated by the operation control means 4.

In FIG. 4, the flag control signal 15 generated by the arithmetic control means 4 is transmitted to each flag selector 50 to
52, and serves to define the combination of statuses that cause the flags to change at the time of update in each calculation. What kind of flag update information C-flag-IN, O-flag-IN, Z- is sent from each flag selector 50 to 52 in accordance with the content of the flag control signal 15?
FIG. 6 shows how flag-IN is generated. In addition,
The operation type is also written at the receiving end in FIG.

When the calculation is executed and the flag control signal 15 is output from the calculation control means 4, each flag selector 5
0 to 52, the status according to the content of the flag control signal 15 or the content of the flag itself is selected, and when the flag strobe 42 is generated by a microinstruction, the gate circuits 57 to 59 are opened and the flag selectors 50 to 52 are selected. Each flag is updated by the output.

When standardizing the flag update routine, it should be noted that since the flag strobe 42 always occurs, each flag is updated each time an operation is executed. However, in the case of logical operations, C
There are also flags that should not be updated, such as -flag and O-flag that should not change. This is why, in this embodiment, the content of the flag itself is included in one of the selection signals of each flag selector as shown in FIG. By updating it, it becomes essentially the same as not updating it. In this way, the flag update routine can be made common by updating the flags without using conventional micro-instructions for setting or resetting.

〔Effect of the invention〕

As explained above, according to the present invention, the arithmetic control means generates a flag control signal based on the arithmetic type information in the arithmetic holding means, and the arithmetic flag is updated in accordance with the flag control signal. By providing the selection means, there is an effect that flags can be updated by the same microinstruction for different macroinstructions. Therefore, when the present invention is applied to microprogram control, there is an advantage that the capacity of the control storage device can be reduced. Note that the present invention can be widely applied to cases where a microinstruction sequence of each macroinstruction is shared.

[Brief explanation of the drawing]

FIG. 1 is a schematic explanatory diagram of an embodiment of the present invention, and FIG. 2 is a main block diagram of an embodiment of a portion of the configuration shown in FIG. 1 in which the arithmetic routine part of the microinstruction sequence is shared. 3 is an explanatory diagram of the indirect operation specification operation, and FIG. 4 is a summary of an embodiment of the portion of the configuration shown in FIG. 1 in which the operation flag update routine portion of the microinstruction sequence is shared. FIG. 5 is an explanatory diagram of the flag control signal generation process of the arithmetic control means 4, and FIG. 6 is an explanatory diagram of the operation of the flag selectors 50 to 52. In the figure, 1 is indirect calculation holding means, 2 is selection means, 3 is calculation holding means, 4 is calculation control means,
5 and 6 are flag selection means, 12 and 13 are selection signals, 14 is an operation control signal, 15 is a flag control signal, 16 to 21 are input signals, 22 and 23 are flag input signals, 30 is an indirect operation register, and 31 is an 32 is an arithmetic register; 33 is a signal line for transmitting strobe signal A; 34 is a signal line for transmitting strobe signal B; 50 to 52 are flag selectors; 53 is a flag register.

Claims (1)

[Scope of Claims] 1. Microprogram control in an information processing means that has a calculation holding means for holding calculation type information and causes the calculation control means to perform calculation control according to the calculation type information held in the calculation holding means. In the apparatus, decoding means decodes the macro instruction to generate operation type information in the same format as operation type information included in the micro instruction, indirect operation holding means holding the operation type information obtained by the decoding means, Either the operation type information held in the indirect operation holding means or the operation type information included in the microinstruction read from the control storage device in response to the macroinstruction is stored in the microinstruction. a selection means for selecting and outputting the selection to the former calculation holding means according to the content; and the calculation control means is configured to generate a flag control signal determined by calculation type information in the calculation holding means; , a flag that takes as input all the statuses that are factors of the calculation flag and the contents of the calculation flag to be changed, and updates the calculation flag by selecting one of the plurality of inputs based on the contents of the flag control signal. A microprogram control device characterized in that a selection means is provided for each calculation flag.