JPH0547886A - Determination of optimum threshold value for detecting foreign matter - Google Patents
Determination of optimum threshold value for detecting foreign matterInfo
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- JPH0547886A JPH0547886A JP22883391A JP22883391A JPH0547886A JP H0547886 A JPH0547886 A JP H0547886A JP 22883391 A JP22883391 A JP 22883391A JP 22883391 A JP22883391 A JP 22883391A JP H0547886 A JPH0547886 A JP H0547886A
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- threshold value
- foreign matter
- level
- optimum threshold
- chips
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明は、異物検査装置におい
て異物を検出するための最適閾値の決定方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of determining an optimum threshold value for detecting foreign matter in a foreign matter inspection apparatus.
【０００２】[0002]
【従来の技術】半導体ＩＣの製造においてはシリコンな
どの素材のウエハに対して、同一のパターンを有する多
数のＩＣチップ（以下単にチップという）が形成され、
この段階で異物検査が行われる。異物検査はレーザビー
ムをウエハ面に投射し、その反射または散乱光を受光し
てなされるが、異物とともにパターンからも散乱光が散
乱されるので、これらを区別して異物のみを検出するこ
とが必要、かつ重要である。これに適応する方法には各
種のものが開発されているが、その一つとして互いに隣
接した２個のチップ（隣接チップ）を相互に比較する方
法がある。2. Description of the Related Art In the manufacture of semiconductor ICs, a large number of IC chips (hereinafter simply referred to as chips) having the same pattern are formed on a wafer made of a material such as silicon.
A foreign matter inspection is performed at this stage. Foreign matter inspection is performed by projecting a laser beam onto the wafer surface and receiving the reflected or scattered light, but since scattered light is scattered from the pattern along with the foreign matter, it is necessary to distinguish them and detect only the foreign matter. , And is important. Various methods have been developed to adapt to this, and one of them is a method of comparing two mutually adjacent chips (adjacent chips) with each other.
【０００３】図２(a) 〜(c) は上記の異物検査装置の概
略構成と隣接チップの比較による異物検出方法を示す。
(a) に示すように、ウエハ１の表面には、オリエンティ
ション・フラット（ＯＦ）を基準線（Ｘ軸とする）とし
て、同一パターンを有する多数のチップ11がマトリック
ス状に形成されている。(b) において、ウエハは移動ス
テージ２に載置され、これに対して検査光学系３の光源
３a よりレーザビームＬx をウエハの表面に照射する。
ウエハはＸ方向に往復移動されてレーザビームが各チッ
プ列を順次に走査し、その散乱光が対物レンズ３b を経
てＣＣＤセンサ３c （他の光センサでも可）に入力す
る。(c)(イ)において、チップ列中の任意の隣接チップを
11a,11b とし、チップ11b には図示の位置に異物ｐ1,ｐ
2 が付着しているとする。まずチップ11a の散乱光を受
光し、ＣＣＤセンサの各画素の出力信号（以下単に画素
信号という）は逐次に画素信号処理部４に入力し、Ａ／
Ｄ変換器４a によりデジタル化され、メモリ（ＭＥＭ）
４b に記憶される。ついでチップ11b の散乱光より同様
にえられる各画素信号が差分回路４c に入力し、ＭＥＭ
に記憶されているチップ11a の各画素信号との差分デー
タが出力される。(c)の(ロ) は両チップのパターンＰT
および異物ｐ1,ｐ2 に対する各画素信号ｇn（ｎは画素
番号）よりなる画素データＳa,Ｓb を示し、パターンの
無い基板面Ｋは値が低く、パターンＰT は反射率が大き
いので値が大きい。また、異物ｐ1,ｐ2の画素信号ｇは
データＳb の上方に突出している。前記したように両パ
ターンＰT は同一であるので、両画素データのパターン
部分はほぼ同一となり、これらの差分をとると(ハ) に示
す差分データ（Ｓb −Ｓa ）がえられる。差分データは
異物検出部４d において適当な閾値Ｖthと比較されて異
物ｐ1,ｐ2 が検出され、異物データはコンピュータ（Ｃ
ＰＵ）４e により編集されて表示器４f にマップ表示さ
れる。2 (a) to 2 (c) show a schematic structure of the above-mentioned foreign substance inspection apparatus and a foreign substance detecting method by comparing adjacent chips.
As shown in (a), a large number of chips 11 having the same pattern are formed in a matrix on the surface of the wafer 1 with the orientation flat (OF) as a reference line (X axis). In (b), the wafer is placed on the moving stage 2, and the surface of the wafer is irradiated with the laser beam L x from the light source 3 a of the inspection optical system 3.
The wafer is reciprocally moved in the X direction so that the laser beam sequentially scans each chip row, and the scattered light is input to the CCD sensor 3c (or another optical sensor) via the objective lens 3b. In (c) (a), replace any adjacent chip in the chip row.
11a and 11b, and the chips 11b have foreign matter p 1 and p
Assume that 2 is attached. First, the scattered light from the chip 11a is received, and the output signals (hereinafter simply referred to as pixel signals) of each pixel of the CCD sensor are sequentially input to the pixel signal processing unit 4, and A /
Memory (MEM) digitized by D converter 4a
It is stored in 4b. Then, each pixel signal similarly obtained from the scattered light of the chip 11b is input to the difference circuit 4c, and MEM
The difference data from each pixel signal of the chip 11a stored in the memory is output. (c) (b) is the pattern P T of both chips
And pixel data S a and S b consisting of respective pixel signals g n (n is a pixel number) for the foreign matters p 1 and p 2 , where the substrate surface K without a pattern has a low value and the pattern P T has a high reflectance. So the value is large. Further, the pixel signals g of the foreign substances p 1 and p 2 are projected above the data S b . Since both patterns P T are the same as described above, the pattern portions of both pixel data are almost the same, and the difference data (S b −S a ) shown in (c) can be obtained by taking the difference between them. The difference data is compared with an appropriate threshold value V th in the foreign matter detector 4d to detect foreign matters p 1 and p 2 , and the foreign matter data is stored in the computer (C
It is edited by the PU) 4e and displayed on the map on the display 4f.
【０００４】[0004]
【発明が解決しようとする課題】上記においては両画素
データＳa,Ｓb のパターン部分は同一と仮定したが、両
チップのパターンが同一であっても、例えば照射位置に
よるレーザビームの強度変化などにより対応した両画素
信号ｇはかならずしも同一とならない。このために、差
分データ（Ｓb −Ｓa)には、(ハ) に例示した残留パター
ンＲが残留する。このような差分データより、残留パタ
ーンＲを検出することなく異物ｐ1,ｐ2 のみを検出する
ためには、残留パターンに応じた最適の閾値を設定する
ことが必要である。一方、ＩＣの製造プロセスの段階が
進行するにつれて、パターンは反射率が変化するので、
残留パターンもまたプロセスごとに変化する。従って、
最適閾値は少なくともプロセスの段階ごとに決定するこ
とが必要である。これに対して、従来においてはプロセ
スごとに任意の隣接チップをとってテストチップとし、
手作業により閾値を増減しながら異物検出を繰り返して
最適値を求める方法が行われている。しかしこの方法で
は作業者の熟練度などにより左右されて最適閾値がかな
らずしもえられず、また決定するまでの作業時間が長く
かかる欠点がある。この発明は以上に鑑みてなされたも
ので、統計的な手法を用い、コンピュータの処理により
最適閾値を迅速に決定する方法を提供することを目的と
する。In the above description, the pattern portions of both pixel data S a and S b are assumed to be the same, but even if the patterns of both chips are the same, for example, the intensity change of the laser beam depending on the irradiation position. Both pixel signals g corresponding to each other are not always the same. Therefore, the residual pattern R illustrated in (c) remains in the difference data (S b −S a ). In order to detect only the foreign matters p 1 and p 2 without detecting the residual pattern R from such difference data, it is necessary to set an optimum threshold value according to the residual pattern. On the other hand, as the IC manufacturing process progresses, the reflectivity of the pattern changes,
The residual pattern also changes from process to process. Therefore,
The optimum threshold needs to be determined at least at each stage of the process. On the other hand, conventionally, an arbitrary adjacent chip is taken as a test chip for each process,
There is a method in which foreign matter detection is repeated while manually increasing or decreasing the threshold value to obtain an optimum value. However, this method has a drawback that the optimum threshold value cannot be avoided because it depends on the degree of skill of the operator, and that the work time until the determination is long. The present invention has been made in view of the above, and an object of the present invention is to provide a method of rapidly determining an optimum threshold value by a computer process using a statistical method.
【０００５】[0005]
【課題を解決するための手段】この発明は上記の目的を
達成する最適閾値の決定方法であって、上記のウエハ異
物検査装置において、チップパターンを形成するプロセ
スの段階ごとに、任意の隣接チップをテストチップとし
てテストを行う。コンピュータの処理により、テストチ
ップの各画素信号のレベルに対する画素数の頻度分布を
作成し、この頻度分布に近似する近似曲線を求める。近
似曲線が０となるレベルを算出し、これを最適閾値とす
るものである。SUMMARY OF THE INVENTION The present invention is a method of determining an optimum threshold value for achieving the above object, wherein in the above-described wafer foreign matter inspection apparatus, an arbitrary adjacent chip is set for each stage of a process for forming a chip pattern. Test as a test chip. By the processing of the computer, a frequency distribution of the number of pixels with respect to the level of each pixel signal of the test chip is created, and an approximate curve approximate to this frequency distribution is obtained. The level at which the approximated curve becomes 0 is calculated and used as the optimum threshold.
【０００６】[0006]
【作用】上記の最適閾値の決定方法においては、コンピ
ュータの処理により、画素信号のレベル対画素数の頻度
分布とその近似曲線、および近似曲線が０となる画素信
号のレベルの作成または算出が迅速になされて最適閾値
が短時間でえられる。ここで、頻度分布と近似曲線につ
いて述べると、各画素信号のレベルはランダムであり、
またその画素の総数は非常に多いので、これらをレベル
順に並べた各レベルに対する画素数の頻度分布は誤差分
布、またはそれに近いものを示す。ただし、異物は個数
が極めて小数であり、またパターン部分より突出してい
るため、パターン部分の頻度分布よりレベルの高い方に
分散する。頻度分布の近似曲線が０となる画素信号のレ
ベルを算出し、これを閾値とするとパターン部分の画素
数は０となが、一方、異物の画素は近似曲線よりレベル
の高い方に分散するから、パターン部分は検出されずに
異物のみが検出される。以上により、近似曲線が０とな
る画素信号のレベルを最適閾値と決定され、これを検査
装置に設定して当該プロセス段階の各チップに対する異
物検査がなされる。In the above-described optimum threshold value determining method, the computer processing is performed to quickly create or calculate the level distribution of the pixel signal versus the frequency distribution of the number of pixels and its approximate curve, and the level of the pixel signal at which the approximate curve is zero. The optimum threshold value can be obtained in a short time. Here, describing the frequency distribution and the approximation curve, the level of each pixel signal is random,
Since the total number of pixels is very large, the frequency distribution of the number of pixels for each level in which these are arranged in order of level shows an error distribution or a distribution close to it. However, since the number of foreign matters is extremely small and protrudes from the pattern portion, it is dispersed to a higher level than the frequency distribution of the pattern portion. When the level of the pixel signal at which the approximate curve of the frequency distribution becomes 0 is calculated and this is used as a threshold value, the number of pixels in the pattern portion becomes 0, while the pixels of foreign matter are dispersed to a higher level than the approximate curve. The pattern portion is not detected, and only the foreign matter is detected. As described above, the level of the pixel signal at which the approximate curve becomes 0 is determined as the optimum threshold value, which is set in the inspection device, and the foreign matter inspection is performed on each chip in the process stage.
【０００７】[0007]
【実施例】図１はこの発明の一実施例を示し、(a) は頻
度分布作成回路の構成図、(b) は頻度分布とその近似曲
線を示す図である。図１(a) において、頻度分布作成回
路５は前記した図２(b) の異物検査装置の差分回路４c
とＣＰＵ４e の間に接続される。ＩＣチップの各プロセ
スにおけるテストチップを任意に選定し、異物検査装置
によりテストする。テストチップのテストにより差分回
路４c より差分データ（Ｓb−Ｓa)が出力される。差分
データの各画素信号にはレベル（ＬV)に対応したアドレ
ス番号を付与し、このアドレス番号をメモリ（ＭＥＭ）
５a のアドレス端子ＡＤに入力してアドレスを指定す
る。指定された都度、アドレスに記憶された画素数デー
タがデータＤＡの出力（ＯＵＴ）端子より読出され、加
算器５b により“１" が加算されて入力（ＩＮ）端子よ
りＭＥＭに入力し、当該アドレスの画素数データを更新
する。逐次の画素信号によるアドレス指定により、テス
トチップの全面に対するレベル別の画素数データが累積
され、これをＣＰＵにより読出して(b) に例示するレベ
ルＬV 対画素数Ｎg の頻度分布が作成される。この頻度
分布において、残留パターンに対する頻度分布［Ｒ］の
画素数Ｎg は、レベルＬV が０のとき最大値をとり、レ
ベルＬV の増加とともに階段状に下降する。これに対し
て異物［ｐ1 〜ｐn]は、［Ｒ］から離れてレベルＬV の
高い方に分散している。ＣＰＵの処理により、頻度分布
［Ｒ］に近似する近似曲線ｆ（ＬV)を求める。図におい
てはｆ（ＬV)を便宜上ほぼ直線としたが、一般には２次
曲線ないしは誤差曲線となり、いずれにしても容易に求
められる。ここで、ｆ（ＬV)が横軸と交わる交点ｑを求
めると、交点ｑではパターンの画素数Ｎgが０となるの
で、これを閾値とすることにより残留パターンＲは検出
されず、異物ｐ1 〜ｐn のみが検出される。すなわち交
点ｑのレベルが最適閾値Ｖmth と決定される。なお、小
さい異物は［Ｒ］のなかに混在して検出されず、これが
異物の大きさに対する検出限界となる。以上の最適閾値
Ｖmth は当該プロセス段階の各ＩＣチップの異物検査に
適用される。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment of the present invention, (a) is a block diagram of a frequency distribution creating circuit, and (b) is a view showing a frequency distribution and its approximated curve. In FIG. 1 (a), the frequency distribution creating circuit 5 is the difference circuit 4c of the foreign matter inspection apparatus of FIG. 2 (b) described above.
Connected to the CPU 4e. A test chip in each process of the IC chip is arbitrarily selected and tested by a foreign matter inspection device. The difference data from the difference circuit 4c by the test of the test chip (S b -S a) is output. Level to each pixel signal of the differential data (L V) to impart address number corresponding, the address number memory (MEM)
The address is designated by inputting to the address terminal AD of 5a. Each time it is designated, the pixel number data stored in the address is read from the output (OUT) terminal of the data DA, "1" is added by the adder 5b, and the result is input to the MEM from the input (IN) terminal. The pixel number data of is updated. By sequentially addressing by the pixel signal, the pixel number data for each level for the entire surface of the test chip is accumulated, and this is read by the CPU to create the frequency distribution of the level L V vs. the pixel number N g illustrated in (b). It In this frequency distribution, the number of pixels N g of the frequency distribution [R] with respect to the residual pattern has the maximum value when the level L V is 0, and decreases stepwise as the level L V increases. On the other hand, the foreign substances [p 1 to pn ] are dispersed away from [R] in the higher level L V. By the processing of the CPU, an approximate curve f (L V ) that approximates the frequency distribution [R] is obtained. In the figure, f (L V ) is set to be a substantially straight line for the sake of convenience, but it is generally a quadratic curve or an error curve and can be easily obtained in any case. Here, when the intersection q at which f (L V ) intersects the horizontal axis is obtained, the number of pixels N g of the pattern becomes 0 at the intersection q, and therefore the residual pattern R is not detected by setting this as a threshold value, and the foreign matter Only p 1 to pn are detected. That is, the level of the intersection q is determined as the optimum threshold V mth . It should be noted that small foreign matter is not mixedly detected in [R], and this is the detection limit for the size of the foreign matter. The above optimum threshold value V mth is applied to the foreign matter inspection of each IC chip in the process stage.
【０００８】[0008]
【発明の効果】以上の説明のとおり、この発明による最
適閾値の決定方法においては、ＩＣチップの各プロセス
段階におけるテストチップに対して、コンピュータの処
理により、画素信号のレベル対画素数の頻度分布と近似
曲線の作成、および近似曲線がの算出が迅速になされ、
当該プロセス段階の各チップの異物検査に対する最適閾
値が短時間に決定されるもので、隣接チップの比較方法
による異物検査に寄与するところには大きいものがあ
る。As described above, in the method of determining the optimum threshold value according to the present invention, the frequency distribution of the pixel signal level vs. the number of pixels is processed by the computer processing for the test chip at each process stage of the IC chip. And the approximate curve is created and the approximate curve is calculated quickly.
The optimum threshold value for the foreign substance inspection of each chip in the process step is determined in a short time, and there is a great contribution to the foreign substance inspection by the comparison method of adjacent chips.
【図１】 この発明の一実施例を示し、(a) は頻度分布
作成回路の構成図、(b) は頻度分布とその近似曲線を示
す図である。FIG. 1 shows an embodiment of the present invention, (a) is a configuration diagram of a frequency distribution creating circuit, and (b) is a diagram showing a frequency distribution and its approximated curve.
【図２】 (a) はウエハに形成されたＩＣチップ、(b)
は隣接チップの比較方法による異物検査装置の概略構
成、(c) は隣接チップの各画素データと差分データをそ
れぞれ示す図である。2A is an IC chip formed on a wafer, FIG. 2B
FIG. 4 is a diagram showing a schematic configuration of a foreign substance inspection apparatus by a method of comparing adjacent chips, and FIG. 7C is a diagram showing pixel data and difference data of adjacent chips.
１…ウエハ、11,11a,11b…ＩＣチップ、チップ、２…移
動ステージ、３…検査光学系、３a …光源、３b …対物
レンズ、３c …ＣＣＤセンサ、４…画素信号処理部、４
a …Ａ／Ｄ変換器、４b …メモリ（ＭＥＭ）、４c …差
分回路、４d …異物検出部、４e…コンピュータ（ＣＰ
Ｕ）、４f …表示器、５…頻度分布作成回路、５a …メ
モリ（ＭＥＭ）、５b …加算器、ＬX …レーザビームの
走査線、ＯＦ…オリエンティション・フラット、ＰT …
パターン、Ｒ…残留パターン、ｐ1,ｐ2 〜ｐn …異物、
ｇ，ｇn …画素信号、Ｓa,Ｓb …画素データ、（Ｓb −
Ｓa)…差分データ、Ｎg …画素数、ＬV …画素信号のレ
ベル、Ｖth…閾値、Ｖmth …最適閾値。1 ... Wafer, 11, 11a, 11b ... IC chip, chip, 2 ... Moving stage, 3 ... Inspection optical system, 3a ... Light source, 3b ... Objective lens, 3c ... CCD sensor, 4 ... Pixel signal processing unit, 4
a ... A / D converter, 4b ... Memory (MEM), 4c ... Difference circuit, 4d ... Foreign matter detector, 4e ... Computer (CP
U), 4f ... Display device, 5 ... Frequency distribution creating circuit, 5a ... Memory (MEM), 5b ... Adder, L X ... Laser beam scanning line, OF ... Orientation flat, P T ...
Pattern, R ... residual pattern, p 1, p 2 ~p n ... foreign body,
g, g n ... pixel signals, S a, S b ... pixel data, (S b -
S a ) ... Difference data, N g ... Pixel number, L V ... Pixel signal level, V th ... Threshold value, V mth ... Optimal threshold value.
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｇ０３Ｆ 1/08 Ｓ 7369−2Ｈ Ｈ０１Ｌ 21/027 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Internal reference number FI Technical display location G03F 1/08 S 7369-2H H01L 21/027
Claims (1)
を有する複数のＩＣチップを検査対象とし、隣接した２
個の該ＩＣチップに対してレーザビームを走査し、該表
面の散乱光を光センサにより受光し、該光センサの各画
素が出力する対応する画素信号の差分データを、適当な
閾値に比較して異物を検出するウエハ異物検査装置にお
いて、前記パターンを形成するプロセスの段階ごとに任
意の隣接チップをテストチップとしてテストし、コンピ
ュータの処理により、該テストチップの前記差分データ
の各画素信号のレベルに対する前記画素の個数の頻度分
布を作成し、該頻度分布に近似する近似曲線を求め、該
近似曲線が０となる前記レベルを算出し、該レベルを最
適閾値とすることを特徴とする、異物検出用の最適閾値
決定方法。1. A plurality of IC chips having the same pattern formed on the surface of a wafer are inspected and adjacent to each other.
The IC chip is scanned with a laser beam, the scattered light on the surface is received by an optical sensor, and the difference data of the corresponding pixel signals output by each pixel of the optical sensor is compared with an appropriate threshold value. In a wafer foreign matter inspecting apparatus for detecting foreign matter by testing, an arbitrary adjacent chip is tested as a test chip at each stage of the process of forming the pattern, and the level of each pixel signal of the difference data of the test chip is processed by a computer. A frequency distribution of the number of the pixels with respect to, an approximate curve approximating the frequency distribution is obtained, the level at which the approximate curve becomes 0 is calculated, and the level is set as an optimum threshold value. Optimal threshold determination method for detection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22883391A JP2996263B2 (en) | 1991-08-14 | 1991-08-14 | Optimal threshold value determination method for foreign object detection |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22883391A JP2996263B2 (en) | 1991-08-14 | 1991-08-14 | Optimal threshold value determination method for foreign object detection |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0547886A true JPH0547886A (en) | 1993-02-26 |
| JP2996263B2 JP2996263B2 (en) | 1999-12-27 |
Family
ID=16882575
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22883391A Expired - Fee Related JP2996263B2 (en) | 1991-08-14 | 1991-08-14 | Optimal threshold value determination method for foreign object detection |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2996263B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1424551A1 (en) * | 2001-07-27 | 2004-06-02 | Nippon Sheet Glass Co., Ltd. | Method for evaluating contamination of object surface and imaging box used for this method |
| JP2006138708A (en) * | 2004-11-11 | 2006-06-01 | Tokyo Seimitsu Co Ltd | Image flaw inspection method, image flaw inspecting device and visual inspection device |
| JP2006195947A (en) * | 2004-12-13 | 2006-07-27 | Tokyo Seimitsu Co Ltd | Image defect inspection method, image defect inspection device and visual inspection device |
| US7248732B2 (en) | 2002-10-23 | 2007-07-24 | Tokyo Seimitsu Co., Ltd | Pattern inspection method and inspection apparatus |
| US7330581B2 (en) | 2002-10-01 | 2008-02-12 | Tokyo Seimitsu Co., Ltd. | Image defect inspection method, image defect inspection apparatus and appearance inspection apparatus |
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Families Citing this family (2)
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|---|---|---|---|---|
| JP2006200972A (en) | 2005-01-19 | 2006-08-03 | Tokyo Seimitsu Co Ltd | Image defect inspection method, image defect inspection device, and external appearance inspection device |
| JP2007003459A (en) * | 2005-06-27 | 2007-01-11 | Tokyo Seimitsu Co Ltd | Flaw inspection device of image, visual examination device and flaw inspection method of image |
-
1991
- 1991-08-14 JP JP22883391A patent/JP2996263B2/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1424551A1 (en) * | 2001-07-27 | 2004-06-02 | Nippon Sheet Glass Co., Ltd. | Method for evaluating contamination of object surface and imaging box used for this method |
| EP1424551A4 (en) * | 2001-07-27 | 2008-07-09 | Nippon Sheet Glass Co Ltd | Method for evaluating contamination of object surface and imaging box used for this method |
| US7330581B2 (en) | 2002-10-01 | 2008-02-12 | Tokyo Seimitsu Co., Ltd. | Image defect inspection method, image defect inspection apparatus and appearance inspection apparatus |
| US7248732B2 (en) | 2002-10-23 | 2007-07-24 | Tokyo Seimitsu Co., Ltd | Pattern inspection method and inspection apparatus |
| JP2006138708A (en) * | 2004-11-11 | 2006-06-01 | Tokyo Seimitsu Co Ltd | Image flaw inspection method, image flaw inspecting device and visual inspection device |
| JP2006195947A (en) * | 2004-12-13 | 2006-07-27 | Tokyo Seimitsu Co Ltd | Image defect inspection method, image defect inspection device and visual inspection device |
| US20150332451A1 (en) * | 2014-05-15 | 2015-11-19 | Applied Materials Israel Ltd. | System, a method and a computer program product for fitting based defect detection |
| US10290092B2 (en) * | 2014-05-15 | 2019-05-14 | Applied Materials Israel, Ltd | System, a method and a computer program product for fitting based defect detection |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2996263B2 (en) | 1999-12-27 |
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