JPH0541094A - Analog signal sampling device - Google Patents

Analog signal sampling device

Info

Publication number
JPH0541094A
JPH0541094A JP3196363A JP19636391A JPH0541094A JP H0541094 A JPH0541094 A JP H0541094A JP 3196363 A JP3196363 A JP 3196363A JP 19636391 A JP19636391 A JP 19636391A JP H0541094 A JPH0541094 A JP H0541094A
Authority
JP
Japan
Prior art keywords
sampling
analog signal
signal
stored
start point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3196363A
Other languages
Japanese (ja)
Inventor
Kazuaki Masuda
和明 増田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP3196363A priority Critical patent/JPH0541094A/en
Publication of JPH0541094A publication Critical patent/JPH0541094A/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To fetch a signal at a half period of a maximum sampling period by storing alternately a measured value obtained with a prescribed sampling and changing no structure of a signal fetching device. CONSTITUTION:The analog signal 1 from a measured device is sampled from a firs sampling start point 2 at the interval of a sampling period 4. The first measured values 6 (a, b, C,...) are stored to the odd number of an arrangement 8 succeedingly. Next, the same analog signal as the first is outputted once more from the measured device, is sampled from a second sampling start point 3 delayed by time 5 of a half of the sampling period from the first sampling start point 2. The second measured values 7 (f, g, h,...) are stored to the even number of the arrangement 8 succeedingly. Thus, the data column equivalent to a case sampling by the half period of the sampling period 4 is stored to the arrangement 8.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、アナログ信号サンプリ
ング装置に関し、特にアナログ信号を一定周期でサンプ
リングする測定装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog signal sampling device, and more particularly to a measuring device for sampling an analog signal at a constant cycle.

【0002】[0002]

【従来の技術】一般にアナログ信号サンプリング装置
は、連続する信号の一部を周期的にサンプリングして値
を読みとり、その値をデータ列として表わす装置であ
る。
2. Description of the Related Art Generally, an analog signal sampling device is a device for periodically sampling a part of a continuous signal to read a value and representing the value as a data string.

【0003】図3(a)は従来のアナログ信号サンプリ
ング装置の動作を示す波形図であり、図3(b)は格納
されたデータ列を表わす配列である。
FIG. 3 (a) is a waveform diagram showing the operation of a conventional analog signal sampling device, and FIG. 3 (b) is an array representing a stored data string.

【0004】図3(a)に示すように、アナログ信号1
を信号取りこみ開始点9より信号読み取り装置で指定さ
れたサンプリング周期4毎に値を読みとり、その時の測
定値10を、図3(b)に示す様に、配列8に順番に格
納していくことにより、データ列で元のアナログ信号の
成分を表現する。
As shown in FIG. 3A, the analog signal 1
A value is read from the signal acquisition start point 9 at every sampling cycle 4 designated by the signal reading device, and the measured value 10 at that time is sequentially stored in the array 8 as shown in FIG. 3 (b). Thus, the original analog signal component is expressed in the data string.

【0005】配列8に格納されたデータは、フーリエ変
換などの信号処理により分析される。
The data stored in the array 8 is analyzed by signal processing such as Fourier transform.

【0006】5MHz,512データサンプルでは、一
般的に取りこみに約100μs、信号処理に約100m
sの時間が必要である。
At 5 MHz, 512 data samples, generally about 100 μs for acquisition and about 100 m for signal processing.
s time is required.

【0007】[0007]

【発明が解決しようとする課題】従来のアナログ信号サ
ンプリング装置では、信号をサンプリングする間隔は信
号取りこみ装置のサンプリング周期によって決まるた
め、信号取りこみ装置の最高サンプリング周期より短か
い間隔でアナログ信号を取りこまなくてはならない測定
には、適用できないという問題点がある。
In the conventional analog signal sampling device, since the sampling interval of the signal is determined by the sampling period of the signal capturing device, the analog signal is captured at a shorter interval than the maximum sampling period of the signal capturing device. There is a problem in that it cannot be applied to an indispensable measurement.

【0008】本発明の目的は、前記問題点を解決し、信
号取りこみ装置の構造を変えることなく、最高サンプリ
ング周期の半分の周期で信号を取りこむことのできるア
ナログ信号サンプリング装置を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to solve the above problems and to provide an analog signal sampling apparatus which can take in a signal at a half cycle of the maximum sampling cycle without changing the structure of the signal taking apparatus. .

【0009】[0009]

【課題を解決するための手段】本発明の構成は、被測定
装置から出力されるアナログ信号を一定周期でサンプリ
ングする手段と、前記手段で得られた測定値を配列して
格納する手段とを備えたアナログ信号サンプリング装置
において、前記被測定装置のアナログ出力信号を一定周
期でサンプリングして得た測定値を配列の奇数番目に格
納し、次に前記被測定装置から新たに同じアナログ信号
を発生させ前回の測定点の中間をサンプリングして得た
測定値を前記配列の偶数番目に格納する手段を設けたこ
とを特徴とする。
The structure of the present invention comprises means for sampling an analog signal output from a device under test at a constant cycle, and means for arranging and storing the measured values obtained by said means. In the provided analog signal sampling device, the measured value obtained by sampling the analog output signal of the device under test at a constant cycle is stored in an odd number of the array, and then the same analog signal is newly generated from the device under test. It is characterized in that a means for storing the measured value obtained by sampling the middle of the previous measuring points in an even number of the array is provided.

【0010】[0010]

【実施例】図1(a)は本発明の第1の実施例の動作を
示す波形図であり、図1(b)は図1(a)の測定結果
を格納する配列を示す図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1A is a waveform diagram showing the operation of the first embodiment of the present invention, and FIG. 1B is a diagram showing an array for storing the measurement results of FIG. 1A. .

【0011】図1において、本実施例では、被測定装置
からのアナログ信号1が、1回目のサンプリング開始点
2よりサンプリング周期4の間隔でサンプリングする。
1回目の測定値6である〔a,b,c,…〕は配列8の
奇数番目に順に格納する。
In FIG. 1, in this embodiment, the analog signal 1 from the device under test is sampled at a sampling period 4 from the sampling start point 2 of the first sampling.
The first measured value 6 [a, b, c, ...] Is stored in the array 8 in the odd-numbered order.

【0012】次に、被測定装置から1回目と同じアナロ
グ信号をもう一回出力させ、1回目のサンプリング開始
点2よりサンプリング周期の半分の時間5だけ遅れた2
回目のサンプリング開始点3よりサンプリング周期4の
間隔でサンプリングする。2回目の測定値7である
〔f,g,h,…〕は配列8の偶数番目に順に格納す
る。
Next, the same analog signal as the first time is output from the device under test one more time, and it is delayed from the first sampling start point 2 by a time 5 which is half the sampling period.
Sampling is performed at intervals of a sampling cycle 4 from the sampling start point 3 of the second time. The second measured value 7 [f, g, h, ...] Is stored in the even number of the array 8 in order.

【0013】従って、配列8にはサンプリング周期4の
半分の周期でサンプリングした場合と等価のデータ列が
格納される。
Therefore, the array 8 stores a data string equivalent to the case where sampling is performed at a half cycle of the sampling cycle 4.

【0014】図2(a)は本発明の第2の実施例の動作
を示す波形図であり、図2(b)は図2(a)の測定結
果を格納する配列を示す図である。図2において、本実
施例では、アナログ信号1がサンプリング開始点9より
サンプリング周期4の間隔でサンプリングする。1回目
の測定値である〔a,b,c,…〕は配列8の奇数番目
に順に格納する。
FIG. 2A is a waveform diagram showing the operation of the second embodiment of the present invention, and FIG. 2B is a diagram showing an array for storing the measurement results of FIG. 2A. In FIG. 2, in this embodiment, the analog signal 1 is sampled from the sampling start point 9 at intervals of the sampling cycle 4. The first measured values [a, b, c, ...] Are stored in the array 8 in odd-numbered order.

【0015】次に被測定装置から1回目の同じアナログ
信号をサンプリング周期の半分の時間5早い点から発生
させ、1回目と同じサンプリング開始点9よりサンプリ
ング周期4の間隔でサンプリングする。2回目の測定値
である〔f,g,h,…〕は配列8の偶数番目に順に格
納する。
Next, the same analog signal for the first time is generated from the device under test at a point 5 times earlier than half the sampling cycle, and sampling is performed at the sampling cycle 4 from the same sampling start point 9 as the first time. The second measured values [f, g, h, ...] Are stored in the array 8 in even-numbered order.

【0016】従って、配列8には第1の実施例と同様に
サンプリング周期4の半分の周期でサンプリングした場
合と等価のデータ列が格納される。
Therefore, the array 8 stores a data string equivalent to the case where sampling is performed at a half cycle of the sampling cycle 4, as in the first embodiment.

【0017】第1の及び第2の実施例共に、配列8に格
納されたデータはフーリエ変換などの信号処理により分
析される。また、第1及び第2の実施例では、2回のデ
ータ取りこみを必要とするが、データ取りこみは信号処
理の1/1000程度の時間しか必要としないので、全
体の測定時間にはほとんど影響しない。
In both the first and second embodiments, the data stored in the array 8 is analyzed by signal processing such as Fourier transform. In addition, in the first and second embodiments, the data acquisition is required twice, but since the data acquisition requires only about 1/1000 of the signal processing, it hardly affects the entire measurement time. .

【0018】[0018]

【発明の効果】以上説明したように、本発明によれば、
信号取りこみ装置の構造を変えることなく、最高サンプ
リング周期の半分の周期で信号を取りこむことができ、
また同じ精度の測定をするのに最高サンプリング周期が
2倍の信号取りこみ装置で適応できるという効果を有す
る。
As described above, according to the present invention,
Without changing the structure of the signal capture device, it is possible to capture signals at half the maximum sampling period,
Further, it has an effect that a signal acquisition device having a double maximum sampling period can be applied to the measurement with the same accuracy.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a),(b)は本発明の第1の実施例のアナ
ログ信号サンプリング装置のそれぞれ動きを示す波形
図、測定結果の格納を示す配列図である。
1A and 1B are a waveform diagram showing the movement of an analog signal sampling apparatus of a first embodiment of the present invention and an array diagram showing storage of measurement results.

【図2】(a),(b)は本発明の第2の実施例のそれ
ぞれ動きを示す波形図、測定結果の格納を示す配列図で
ある。
2 (a) and 2 (b) are respectively a waveform diagram showing the movement of the second embodiment of the present invention and an array diagram showing storage of measurement results.

【図3】従来のアナログ信号サンプリング装置のそれぞ
れ動きを示す波形図、測定結果の格納を示す配列図であ
る。
FIG. 3 is a waveform diagram showing the movement of a conventional analog signal sampling device and an array diagram showing the storage of measurement results.

【符号の説明】[Explanation of symbols]

1 アナログ信号 2 1回目のサンプリング開始点 3 2回目のサンプリッグ開始点 4 サンプリング周期 5 サンプリング周期の半分の時間 6 1回目の測定値 7 2回目の測定値 8 配列 9 サンプリング開始点 10 測定値 1 Analog signal 2 1st sampling start point 3 2nd sampling start point 4 Sampling period 5 Half time of sampling period 6 1st measurement value 7 2nd measurement value 8 Array 9 Sampling start point 10 measurement value

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 被測定装置から出力されるアナログ信号
を一定周期でサンプリングする手段と、前記手段で得ら
れた測定値を配列して格納する手段とを備えたアナログ
信号サンプリング装置において、前記被測定装置のアナ
ログ出力信号を一定周期でサンプリングして得た測定値
を配列の奇数番目に格納し、次に前記被測定装置から新
たに同じアナログ信号を発生させ前回の測定点の中間を
サンプリングして得た測定値を前記配列の偶数番目に格
納する手段を設けたことを特徴とするアナログ信号サン
プリング装置。
1. An analog signal sampling device comprising: means for sampling an analog signal output from a device under test at constant intervals; and means for arranging and storing the measured values obtained by said device. The measured value obtained by sampling the analog output signal of the measuring device at a constant cycle is stored in the odd-numbered array, and then the same analog signal is newly generated from the device under test to sample the middle of the previous measuring point. An analog signal sampling apparatus comprising means for storing the obtained measured values in even-numbered arrays.
JP3196363A 1991-08-06 1991-08-06 Analog signal sampling device Pending JPH0541094A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3196363A JPH0541094A (en) 1991-08-06 1991-08-06 Analog signal sampling device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3196363A JPH0541094A (en) 1991-08-06 1991-08-06 Analog signal sampling device

Publications (1)

Publication Number Publication Date
JPH0541094A true JPH0541094A (en) 1993-02-19

Family

ID=16356606

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3196363A Pending JPH0541094A (en) 1991-08-06 1991-08-06 Analog signal sampling device

Country Status (1)

Country Link
JP (1) JPH0541094A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008031659A1 (en) 2006-09-13 2008-03-20 Endress+Hauser Gmbh+Co.Kg Device for determining and/or monitoring a process variable
JP2008275730A (en) * 2007-04-26 2008-11-13 Sec:Kk Sound signal coding device and sound signal coding method
CN108168897A (en) * 2017-12-15 2018-06-15 西安航天动力测控技术研究所 A kind of method of solid engines experiment 1553B servo instruction automatic segmentations

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60117500A (en) * 1983-11-29 1985-06-24 Nec Corp Sample and hold circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60117500A (en) * 1983-11-29 1985-06-24 Nec Corp Sample and hold circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008031659A1 (en) 2006-09-13 2008-03-20 Endress+Hauser Gmbh+Co.Kg Device for determining and/or monitoring a process variable
JP2008275730A (en) * 2007-04-26 2008-11-13 Sec:Kk Sound signal coding device and sound signal coding method
CN108168897A (en) * 2017-12-15 2018-06-15 西安航天动力测控技术研究所 A kind of method of solid engines experiment 1553B servo instruction automatic segmentations

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