JPH0535660Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a video signal processing device suitable for application to, for example, a camera-integrated video tape recorder.

[Prior Art] Conventionally, for example, in a camera-integrated video tape recorder, it has been known to insert a text title into the image capture screen.

[Problem that the invention aims to solve] In addition to this text title, it is also possible to insert a multi-screen of still images, such as inserting a multi-screen of still images showing the participants in front of the screen of an event such as an athletic meet. It is possible to insert it as a kind of title. Here, each screen of the still image multi-screen is partitioned by a frame.

In this case, by combining a multi-screen still image with a text title, a wide variety of titles will be available, and more effective title recording is expected.

However, when the text title and frame overlap,
There was a risk that the text title would become unsightly and the display effect would be weakened.

Therefore, the purpose of this invention is to prevent the text title from becoming unsightly even when the text title and the frame overlap.

[Means for Solving the Problems] This invention includes an insertion circuit that inserts a character title display signal that displays a character title and a frame display signal that displays a frame that partitions multiple child screens; and a controller for controlling the insertion circuit, so that the character title according to the character title display signal is displayed with priority over the frame according to the frame display signal, and the color of the character title and the color of the frame are different. It is something that will be done.

[Operation] In the above configuration, the character title based on the character title display signal is displayed with priority over the frame based on the frame display signal, and the color of these character titles and the color of the frame are made different, so that the character title and the frame are different. Even if the frames overlap, the text title no longer becomes unsightly.

[Example] Hereinafter, an example of this invention will be described with reference to FIG. This example is an example applied to a camera-integrated video tape recorder.

In the figure, reference numeral 1 denotes an image sensor, for example a CCD fixed image sensor, and an image signal from the image sensor 1 is supplied to a process circuit 3 via an AGC circuit 2, which outputs a luminance signal Y and a color difference signal. R-Y and B-Y are output.

The luminance signal Y output from the process circuit 3 is γ
The signal is supplied to a fixed terminal on the L side of the changeover switch 6 via a series circuit of a correction circuit 4 and an amplifier 5. Note that the H side fixed terminal of the changeover switch 6 is grounded.

The output signal of the changeover switch 6 is supplied to an encoder 8 via an adder 7, and after a synchronization signal is added by the encoder 8, it is supplied to the R side fixed terminal of the changeover switch 9.

Further, the color difference signals R-Y and B-Y outputted from the process circuit 3 are transmitted through changeover switches 10 and 1, respectively.
It is supplied to the fixed terminal on the L side of 1. Note that the fixed terminals on the H side of the changeover switches 10 and 11 are grounded.

The output signals of the changeover switches 10 and 11 are supplied to an encoder 8 via adders 12 and 13, respectively, and are quadrature-phase modulated by the encoder 8 to produce a color signal C (the color subcarrier frequency is, for example, 3.58 MHz).
This color signal C is outputted as a changeover switch 1.
The voltage Vcc is supplied to the fixed terminal on the R side of the output terminal 4.

Further, the output signal of the changeover switch 9 is supplied to a 1-bit A/D converter 15, and this A/D converter 15 forms character title data. That is, the A/D converter 15 is configured with a comparator 15a, and the output signal of the changeover switch 9 is compared with a reference voltage Vref by the comparator 15a, and character title data is output from the comparator 15a. For example, when the output signal of the changeover switch 9 is as shown in FIG. 2A, the comparator 15a outputs character title data in which the character part is at a high level "1" as shown in FIG. 2B. Ru.

The character title data output from the A/D converter 15 is supplied to the title circuit 16, and one screen worth of character title data is written into the memory 16b. In this case, the character title data is converted into parallel data by the serial/parallel converter 16a and then supplied to the memory 16b.

This title circuit 16 is controlled by a controller 17 having a microcomputer, and a keyboard 18 writes data into the memory 16b. When the character title insertion mode is selected, character title data is read from the memory 16b, converted into serial data by the parallel/serial converter 16c, and then supplied to the AND circuits 16d, 16e, and 16f. Color data is supplied from the controller 17 to these AND circuits 16d, 16e, and 16f. Therefore, the AND circuits 16d, 16e, and 16f output a blue signal B, a green signal G, and a red signal R, which constitute the designated color corresponding to the character part, respectively.
is output. Note that the color of the character title is specified by operating the keyboard 18.

The red signal R output from the AND circuit 16f is supplied to the subtracter 19 and the adder 20, and the green signal G output from the AND circuit 16e is supplied to the adder 2.
The blue signal outputted from the AND circuit 16d is supplied to the adder 20 and the subtracter 21. Then, the luminance signal Y forming the character title display signal from the adder 20 is supplied to the adder 7 and added.

Furthermore, the luminance signal Y from the adder 20 is transmitted to the subtracter 1
9,21. And subtractor 19,2
The color difference signals RY and B-Y forming the character title display signal from 1 are supplied to adders 12 and 13, respectively, and added.

Further, the character title data output from the parallel/serial converter 16c is transferred to the selector switch 22.
is supplied to the movable terminal. This changeover switch 22
The switching is controlled by the controller 17. In this case, when in text title insertion mode in recording mode, it is connected to side a, and in recording mode text title insertion mode and multi-title mode, in playback mode text title insertion mode, and in playback mode text title insertion mode and multi-title mode. When in title mode, it is connected to side b.

The output signal of the fixed terminal on the a side of the changeover switch 22 is supplied to the changeover switches 6, 10, and 11 as a changeover control signal. Changeover switch 6, 10, 1
1 is connected to the H side and the L side, respectively, when the switching control signal is a high level "1" signal and a low level "0" signal.

Further, the output signal of the changeover switch 9 is supplied to the A/D converter 23, and after being converted into a digital signal by the A/D converter 23, it is stored in the field memory 2.
4 as a write signal.

This field memory 24 is connected to the memory control circuit 2.
It is controlled by controller 17 via 5.

A keyboard 18 is connected to this controller 17, as well as character title operation keys 26,
Multi-title operation key 27, set operation key 2
8. Recording operation key 29 and playback operation key 30
is connected.

When the mode is not displaying a 9-split screen (hereinafter referred to as "multi-title mode"),
Write data is written into the field memory 24 without being thinned out in the vertical and horizontal directions, and reading is performed in parallel.

Furthermore, when the operation key 27 is pressed to enter the multi-title mode, the field memory 24
After black screen data is written to the entire area of the screen, the write data is thinned out to 1/3 in the vertical and horizontal directions and written to the first area of the field memory 24 corresponding to the upper left part of the screen. is performed, and in parallel, field memory 2
The entire area of No. 4 is read out.

In this state, when the operation key 27 is pressed, the write data is thinned out to 1/3 in both the vertical and horizontal directions, and the data is written in the second area of the field memory 24 corresponding to the upper middle part of the screen. At the same time, the entire area of the field memory 24 is read out in parallel.

Thereafter, each time the operation key 27 is pressed, the write data is 1/1/2 vertically and horizontally.
The third to third fields of the field memory 24 are thinned out to three.
While writing is performed sequentially in the ninth area,
The entire area of the field memory 24 is read out in parallel.

Field memory 2 corresponding to the lower right part of the screen
When operation key 27 is pressed while writing is being performed in the ninth area of field memory 24, writing to field memory 24 is stopped.

From now on, as you press the operation key 27, the write data will change by 1/3 in the vertical and horizontal directions.
The data is thinned out, and data is sequentially written into the first to ninth areas of the field memory 24, and the entire area of the field memory 24 is read out in parallel.

When the operation key 28 is pressed in each of the above states,
When writing to the field memory 24 is in progress, the writing is stopped. Then, when the operation key 27 is pressed after that, the multi-title mode is canceled.

Further, the output signal of the field memory 24 is supplied to the a-side fixed terminal of the changeover switch 32 via a delay circuit 31 for time alignment with the color signal. A DC voltage is supplied from a DC power supply 33 to a fixed terminal on the b side of the changeover switch 32.

Further, the color signal C from the changeover switch 14 is A/
After being converted into a digital signal by the D converter 34, it is supplied to the color demodulation circuit 35.
The color difference signals R-Y and B-Y are output point-sequentially.

Color difference signals R-Y, B from this color demodulation circuit 35
-Y is supplied to the field memory 36 as a write signal. This field memory 36 is
It is controlled by the memory control circuit 25 in the same manner as the field memory 24 described above.

The output signal of this field memory 24 is U/V
The signal is supplied to a decoder 37 and separated into a red difference signal RY and a blue difference signal B-Y. Color difference signals R-Y and B-Y separated by this U/V decoder 37
are supplied to the a-side fixed terminals of the changeover switches 38 and 39, respectively. These changeover switches 38,
DC power supply 4 is connected to the fixed terminal on the b side of 39.
DC voltage is supplied from 0 and 41.

Here, a switching control signal SBDR is supplied to the switching switches 32, 38, and 39 from the display controller 42. This switching control signal SBDR is composed of the character title data YBLK supplied from the fixed terminal on the b side of the switching switch 22 and the memory control circuit 25.
It is formed based on the frame data BDR supplied by. That is, as shown in FIG. 3, character title data YBLK and frame data BDR are supplied to an OR circuit 43, and the output signal of this OR circuit 43 is used as a switching control signal SBDR. Changeover switch 3
2, 38, and 39 are connected to the b side and the a side, respectively, when the switching control signal SBDR is at a high level "1" and a low level "0".

Further, a level control signal is supplied to the DC power supplies 33, 40, and 41 from the display controller 42 so that the character title or frame is displayed in a specified color.

In this case, when in playback mode, text title insertion mode, and multi-title mode,
The display controller 42 outputs a level control signal HBDφ~ corresponding to the designated color as shown in FIG.
HBD3, BDL6, and BDL7 are output, and based on this, the DC voltage V33 (luminance signal Y) from the DC power supply 33 is controlled as shown in FIG. 5, and the DC voltages V40, V41 ( The color difference signals R-Y, B-Y) are controlled as shown in FIG. Note that "SW" in FIG. 4 indicates a switching operation between a high level "1" and a low level "0".

Further, in the character title insertion mode and multi-title mode, the level control signals HBDφ to HBD3, BDL6, and BDL7 form signals SHBφ to SHB3, SBD6, and SBD7, as shown in FIG.
The DC power supplies 33, 40, and 41 are thereby controlled.

That is, the level control signals HBDφ to HBD3,
BDL6 and BDL7 are exclusive OR circuits 4
4. In addition, character title data supplied from the fixed terminal on the b side of the changeover switch 22
YBLK is connected to AND circuit 4 via inverter 45.
At the same time, frame data BDR is supplied to this AND circuit 46 from the memory control circuit 25. The output signal of this AND circuit 46 is then supplied as an inverted pulse to the exclusive OR circuit 44.
Signals SHBφ to SHB3, SBD6, and SBD7 are output.

In this case, the text part (including the part that overlaps with the frame)
In this case, the output signal of the AND circuit 46 becomes low level “0”, so the signals SHBφ to SHB3, SBD
6, SBD7 is the level control signal HBDφ to HBD3,
It is the same as BDL6 and BDL7, and the text title is displayed in the specified color. On the other hand, in the frame portion (excluding the portion overlapping with the character portion), the output signal of the AND circuit 46 is at a high level “1”, so the signals SHBφ to SHB3, SBD6, SBD7 are the level control signals HBDφ to HBD3, BDL6, This is different from BDL7, and the frame is displayed in a different color from the specified color.

Note that the display controller 42 is the controller 1
7, and the color of the character title or frame is specified by operating the keyboard 18.

Further, the output signal of the changeover switch 32 is subjected to time base correction by a time base collector 47 and then supplied to an adder 48 . Furthermore, the synchronization signal output from the memory control circuit 25 is transmitted to the time base collector 4.
After the time axis is corrected in step 9, the signal is supplied to the adder 48. The luminance signal Y to which the synchronization signal is added, which is output from the adder 48, is sent to the D/A converter 50.
After being made into an analog signal, it is supplied to the VTR 51 as a recording signal.

Moreover, the output signals of the changeover switches 38 and 39 are as follows.
After being time-base corrected by the time base collectors 52 and 53, the color signal C is supplied to the color modulation circuit 54, and the color signal C output from the color modulation circuit 54 is D/
After being converted into an analog signal by the A converter 55
The signal is supplied to the VTR 51 as a recording signal.

In this case, the U/V decoder 37, time base collectors 47, 49, 52, 53, color modulation circuit 5
4. A clock signal is commonly supplied from an oscillator 56 to the D/A converters 50 and 55.

In addition, the luminance signal Yp reproduced from the VTR 51,
The color signal Cp is supplied to the P-side fixed terminals of the changeover switches 9 and 14, respectively. Switching of these changeover switches 9 and 14 is controlled by a controller 17, and they are connected to the R side in recording standby mode and recording mode, and are connected to the P side in playback mode.

The operation of the VTR 51 is controlled by the VTR control circuit 57.
It is controlled by the controller 17 via.

Further, the output signal of the D/A converter 50 is supplied to an electronic viewfinder 58. Further, the output signals of the D/A converters 50 and 55 are supplied to an adder 59, and the output signal of this adder 59 is supplied to an amplifier 60.
is supplied to the line output terminal 61 via.

In the above configuration, in the recording standby mode, the changeover switches 9 and 14 are connected to the R side, and the changeover switches 32, 38, and 39 remain connected to the a side. Further, in the field memories 24 and 36, writing is performed without thinning out, and reading is performed in parallel. Therefore, the video signal of the subject currently being photographed is supplied to the VTR 51. At this time, the screen of the subject is displayed on the EVF 58 (as shown in FIG. 8A).

In this state, when the operation key 29 is pressed to enter the recording mode, the video signal of the subject currently being photographed is recorded on the VTR 51.

In addition, in the recording standby mode, the operation key 26
When the character title insertion mode is entered by pressing , character title data is read from the memory 16b of the title circuit 16. At this time, selector switch 2
2 is connected to the a side, so the changeover switch 6, 1
0 and 11 are connected to the H side corresponding to the character part. Also, the AND circuit 16d of the title circuit 16
~16f are supplied with color data from the controller 17, and these AND circuits 16d~16f output primary color signals B, G, and R as character title display signals.
is output. Therefore, adder 7, adder 1
2 and 13, the luminance signal Y and color difference signal R- which form a character title display signal are added to the luminance signal Y, color difference signal R-Y, and B-Y from the video camera section, respectively.
Y, B-Y are inserted. In addition, selector switch 3
2, 38, and 39 remain connected to the a side.
Therefore, the VTR 51 is supplied with a video signal of the subject currently being photographed into which a character title display signal has been inserted. At this time, the EVF 58 displays a screen of the subject currently being photographed with a text title inserted (as shown in FIG. 8B).

In this state, when the operation key 29 is pressed to enter the recording mode, the VTR 51 records a video signal into which a character title display signal has been inserted. Note that even if the recording mode is changed to the character title insertion mode, a video signal into which a character title display signal is inserted can be recorded in the same way.

Also, in the recording standby mode, the operation key 27
When you press to enter multi-title mode, black screen data is written to the entire area of field memories 24 and 36, and then the written data is thinned out to 1/3 vertically and horizontally, and the upper left part of the screen is Field memories 24, 3 corresponding to
While writing is performed in the first area of 6,
All areas of the field memories 24 and 36 are read out in parallel. Also, when in multi-title mode, frame data BDR,
Therefore, the switching control signal SBDR is at high level "1"
Therefore, the changeover switches 32, 38, and 39 are connected to the b side. Therefore, the luminance signal Y forming the frame display signal is inserted into the luminance signal Y output from the delay circuit 31, and the frame display signal is inserted into the color difference signals R-Y, B-Y output from the U/V decoder 37. The color difference signals R-Y and B-Y forming the image are inserted. In this case, the level control signal HBDφ is sent from the display controller 42 to the DC power supplies 33, 40, and 41.
~HBD3, BDL6, BDL7 are supplied, so
The frame display signal causes a frame in the designated color to be displayed. Therefore, the VTR 51 is supplied with a video signal for displaying a sub-screen of the moving image in the upper left part of the screen partitioned by a frame. At this time, EVF58 has
A sub-screen of the video is displayed in the upper left part (Figure 8C)
(illustrated).

In this state, if you press the operation key 27, the write data will be moved by 1/3 in the vertical and horizontal directions.
writing is performed in the second area of the field memories 24 and 36 corresponding to the middle upper part of the screen, and in parallel, the data is written in the second area of the field memories 24 and 36.
All areas 4 and 36 are read out. Therefore, the VTR 51 is supplied with a video signal that displays a still image sub-screen in the upper left part of the partitioned screen and a moving image sub-screen in the upper middle part. At this time, on the EVF 58, a still image sub-screen is displayed in the upper left part, and a moving image sub-screen is displayed in the upper middle part (as shown in FIG. 2D).

From now on, as you press the operation key 27, the write data will change by 1/3 in the vertical and horizontal directions.
The data is thinned out, and data is sequentially written into the third to ninth areas of the field memories 24, 36, and all areas of the field memories 24, 36 are read out in parallel. Therefore, VTR
51 displays a sub-screen of the moving image on the screen portion corresponding to the area currently being written in the field memories 24 and 36, and
In steps 4 and 36, a video signal for displaying a sub-screen of a still image is supplied to the screen portion corresponding to the area previously in the writing state. At this time, on the EVF 58, a sub-screen of the video is displayed in the screen part corresponding to the area in the field memory 24, 36 that is currently in the writing state, and a sub-screen of the video is displayed in the area that was previously in the writing state in the field memory 24, 36. A sub-screen with a still image is displayed in the corresponding screen area. FIGS. 8E and 8F are display examples when the fifth and ninth areas of the field memories 24 and 36 are in the write state, respectively.

When the operation key 27 is pressed while writing is being performed in the ninth area corresponding to the lower right portion of the screen of the field memories 24, 36, writing to the field memories 24, 36 is stopped. Therefore, the VTR 51 is supplied with a video signal for displaying a sub-screen of a still image in each section partitioned by a frame. At this time, the EVF 58 displays sub-screens of still images in each portion.

From now on, as you press the operation key 27, the write data will change by 1/3 in the vertical and horizontal directions.
The data is thinned out, and data is sequentially written into the first to ninth areas of the field memories 24, 36, and all areas of the field memories 24, 36 are read out in parallel. Therefore, VTR
51 is supplied with a video signal for displaying a sub-screen of a moving image on the screen portion corresponding to the area currently in the writing state in the field memories 24 and 36, and displaying a sub-screen of a still image on other screen portions. .
At this time, the EVF58 has field memory 2.
At 4 and 36, a sub-screen of a moving image is displayed on the screen portion corresponding to the area currently in the writing state, and a sub-screen of a still image is displayed on the other screen portions.

Furthermore, when the operation key 28 is pressed in each of the above states, if writing to the field memories 24, 36 is in progress, the writing is stopped. Therefore, the VTR 51 is supplied with a video signal for displaying a sub-screen of a still image on the screen portion corresponding to the area previously in the writing state in the field memories 24 and 36. At this time, EVF58
, a still image sub-screen is displayed in the screen portion corresponding to the area previously in the writing state in the field memories 24, 36.

In each of the above states, when the operation key 29 is pressed to enter the recording mode, the VTR 51 records the supplied video signal. Note that similar recording can be performed in the recording mode and then in the multi-title mode.

Also, after pressing the operation key 28, the operation key 27
Press to cancel multi-title mode.
At this time, writing is performed in the field memories 24 and 36 without thinning out, and reading is performed in parallel, so that the VTR 51
is supplied with the video signal of the subject currently being photographed. At this time, the subject is displayed on the EVF 58 (as shown in G in the figure).

In addition, in the recording standby mode, the operation key 26
Press to enter text title insertion mode, and
When the operation key 27 is pressed to enter the multi-title mode, character title data is read out from the memory 16b of the title circuit 16, and the changeover switch 22 is connected to the b side. Note that since color data is not supplied from the controller 17 to the AND circuits 16d to 16f, the adders 7, 12, and 13 do not insert the character title display signal.
At this time, in the character portion and the frame portion, the character title data YBLK, the frame data BDR, and therefore the switching control signal SBDR are at a high level “1”, and the changeover switches 32, 38, and 39 are connected to the b side.
Therefore, the luminance signal Y that forms the character title display signal and the frame display signal is inserted into the luminance signal Y output from the delay circuit 31, and the color difference signals R-Y, B- output from the U/V decoder 37 are inserted.
Color difference signals R-Y and B-Y forming a character title display signal and a frame display signal are inserted into Y. In this case, the text part (including the part that overlaps with the frame part)
Corresponding to this, the DC power supplies 33, 40, and 41 receive a level control signal HBDφ~ from the display controller 42.
Same signal SHBφ as HBD3, BDL6, BDL7
Since SHB3, SBD6, and SBD7 are supplied, the character title display signal is such that the character title in the specified color is displayed. In addition, level control signals HBDφ to HBD3,
Signals SHBφ to SHB different from BDL6 and BDL7
3, SBD6, and SBD7 are supplied, the frame display signal is such that a frame in a color different from the designated color is displayed. Therefore, the VTR 51 is supplied with a video signal into which a character title display signal and a frame display signal are inserted. At this time, EVF58
, a multi-screen with a text title inserted is displayed (as shown in FIG. 8H; only the text title and frame are shown to simplify the drawing).

In this state, when the operation key 29 is pressed to enter the recording mode, a video signal into which a character title display signal and a frame display signal are inserted is recorded on the VTR 51. It should be noted that a video signal into which a character title display signal and a frame display signal are inserted can be recorded in the same manner even when the recording mode is changed to the character title insertion mode and the multi-title mode.

Further, when the operation key 30 is pressed to enter the playback mode, the VTR 51 is put into the playback state, the changeover switches 9 and 14 are connected to the P side, and the changeover switches 32, 38, and 39 remain connected to the a side. Further, in the field memories 24 and 36, writing is performed without thinning out, and reading is performed in parallel. Therefore, a reproduced video signal from the VTR 51 is supplied to the line output terminal 61. At this time, the EVF 58 displays the playback screen. (See Figure 8A).

Further, when the operation key 26 is pressed in the reproduction mode to enter the character title insertion mode, character title data is read out from the memory 16b of the title circuit 16, and the changeover switch 22 is connected to the b side. At this time, in the character part, the character title data YBLK, and therefore the switching control signal
SBDR becomes high level “1” and selector switch 3
2, 38, and 39 are connected to the b side. Therefore,
A luminance signal Y forming a character title display signal is inserted into the luminance signal Y output from the delay circuit 31, and a character title display signal is inserted into the color difference signals R-Y, B-Y output from the U/V decoder 37. The color difference signals R-Y and B-Y forming the image are inserted.
In this case, the DC power supplies 33, 40, 41 are supplied with level control signals HBDφ~ from the display controller 42.
Since HBD3, BDL6, and BDL7 are supplied, the character title display signal is such that the character title in the specified color is displayed. Therefore, the line output terminal 61 is supplied with a reproduced video signal into which a character title display signal is inserted. At this time,
A playback screen with a text title inserted is displayed on the EVF 58 (see FIG. 8B).

Furthermore, when the operation key 27 is pressed in the playback mode to enter the multi-title mode, video signals for displaying the multi-screen are output from the field memories 24 and 36 in the same manner as in the recording standby mode described above. . At this time, in the frame portion, the frame data BDR and therefore the switching control signal SBDR become high level "1", and the changeover switches 32, 38,
39 is connected to the b side. Therefore, delay circuit 3
The luminance signal Y forming the frame display signal is inserted into the luminance signal Y output from the U/V decoder 37, and the color difference signals R-Y, B-Y are output from the U/V decoder 37.
color difference signals R-Y, B-Y that form frame display signals in
is inserted. In this case, the DC power supplies 33, 40,
41 is supplied with level control signals HBDφ to HBD3, BDL6, and BDL7 from the display controller 42, so that the frame display signal is such that a frame of a designated color is displayed. Therefore, line output terminal 6
1 is supplied with a reproduced video signal for displaying a multi-screen into which a frame display signal has been inserted. At this time,
A multi-screen partitioned by frames is displayed on the EVF 58 (see FIG. 8F).

Further, in the playback mode, if the operation key 26 is pressed to enter the character title insertion mode and the operation key 27 is pressed to enter the multi-title mode, the character title data is read out from the memory 16b of the title circuit 16, and the changeover switch 22 is connected to the b side. At this time, the character title data YBLK,
Frame data BDR and therefore switching control signal SBDR
becomes high level "1", and the changeover switch 32,3
8 and 39 are connected to the b side. Therefore, the luminance signal Y that forms a character title display signal and a frame display signal is added to the luminance signal Y output from the delay circuit 31.
is inserted, and a color difference signal R that forms a character title display signal and a frame display signal is inserted into the color difference signals R-Y, B-Y output from the U/V decoder 37.
-Y, BY are inserted. In this case, the display controller 42 is connected to the DC power supplies 33, 40, 41 corresponding to the character portion (including the portion overlapping the frame portion).
The level control signals HBDφ~HBD3, BDL6,
Same signal as BDL7 SHBφ~SHB3, SBD6,
Since SBD7 is supplied, the character title display signal will display the character title in the specified color. Also, in correspondence with the frame part (not including the part that overlaps with the character title part),
Level control signals HBDφ to HBD3, HBD6, HBD are sent to 3, 40, and 41 from the display controller 42.
Signals SHBφ to SHB3, SBD6, different from 7
Since SBD7 is supplied, the frame display signal is such that a frame in a color different from the specified color is displayed. Therefore, the line output terminal 61 is supplied with a reproduced video signal for displaying a multi-screen in which a character title display signal and a frame display signal are inserted. At this time, a text title is inserted into the EVF 58, and a multi-screen partitioned by frames is displayed (see FIG. 8H).

According to this example, when the operation key 26 is pressed to enter the character title insertion mode and the operation key 27 is pressed to enter the multi-title mode,
A character title display signal and a frame display signal are inserted into the video signal, and the character title display signal corresponding to the character part (including the part that overlaps with the frame part) displays the character title in a specified color, The frame display signal corresponding to the frame portion (excluding the portion overlapping with the character title portion) causes a frame to be displayed in a color different from the specified color. Therefore, even if the text title and the frame are displayed overlapping each other, the text title does not become unsightly. In addition,
Although not mentioned above, the most visual effect can be achieved by configuring the color of the character title and the color of the frame to have a complementary color relationship.

Further, according to this example, a text title can be easily inserted in the recording mode and the playback mode, making it easy to use.

[Effect of the invention] As explained above, according to this invention, one of the character title by the character title display signal and the frame by the frame display signal is displayed with priority, and the color of the character title and the color of the frame are are made to be different, so even if the text title and the frame overlap, the text title will not look unsightly. Therefore, effective title display can be performed.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of this invention, and FIGS. 2 to 8 are diagrams for explaining the same. 1... Image sensor, 2... AGC circuit, 3... Process circuit, 6, 9 to 11, 14, 22, 32,
38, 39...changeover switch, 7, 12, 13,
20, 48, 59... Adder, 8... Encoder, 15... 1-bit A/D converter, 16...
Title circuit, 17... controller, 18...
Keyboard, 19, 21...Subtractor, 23, 34
...A/D converter, 24, 36...Field memory, 25...Memory control circuit, 26-30...
Operation key, 37... U/V decoder, 33, 4
0,41...DC power supply, 35...Color demodulation circuit, 4
2... Display controller, 43... OR circuit, 4
4... Exclusive OR circuit, 45... Inverter, 46... AND circuit, 47, 49, 5
2,53...Time base collector, 50,55
... D/A converter, 51 ... VTR, 54 ... Color modulation circuit, 56 ... Oscillator, 57 ... VTR control circuit, 58 ... Electronic viewfinder, 61 ...
Line output terminal.

Claims (1)

[Claims for Utility Model Registration] An insertion circuit for inserting a character title display signal for displaying a character title and a frame display signal for displaying a frame that partitions multiple sub-screens; and a circuit for supplying character title data and frame data; and a controller for controlling the circuit, the character title according to the character title display signal is displayed with priority over the frame according to the frame display signal, and the color of the character title and the color of the frame are different from each other. A video signal processing device characterized by: