JPH05336191A - Multi-channel controller - Google Patents

Abstract

PURPOSE:To process data communication at a high speed in the system having plural communication modules by providing the multi-channel controller managing input and output of communication data between a host computer and a communication module. CONSTITUTION:Data of a communication module are inputted to an input buffer by an input means. When an input request of data comes from a host computer, the data of the input buffer and its presence and absence state are informed to the host computer by a data state notifying means. When an output request comes from the host computer, an output buffer state notifying means informs the host computer of the state of the output buffer. When a storage area is left in the output buffer, data are written in the output buffer. Then the data from the host computer are outputted to a relevant communication module from the output buffer by using an output means.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION This invention relates to multi-channel controllers.

[0002]

2. Description of the Related Art Conventionally, for example, a 32-bit CPU
From a host computer such as 68000 series to VME (Verse Mo
A system that performs processing for a plurality of communication modules via a dule Europe) bus is known. This VME
The bus system is a 32-bit bus standard centered on Motorola's CPU, which has a high processing speed and has been widely adopted in recent years.

In such a conventional system, data communication is performed between the host computer and a plurality of communication modules under the direct management of the host computer, and the host computer controls the plurality of communication modules while inputting / outputting data. At the same time, not only the communication module but also other controlled objects are controlled.

[0004]

By the way, in such a conventional system, since the host computer directly manages the input / output of communication data, when the control of the controlled object other than the communication module is increased, the host computer is controlled. It puts a load on the data communication and makes it impossible to concentrate on the management of the data communication, and the data communication cannot be processed at high speed. On the contrary, when the communication becomes busy, other processing is delayed. In such a system that processes a large number of communication modules at high speed, C
There is a need to realize intelligent systems that perform high-speed data communication without compromising PU power.

The present invention has been made in view of such conventional problems, and an object thereof is to provide a multi-channel controller capable of processing data communication at high speed in a system having a plurality of communication modules. ..

[0006]

Therefore, the present invention is based on FIG.
As shown in FIG. 2, in a system in which a plurality of communication modules are connected to one host computer to perform data communication, an input buffer that stores data input from the communication module and an output buffer that stores data output from the host computer Each of the communication modules has an input means for inputting data from the communication module to a corresponding input buffer when a data input interrupt is received from the communication module; When it is from the computer, a data status notifying means for detecting whether or not there is data from the communication module in the input buffer and notifying the host computer of the data in the input buffer and the presence / absence status thereof, There is a request to output the specified data. When there is a storage area in the output buffer corresponding to the communication module, the output buffer status notification means for notifying the host computer of the status of the output buffer, and the storage area remains in the output buffer. And an output means for writing data to the output buffer and outputting the data to a corresponding communication module.

[0007]

According to the above construction, when there is a data input interrupt from the communication module, the data of the communication module is input to the corresponding input buffer by the input means.
Further, when an input request for data in the input buffer is made from the host computer, the data state notifying means detects whether or not there is data from the communication module in the input buffer, and the data in the input buffer and the presence / absence state thereof are sent to the host computer. Be notified.

In order to output data from the host computer to the communication module, the host computer designates the communication module and outputs an output request. When this output request is made, the output buffer status notifying means detects whether or not there is a storage area in the output buffer corresponding to the communication module, and notifies the host computer of the status of the output buffer. When the storage area remains in the corresponding output buffer, the data is written in the output buffer, and the data from the host computer is output from the output buffer to the corresponding communication module by the output means.

Therefore, since the multi-channel controller manages the input / output of communication data based on the input / output request from the host computer, the load on the host computer is reduced and the data communication is not affected by the capacity of the host computer. It is possible to process data communication with a plurality of communication modules at high speed.

[0010]

Embodiments of the present invention will be described below with reference to FIGS. In FIG. 2 showing an embodiment of the present invention, a multi-channel controller (hereinafter referred to as “MCC”) 1
Is connected to a 68000-series host computer 3, which is a 32-bit computer, via the VMEbus 2, and M
For example, eight communication modules 4-1 to 4-8 are connected to CC1 via an 8-bit bus 8.

In FIG. 3 showing the configuration of the MCC1, the CPU 21 is connected to the data, address and control buses and executes the firmware of the MCC1. The input unit, the data state notifying unit, the output buffer state notifying unit, and the output unit are configured by the CPU 21 as software. The PROM 22 is connected to data and an address bus, and stores an operation program of the firmware of the MCC 1 and data necessary for processing. DR
The AM 24 is connected to data, an address and a control bus, and stores the operation program when the operation program is transferred from the PROM 22 at the time of rising, and the communication module 4 corresponds to each communication module 4.
It is provided with an input buffer for storing the data input from and an output buffer for temporarily storing the data when the host computer 3 outputs the data to each communication module 4. D
PM25 is VME bus 26 and data bus, and VME bus 26
Connected to the address bus and data required for input / output to / from the MCC1 are set. FIFO27 is VME bus
It is connected between the data bus 26 and the data bus, and is used for receiving a data input / output request from the host computer 3. The bus buffer 28 is used for connecting the communication module 4 and the internal bus, that is, the data bus, the address bus, and the control bus.

In FIG. 4, the host computer 3 has a buffer 34 for storing input data, and an application program 31 assembled by the user, and software for interfacing between the application program 31 and the MCC 1. A driver 32 and M
FPL33, which is table data for controlling input / output to / from CC1, is provided. This FP
The L33 includes, for example, a parameter unit that stores parameters such as an input data word length, an input processing method, and a communication board selection, and a control unit that stores information for the driver to perform input / output to / from the MCC1.

Next, the operation of the MCC1 will be described. MCC1
At the rising edge of, the operation program stored in the PROM 22 and data necessary for processing are transferred to the DRAM 24. The CPU 21 operates based on this operation program and data required for processing. The operation of the CPU 21 will be described based on the flowchart of FIG.

Step (indicated as "S" in the figure,
The same applies hereinafter) 1 determines whether an input request is input from the host computer 3. The input request of the host computer 3 is made based on the flowchart of FIG. That is, in step 11, the communication module 4 to be used is subjected to the open processing and the communication module 4 to be used.
Is specified.

In step 12, the access right is acquired.
With the application program 31, parameters such as the input data word length, the input processing method, and the communication board are set to F.
It is stored in PL33 and the access right is exercised based on this. In step 13, the table data of the control unit of the FPL 33 is referred to, and the input request is output to the MCC 1 via the driver 32. In order to specifically make an input request, when the application program 31 issues an input request to the communication module 4 to the driver 32 based on the selected input processing method, as shown in FIG. DPM25 from driver 32 via VME bus 26 of MCC1 at ₁
Necessary information is set in the memory and the read request is written to the FIFO 27 via the VMEbus ₂ at time t ₂ .

On the other hand, in the MCC1, when this input request is input, the process proceeds to step 2 in FIG. In step 2,
In FIG. 7A, at time t ₃ , the data and the status indicating the presence / absence thereof are set in the DPM 25, and this routine is finished. The data from the communication module 4 is input from the communication module 4 to the MCC 1 by an input interrupt. This input interrupt is performed asynchronously with MCC1, and the input data is stored in the input buffer corresponding to the communication module 4. Next, the input processing of the data stored in the input buffer of MCC1 is performed. At this time, at the time t ₃ , the method of setting the data in the DPM 25 includes a method of waiting until the data is input, a method of waiting for a certain time until the data is input, and the data being MCC1.
If there is no input, the data will be input. If no data has been input, the input process will be terminated.
The choice of this method is made by the user.

In the host computer 3, the driver 32 inputs data from the input buffer for the communication module 4 based on the input processing method selected in step 14, and writes the data in the buffer 34 designated by the application program 31. .. Then, the driver 32 notifies the application program 31 of the writing by a return code. In this way, the input processing routine of the host computer 3 ends.

When an output request is issued from the host computer 3, the process proceeds to step 3 and subsequent steps. In step 3, it is determined whether or not there is an output request from the host computer 3. In order for the host computer 3 to make an output request, first the application program 31
Issue an output request to 32. When an output request is issued, as shown in FIG. 7 (B), the driver 32 causes the MCC to operate at time t _4.
Set necessary information in DPM25 of 1 and FIF at time t ₅ .
Write a write request to O27.

In step 4, it is judged whether or not there is an output buffer designated in the DRAM 24. If there is no output buffer, the status is DPM at time t ₆ in FIG. 7B.
It is set to 25, is output to the host computer 3, and this routine ends. When there is an output buffer, the driver 32 writes data in the output buffer for the corresponding communication board 5 in the MCC 1 based on the parameters of the FPL 33. The driver 32 outputs the return code to the application program 31 at time t ₆ and notifies the application program 31 of the writing. In MCC1, the process proceeds to step 5.

In step 5, the data is output to the corresponding communication module 4 via the bus buffer 28. In step 6, it is determined whether or not the data output is normally performed. If the output is normally performed, the process returns to step 4, and the output of the data to the communication module 4 is continued until all the data in the buffer 34 of the application program 31 is output.

If an output abnormality is detected in step 6, the process proceeds to step 7 and an abnormality notice is output to the host computer 3 to end this routine. The abnormality notification output to the host computer 3 is input to the application program 31 via the driver 32, and recovery such as retry is performed. According to such a configuration, the MCC1 having the input buffer and the output buffer and executing the data communication based on the input / output request from the host computer 3 is provided between the host computer 3 and the communication modules 4-1 to -8. With the provision, the MCC 1 inputs and outputs communication data, which is conventionally managed by the host computer 3, so that the load on the host computer 3 is reduced. If data is input to the input buffer of MCC1, the host computer 3 can input data from MCC1 when input is possible. If data is output from the host computer 3 to the output buffer of MCC1, MCC1 Outputs data to the communication module 4, the data communication is not affected by the capability of the host computer 3 even if the control of the controlled objects other than the communication module 4 is increased, and the data communication for the plurality of communication modules is processed at high speed. You can Even if the host computer 3 is connected to the communication module 4 via the MCC 1, it behaves as if it directly accesses the communication module 4 as its own communication channel, so that the processing speed of the system is not impaired and high speed is achieved. Intelligent communication can be realized.

In this embodiment, a module having a communication function is connected to the bus buffer 28 (8 bit system).
A module having an 8-bit sub-host function may be connected. That is, in FIG. 8, an 8-bit microcomputer 5 having a sub-host function is connected to the MCC 1 as a communication module 4, and an 8-bit user module 7-1 to n is connected to the microcomputer 5 via a local bus 6. ..

With such a configuration, the 8-bit type user assets that have been conventionally used can be taken over as they are in the 32-bit type, and a flexible and inexpensive system can be provided. Also, it is obvious that the same effect as described above can be obtained by applying such an idea to a 16-bit system, that is, by making the bus buffer 28 a 16-bit system.

[0024]

As described above, according to the present invention, a multi-channel controller which has an input buffer and an output buffer and manages the input / output of communication data based on the input / output request from the host computer is used as the host computer. By installing between multiple communication modules,
Data communication can be performed for a plurality of communication channels without being affected by the capacity of the host computer, and the load on the host computer is reduced. Even if the host computer has a configuration through a multi-channel controller, it can be regarded that the communication module is directly accessed as a communication channel, and high-speed intelligent communication can be realized without impairing the processing operation of the system.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of the present invention.

FIG. 2 is a system diagram showing an embodiment of the present invention.

3 is a block circuit diagram of the multi-channel controller of FIG.

4 is a block diagram of the host computer of FIG.

5 is a flowchart showing the operation of FIG.

6 is a flowchart showing the operation of FIG.

7 is a timing chart of FIG.

FIG. 8 is a system diagram showing another embodiment of the present invention.

[Explanation of symbols]

 1 multi-channel controller (MCC) 2 VMEbus 3 host computer 4 communication module 21 CPU

Claims (1)

[Claims] 1. A system for performing data communication by connecting a plurality of communication modules to one host computer, and an input buffer for storing data input from the communication module and an output buffer for storing data output from the host computer. An input unit for inputting data from the communication module to a corresponding input buffer when a data input interrupt is received from the communication module; When there is from the computer, a data status notifying means for detecting whether there is data from the communication module in the input buffer and notifying the host computer of the data in the input buffer and the presence / absence status thereof; There is a request to output the specified data. When detecting, whether or not there is a storage area in the output buffer corresponding to the communication module,
Output buffer status notifying means for notifying the host computer of the status of the output buffer; and output means for writing data to the output buffer and outputting the data to a corresponding communication module when a storage area remains in the output buffer. , A multi-channel controller characterized by.