JPH05328232A - Ccd type solid-state image pickup element - Google Patents

Abstract

PURPOSE:To provide the CCD solid-state image pickup element having an electronic shutter function while keeping low power consumption. CONSTITUTION:A high voltage is impressed to a substrate to allow a storage signal of a photo diode to be swept out to the substrate for horizontal blanking periods whose number is less than one or all remaining horizontal blanking periods including a horizontal blanking period just before a charge storage period among remaining horizontal blanking periods except the charge storage period in the CCD solid-state image pickup element at an electronic shutter operation. Since number of times to sweep out the storage charge in the photo diode at the electronic shutter operation to the substrate in the shutter operation is reduced, power consumption is reduced and production of a white level flaw at impression of a high voltage to the substrate is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CCD type solid-state image pickup device, and more particularly to a technique effective for use in a device having an electronic shutter function.

[0002]

2. Description of the Related Art The electronic shutter function in a solid-state image pickup device using a CCD is described in "IT-CCD image pickup device with variable speed electronic shutter" in the conference proceedings of the National Conference of the Television Society of February 1988. A method has been proposed in which a high voltage is applied to the substrate during the ranking period to sweep out unnecessary charges to the substrate side. Further, this is also a structure in which excess blooming charges generated when a high-luminance object is photographed are swept out by applying a predetermined DC voltage to the substrate side.

[0003]

In the above CCD type solid-state image pickup device, the power consumption becomes large during the operation of the electronic shutter. As a result of examining the cause, it has been clarified by the study of the inventor of the present invention that the cause is as follows. That is, as shown in the timing chart of FIG. 4, the accumulated charge of the photodiode generates a high voltage pulse for each horizontal blanking period and supplies it to the substrate except the charge accumulation time. The substrate has a relatively large parasitic capacitance, and when the electronic shutter operates, the substrate is raised to a high voltage of about 25 V and returned to the ground potential of the circuit again, so that a relatively large current is consumed.

The inventor of the present application has considered to reduce the power consumption by paying attention to the fact that it is sufficient to sweep out the accumulated charge of the photodiode only immediately before the charge accumulation period for the electronic shutter operation. .

An object of the present invention is to provide a CCD type solid-state image pickup device having an electronic shutter function while maintaining low power consumption. The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0006]

The outline of the representative one of the inventions disclosed in the present application will be briefly described as follows. That is, of the remaining horizontal blanking periods excluding the charge accumulation period in the CCD type solid-state imaging device during the electronic shutter operation, the number of 1 to all the above horizontal blanking periods including the horizontal blanking period immediately before the charge accumulation period. In a smaller number of horizontal blanking periods, a high voltage is applied to the substrate to sweep out the accumulated signal of the photo diode to the substrate side.

[0007]

According to the above-mentioned means, the number of times the accumulated charges of the photo diode are swept out to the substrate side during the operation of the electronic shutter can be reduced, so that the power consumption can be reduced and the occurrence of the white flaw due to the application of the high voltage to the substrate. Can be reduced.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 3 is a schematic circuit diagram of an embodiment of a CCD type solid-state image pickup device to which the present invention is applied. In the figure, in order to facilitate understanding of the CCD type solid-state image pickup device itself, photodiodes D1 to D4 each consisting of a total of four elements in two rows and two columns are shown as a representative example. Gates and drains are omitted. In an actual CCD type solid-state image sensor, photodiodes are arranged in a matrix in a plurality of rows and a plurality of columns,
As is well known, a large number of photodiodes such as about 200,000 to about 400,000 are provided.

An anode side of the photodiode D1 is connected to a ground potential point of the circuit, a photogate (hereinafter simply referred to as PG gate) is provided on a cathode side, and a photoelectrically converted signal charge is a vertical CCD (hereinafter abbreviated as VCCD). V1
Transferred to the gate. Another photodiode D2 in the same row
Are transferred to the V3 gate of the VCCD via the PG gate. The photodiodes D3 and D4 in the other columns are also connected to the corresponding V1 and V of the VCCD via the PG gate similarly to the above.
Transferred to 3 gates.

The signal charge at the final stage of the VCCD is a horizontal CC.
D (hereinafter abbreviated as HCCD). HCCD
Performs a high-speed charge transfer operation in synchronization with the transfer pulses H1 and H2 until the next signal charge is transferred from the VCCD, and transfers the signal charge to the detection capacitor C that converts it into a voltage signal. OG provided in the output part of the HCCD is an output gate, and acts so that the signal charge of the HCCD is smoothly transferred to the detection capacitor C.

The capacitance C converts the signal charge into a voltage signal. This voltage signal is FDA (Floating Diffusi)
The signal is amplified by a preamplifier PA called "on amplifier" and sent from the output terminal OUT. When the signal charge transferred to the detection capacitor C is output as a voltage signal through the preamplifier PA, the reset MOSFE is reset.
TQ1 resets every pixel, in other words, it is swept out. RG is a reset gate pulse and RD is a reset voltage.

The outline of the signal charge reading operation of the CCD solid-state image pickup device will be described below. When the PG pulse is set to the high level, V1 of the VCCD connected to the PG gate
The gate and the V3 gate are set to the high level. As a result, the photoelectric conversion charges of the photodiodes D1 and D2 (D3 and D4) are read out to the V1 and V3 gates of the VCCD.

For example, in the odd field, the V2 gate is set to the high level. As a result, the signal charges under the V1 and V3 gates are mixed and temporarily collected under the V2 gate. Thereafter, the V3 gate is set to the high level at the next timing, and the V4 gate is set to the high level at the next timing, so that the signal charges are transferred downward. Below, V1
Each gate is set to a high level in the order of .about.V4, and the photoelectric conversion charges converted by the photodiode arranged above the gate are transferred in the same manner as above.

In the even field, V4 is set to the high level in place of the above V2 gate. As a result, the signal charges under the V3 and V1 gates are mixed with a shift of one row, and V4 is mixed.
Collected once under the gate. Hereinafter, the V1 gate becomes high level at the next timing, and V1 at the next timing.
The two gates are set to the high level and the signal charges are transferred downward. In this way, interlaced readout is equivalently performed by shifting the combination of signal charges in the odd field and the even field by one row.

FIG. 1 is a timing chart for explaining one embodiment of the electronic shutter operation of the CCD type solid-state image pickup device. The signal charge of the photodiode is generated by the timing pulse PG generated for each field.
It is read out to the vertical CCD through the photogate. This one
With the field period as the maximum sensitivity, in other words,
The charge storage time of the photo diode is determined as the maximum shutter time 1/60.

During operation of the electronic shutter, the accumulated charge of the photodiode is swept out to the substrate side. For example, when the 4H period is used as the charge accumulation time as shown in the figure, a high voltage pulse SP of about 25V is supplied to the substrate only in the immediately preceding horizontal blanking (horizontal blanking) period. Thus, in the field immediately before, the accumulated charge FD of the photodiode is read by the vertical CCD by the timing pulse PG and then accumulated in the photodiode until the electronic shutter control timing pulse SP is generated. The unnecessary charges FD are swept out to the substrate side all at once.

By adopting such a configuration, it is possible to minimize the power consumption during the operation of the electronic shutter. That is, in the case of a CCD type solid-state image pickup device of about 130,000 pixels in the 1/3 inch format, the parasitic capacitance on the substrate is about 800 pF, which is relatively large. The vertical CCD has a large number of stages of about 500. Therefore, the fastest shutter time is 1/60 × 500 = 1/30000.
Conventionally, with such a maximum shutter operation time,
Since charging / discharging with a high voltage pulse SP such as 25V is repeatedly performed for a capacity of about 800 pF 60 × 500 times per second, about 7.6 mW is calculated from the equation of P = CV ² f / 2. It will consume electricity. On the other hand, in this embodiment, since the high voltage pulse SP is supplied only once per field as described above, it is possible to simply reduce the power consumption to 1/500.

By supplying a high voltage to the substrate as described above, a vertical CCD and a horizontal CC operating in parallel with the high voltage are supplied.
Although a white defect on the screen is adversely affected by adversely affecting the signal component read out through D, the white defect can be substantially prevented by supplying the high voltage pulse SP only once as described above. .

FIG. 2 is a timing chart for explaining another embodiment of the electronic shutter operation of the CCD type solid-state image pickup device. As described above, the signal charge FD of the photodiode is generated by supplying the high voltage pulse SP once.
When the charge is discharged to the substrate side, when the charge accumulation time is short, in other words, when the shutter time is short, the signal unnecessary period occupying one field becomes long in inverse proportion, and the signal charge amount to be swept out. There is a possibility that the FD will increase and a defective sweeping may occur.

In this embodiment, immediately before the charge accumulation time and 1
The high voltage pulse SP is generated twice before,
The accumulated charge FD of the photodiode is swept out to the substrate side. That is, most accumulated charge FD of the photodiode is swept out by the first high voltage pulse SP. Then, the residual charge and the accumulated charge FD generated in the 1H period are swept out by the second high voltage pulse SP. Even if the pulse is generated twice as described above, the current consumption can be reduced to 1/250 at the maximum shutter speed of the electronic shutter operation as compared with the conventional one.

The number of times the high voltage pulse SP is generated may be determined in inverse proportion to the charge storage time. That is, when the charge storage time per field is short,
In inverse proportion to this, the unnecessary storage period becomes longer, and the accumulated charge FD that needs to be swept out increases. Therefore, when such an accumulated charge amount FD is large, the number of high voltage pulses supplied to the substrate is increased to completely sweep out the unnecessary charges FD of the photodiode, and when the accumulation time is small, a high voltage pulse supplied to the substrate. Reduce the number to reduce power consumption. The number of such high voltage pulses is, for example, vertical C
The CD is divided into four equal parts, the high voltage pulse is made once during the transfer operation up to 1/4, and twice during the transfer operation between 1/4 and 2/4. It is set to 3 times during the transfer operation from 4 to 3/4 and 4 times during the transfer operation after 3/4. The number of transfer operations as described above can be easily determined by a counter that counts the drive pulses of the vertical CCD and a decode signal of the count output of the upper 2 bits.

The operational effects obtained from the above embodiment are as follows. That is, (1) Of the remaining horizontal blanking periods excluding the charge accumulation period in the CCD type solid-state imaging device during the electronic shutter operation, 1 to all the above horizontal blanking periods including the horizontal blanking period immediately before the charge accumulation period. By applying a high voltage to the substrate and sweeping out the accumulated signal of the photo diode to the substrate side in the horizontal retrace period that is less than the number of periods, it is possible to reduce the number of times the accumulated charge of the photo diode is swept to the substrate side. As a result, it is possible to obtain the effect of reducing the power consumption during the operation of the electronic shutter.

(2) Due to the above (1), it is possible to obtain an effect that white scratches caused by applying a high voltage to the substrate can be significantly reduced.

(3) The number of times for applying a high voltage to the substrate to sweep out the accumulated signal of the photodiode to the substrate is inversely proportional to the length of the charge accumulating period in the horizontal blanking period including the immediately preceding horizontal period. By deciding the number, it is possible to obtain an effect that the power consumption can be reduced and unnecessary charges of the photodiode can be swept out rationally.

Although the invention made by the present inventor has been specifically described based on the embodiments, the invention of the present application is not limited to the embodiments and various modifications can be made without departing from the scope of the invention. Needless to say. For example, the sweeping out of unnecessary charges during the electronic shutter operation is performed by dividing the unnecessary period into equal parts and including the horizontal blanking period immediately before the charge accumulation period so as to be performed once every plural horizontal blanking periods. It may be. INDUSTRIAL APPLICABILITY The present invention can be widely used for a CCD type solid-state image pickup device having an electronic shutter function by sweeping accumulated charges of photodiodes to the substrate side.

[0026]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows. That is, of the remaining horizontal blanking periods excluding the charge accumulation period in the CCD type solid-state imaging device during the electronic shutter operation, the number of 1 to all the above horizontal blanking periods including the horizontal blanking period immediately before the charge accumulation period. By applying a high voltage to the substrate in a smaller number of horizontal blanking periods to sweep the accumulated signal of the photo diode to the substrate side, the number of times the accumulated charge of the photo diode is swept to the substrate side can be reduced. The power consumption can be reduced.

[Brief description of drawings]

FIG. 1 is a timing chart showing an embodiment of an electronic shutter operation of a CCD type solid-state image pickup device according to the present invention.

FIG. 2 is a timing chart showing another embodiment of the electronic shutter operation of the CCD type solid-state image pickup device according to the present invention.

FIG. 3 is a schematic circuit configuration diagram showing an embodiment of a CCD type solid-state image pickup device to which the present invention is applied.

FIG. 4 is a timing chart for explaining an example of a conventional electronic shutter operation.

[Explanation of symbols]

VCCD ... Vertical CCD, HCCD ... Horizontal CCD, PA ...
Preamplifier, D1 to D4 ... Photodiode, Q1 ... MO
SFET, C ... Detection capacitance.

Claims (2)

[Claims] 1. A vertical CCD for reading and transferring signal charges formed by a photodiode, and this vertical CCD.
Of the horizontal CCD that receives the signal charges transferred from the parallel in parallel and outputs them serially, and among the remaining horizontal blanking periods excluding the charge accumulation period, 1 to all of the remaining ones including the horizontal blanking period immediately before the charge accumulation period. CCD-type solid-state imaging device having an electronic shutter function for applying a high voltage to the substrate and sweeping out the accumulated signal of the photo diode to the substrate side in the number of horizontal blanking periods smaller than the number of horizontal blanking periods element. 2. The operation of applying a high voltage to the substrate to sweep out the accumulation signal of the photodiode to the substrate is performed in inverse proportion to the length of the charge accumulation period when the number of horizontal blanking periods including the immediately preceding horizontal period is increased. The CCD type solid-state image pickup device according to claim 1, which is determined.