JPH05324950A - Logical card for information processor - Google Patents

Abstract

PURPOSE:To write or read error information to a non-volatile memory corresponding to a command from a diagnostic processor by providing this non- volatile memory for recording the error information in the logical card. CONSTITUTION:Even when any fault is generated at a service processor 48 or at an interface circuit between the service processor 48 and a diagnostic processor 49, the error information can be sampled. Since it is not necessary to send the list of error information or any flexible disk medium to a repair section, the repair can be prevented from being disabled by missing the transmission or losing the list of error information or the flexible disk medium. Further, when plural errors are detected in one fault and plural logical cards 54-1 to 54-n are exchanged at the same time, lists or flexible medium 51 for the error information are unified, and the trouble of separating the logical cards 54-1 to 54-n during the transmission to the repair section or complicating correspondence between the logical cards and the lists or flexible disk medium 51 of the error information because of mixing with the other logic card can be eliminated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a logic card having a plurality of logic circuits mounted therein and incorporated in an information processing apparatus to form a part of the information processing apparatus.

[0002]

2. Description of the Related Art FIG. 2 is a block diagram showing an example of a logical card of a conventional information processing apparatus, and FIG. 3 is a block diagram showing a connection state of logical cards in the information processing apparatus.

A logic card, which is mounted in an information processing apparatus by mounting a plurality of logic circuits and constitutes a part of the information processing apparatus, is connected in the information processing apparatus as shown in FIG. That is, the logic cards 54-1 and 54-2
54-n are connected in parallel to the diagnostic bus 14 connected to the diagnostic processor 49, and
9 is connected to the service processor 48. The diagnostic processor 49 uses the logic cards 54-1 and 54-2 to 5-5.
Control when a 4-n fault occurs and collect error information. The diagnostic bus 14 is a signal line including a data bus that collects control signals from the diagnostic processor 49 and error notification signals and error information from the logic cards 54-1 and 54-2 to 54-n.

The service processor 48 controls the operations of the display device 50 for outputting and displaying error information, the flexible disk device 51 and the printer device 52. It also controls the magnetic disk device 53 to exchange error information between the logic cards 54-1 and 54-2 to 54-n and the diagnostic processor 49, and to control the storage operation in the magnetic disk device 53. ..

As shown in FIG. 2, the logic card 31 of the conventional information processing apparatus has a plurality of logic circuits 32-1 and 32-2.
To 32-n and logic circuits 32-1 and 32-2 to 32-n
Error detection circuits 35 provided corresponding to the respective
-1, 35-2 to 35-n and error detection circuit 35-1
.35-2 to 35-n correspond to logic circuits 32-1.3
When the error 2-2-32-n is detected, the logic circuit 3
The operations of the 2--1, 32-2 to 32-n are stopped, the occurrence of an error is reported to the diagnostic processor 49, and the logic circuits 32-1 and 32-- are instructed by the diagnostic processor 49.
2 to 32-n, and error control circuit 39 for controlling the operation to restart, and monitor signals 2-1 and 2-2 to 2-n output from logic circuits 32-1 and 32-2 to 32-n, respectively.
And error detection signals 5-1 and 5-2 output from the error detection circuits 35-1 and 35-2 to 35-n, respectively.
Selection circuit 38 which inputs ~ 5-n and selects one of them, an output circuit 40 which outputs the error information selected by the selection circuit 38 to the diagnostic processor 49, the selection circuit 38 and the output circuit And a read control circuit 41 for controlling the operation of 40.

When a failure occurs in the logic circuit 32-1 in the logic card 31 configured as described above, the error detection circuit 35-1 monitoring the monitor signal 2-1 outputs the error detection signal 5-1. Output. Error detection circuit 35-
The monitoring of the monitor signal 2-1 in 1 corresponds to the operation characteristic of the logic circuit 32-1 among the data parity check, the validity of the order of signal output, and the output time of the output signal. It is done by the means. The error detection signal 5-1 is input to the error control circuit 39, and the error control circuit 39 outputs the error report signal 13 to the diagnostic bus 14 and the hold request signal 1 to output the logic circuit 32-1. -Stop the operation of 32-2 to 32-n and hold the state of the monitor signals 2-1-2-2 to 2-n.

Error report signal 13 via diagnostic bus 14
The diagnostic processor 49 that has received the signal outputs the read control signal 11 to the read control circuit 41 via the diagnostic bus 14. The read control circuit 41, to which the read control signal 11 is input, selects one signal from the monitor signals 2-1.2-2 to 2-n and the error detection signals 5-1.5-2 to 5-n. Selection signal 8 to the selection circuit 38 for
The read enable signal 9 to the output circuit 40 is output.
As a result, the error information selected by the selection circuit 38 is sent to the diagnostic processor 49 via the output circuit 40.

This operation is performed by monitoring signals 2-1, 2-2-2.
2-n and error detection signals 5-1, 5-2 to 5-n are repeated until all the states are read. After this, logic card 3
The data read by the diagnostic processor 49 from 1 is sent to the service processor 48, and the service processor 48
Causes the magnetic disk device 53 to store the data.

On the other hand, the diagnostic processor 49 sends the logic state of each logic circuit and each error detection circuit to the service processor 48 not only from the faulty logic card 31 but also from the other logic card in the above procedure. The service processor 48 also receives those data from the magnetic disk device 5.
Store in 3.

The diagnostic processor 49 outputs the re-operation instruction signal 12 to the error control circuit 39 when the last data is stored in the magnetic disk device 53 of the service processor 48. As a result, each logic circuit 32-1
32-2 to 32-n are the monitor signals 2-1 held
-The state of 2-2 to 2-n is set as the initial state and the logical operation can be restarted.

When a failure occurs in the logic card 54-1, maintenance work is performed according to the following procedure. That is, the magnetic disk device 5 connected to the service processor 48.
The error information stored in 3 is read, edited, and output to the display device 50 or the printer device 52. The output error information is analyzed, and the logic card 54-1 having the cause of failure, which is found as a result, is replaced with a new one. Depending on the content of the error information, a plurality of logical cards may be exchanged.

After this, a list of error information output to the printer device 52 or the flexible disk device 5
The flexible disk medium recording the error information output to 1 is attached to the replaced logic card 54-1 and sent to the repair department.

The repair department carries out a reproduction test of the failure that has occurred. In the case of a fixed failure reproduced by this test, a list of error information attached to the logic card 54-1 or error information output from the flexible disk medium attached to the logic card 54-1 After confirming the same failure by comparing with the list of, the failed component is identified from the reproduced phenomenon and the logic card 5
Repair 4-1.

In the case of a non-fixed (intermittent) failure not reproduced by the reproduction test, a list of error information attached to the logic card 54-1 or the logic card 54-1
The failure part is identified by analyzing the list of error information output from the flexible disk medium attached to the above, and the logic card 54-1 is repaired.

[0015]

As described above, the logic card of the conventional information processing apparatus has a list of error information attached to the logic card when repairing a failure or the contents of the flexible disk medium. However, in the case of an intermittent failure, there is a problem that the analysis becomes impossible due to the following problems.

(1) In the list of error information or flexible disk medium attached for repairing a failure,
Error information may not be collected due to a failure of the service processor or a failure of the interface circuit between the service processor and the diagnostic processor.

(2) The list of error information or the flexible disk medium may be forgotten to be sent to the repair department or may be lost during transportation.

(3) When a plurality of errors are detected by one failure and a plurality of logical cards are replaced at the same time, a list of those error information or a flexible disk medium becomes one and is being sent to the repair department. In some cases, the logical card may be separated from the logical card, or may be mixed with other logical cards and the correspondence between the logical card and the error information list or the flexible disk medium may not be known.

[0019]

A logic card of an information processing apparatus according to the present invention includes a plurality of logic circuits and a plurality of error detection circuits provided corresponding to the plurality of logic circuits, respectively.
In the logic card of the information processing device, which includes an error control circuit for temporarily suspending the operation state of the logic circuit and resetting and starting the update of the error detection circuit by an external command, an error from the error detection circuit A non-volatile memory that stores error information when a detection signal is detected, a selection circuit that selects error information that is input to the non-volatile memory, and an instruction from the outside to give a command to the selection circuit A memory write control circuit that writes error information to the nonvolatile memory and a memory read control circuit that reads the error information from the nonvolatile memory according to a command from the outside and outputs the error information to the outside are provided.

[0020]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention.

The logic card 30 shown in FIG. 1 includes a plurality of logic circuits 3 mounted to realize the functions of the logic card.
2-1, 32-2 to 32-n and logic circuits 32-1.3
A plurality of error detection circuits 35-1, 35-2 to 35-n provided corresponding to each of 2-2 to 32-n and the error detection circuits 35-1 to 35-2 to 35-n correspond to each other. When an error in the logic circuit 32-1, 32-2 to 32-n is detected, the operation of the logic circuit 32-1, 32-2 to 32-n is stopped and an error occurrence is reported to the diagnostic processor. In addition, the error control circuit 39 for reactivating the logic circuits 32-1, 32-2 to 32-n according to an instruction from the diagnostic processor, and the logic circuits 32-1, 32-2 to 32-n.
Monitor signals 2-1 ・ 2-2-2-n and error detection signals 5-1 ・ 5-2-5-n output from error detection circuits 35-1, 35-2 to 35-n And a non-volatile memory 43 for storing the information selected by the selection circuit 38.
The memory address generation circuit 46 for giving the memory address 19 to the non-volatile memory 43, and the write request signal 26 sent from the diagnostic processor via the diagnostic bus 14 select the content to be written to the non-volatile memory 43. Selection signal 8 sent to the selection circuit 38 for writing, and the write enable signal 1 sent to the output circuit 42 to write the information selected by the selection circuit 38.
5, and a memory write control circuit 47 that outputs the write permission signal 15 to be sent to the nonvolatile memory 43.
In response to the read request signal 24 sent from the service processor via the diagnostic processor and the diagnostic bus 14, the read address 21 sent to the address generation circuit 46 and the read address sent to the nonvolatile memory 43. An instruction signal 20 and a memory read control circuit 45 for outputting the read permission signal 18 to be sent to the output circuit 44 are provided.

Next, the operation of the logic card configured as described above will be described.

When the logic circuit 32-1 in the logic card 30 has a failure, the monitor signal 2-1 from the logic circuit 32-1.
The error detection circuit 35-1 monitoring the error signal outputs the error detection signal 5-1. The monitoring of the monitor signal 2-1 in the error detection circuit 35-1 is performed by monitoring the logical operation of the logic circuit 32-1 such as data parity monitoring, signal output validity monitoring, and signal output time monitoring. Appropriate means are used depending on the characteristics.

The error detection signal 5-1 is input to the error control circuit 39, and the error control circuit 39 outputs the error report signal 13 to the diagnostic bus 14 and the logic circuit 32.
The hold request signal 1 is output to the 1-32-2 to 32-n to stop their operation, and the monitor signal 2-1.
The state of 2-2 to 2-n is maintained.

At the same time, other logic cards connected to the diagnostic bus 14 also receive the error report signal 13
Is output to the diagnostic bus 14, the operation of the logic circuit in the logic card is stopped and the state of the monitor signal is held.

Error report signal 1 via diagnostic bus 14
The diagnostic processor 49, to which 3 is input, writes the write command signal 2
6 is output to the diagnostic bus 14. A memory write control circuit 47 to which the write command signal 26 is input via the diagnostic bus 14.
Sends a selection signal 8 to the selection circuit 38 to send monitor signals 2-1, 2-2 to 2-n or an error detection signal 5-1.
Select any one of the signals 5-2 to 5-n, send the write address 22 to the memory address generation circuit 46, send the write enable signal 15 to the output circuit 42, and write instruction signal 16 To the non-volatile memory 43.

The memory address generation circuit 46, to which the write address 22 is input, outputs the memory address 19 to the non-volatile memory 43 to write the first error information sent from the output circuit 42. The memory write control circuit 47 sets the write address 22 to (+1), outputs the selection signal 8, the write enable signal 15, and the write instruction signal 16 again, and causes the nonvolatile memory 43 to write the second error information. This operation is repeated until the logic card 30
Of the monitor signals 2-1 ・ 2-2-2-n and the error detection signals 5-1 ・ 5-2-5-n are written in the nonvolatile memory 43. When this write operation is completed, the memory write control circuit 47 sends the write completion report signal 27 to the diagnostic processor 49 via the diagnostic bus 14.
Is output.

During this period, the diagnostic processor 49 detects the monitor signal and error of the logical card in the non-volatile memory of each logical card by the above-mentioned procedure for other logical cards other than the logical card 30 which has detected the error. Write the logic state of the signal. Since the write command signal sent from the diagnostic processor 49 via the diagnostic bus 14 is sent regardless of the states of other logic cards, the write operation to the non-volatile memory in each of the above logic cards is performed almost at the same time. Be seen.

When the write completion report signal is input from all the logic cards, the diagnostic processor 49 receives the diagnostic bus 1
A re-operation instruction signal 12 is sent to each logic card via 4 to enable each logic circuit whose operation is stopped and to initialize the state of the monitor signal.

When the failure content of the logic circuit is fixed, the logic card 30 does not operate normally even after the restart instruction signal 12 is input unless the logic card 30 is replaced. At this time, the failure is processed by the following procedure.

Since error information is stored in the non-volatile memory of the logic card, the maintenance person outputs the error information to the display device 50 or the printer device 52, analyzes it, and judges that there is a failure. Replace the logic card 30 available. At this time, the display device 50 instructs the service processor 48 to collect error information. The service processor 48 requests the diagnostic processor 49 to read the error information. When the diagnostic processor 49 receives the error information read request from the service processor 48, the diagnostic processor 49 outputs a read request signal 24 to the logic card 30 via the diagnostic bus 14.

The memory read control circuit 45 in the logic card 30 inputs the read request signal 24, sends the read address 21 to the memory address generation circuit 46, sends the read permission signal 18 to the output circuit 44, and issues a read instruction. The signal 20 is sent to the non-volatile memory 43.

The memory address generation circuit 46, to which the read address 21 is input, outputs the memory address 19 to the non-volatile memory 43, and outputs the leading error information from the output circuit 42 via the data bus 17. The memory read control circuit 45 sets the read address 21 to (+1),
The read address 21, the read permission signal 18, and the read instruction signal 20 are output again, and the second error information is read from the nonvolatile memory 43. Repeat this operation,
All the information stored in the non-volatile memory 43 of the logic card 30 is read.

The error data 23 output from the output circuit 42 is sent to the diagnostic processor 49 via the diagnostic bus 14. The diagnostic processor 49 sends this to the service processor 48, which edits it and outputs it to the display device 50 or the printer device 52. The maintenance person analyzes the output error information, replaces the logic card 30 that can be determined to have failed, and sends it to the repair department.

If the failure content of the logic circuit is not a fixed failure, after the writing of the error information to the non-volatile memory 43 is completed, the logic card 30 outputs the restart instruction signal 1
2 works normally. In this case, during the periodic maintenance work, the above-mentioned error information reading operation is performed, the error information output to the display device 50 or the printer device 52 is analyzed, and the logic card 30 that can be determined to have failed is replaced and repaired. Send to department.

Repair of the replaced logical card is performed as follows. That is, the repair department outputs the error information list to the printer device 52 and prints it or outputs the error information to the flexible medium of the flexible disk device 51 in advance in the same procedure as described above.

After that, an operation test for reproducing the failure of the logic card is performed. If a fixed failure appears in this reproduction operation test, it is confirmed that the failure has the same content as the error information output earlier, and then the failed component is specified to repair the logic card.

In the case of a non-fixed failure that does not appear in the reproduction operation test, or in the case of a failure that has appeared but is different from the content of the error information, the error information output to the printer device 52 or the flexible medium of the flexible disk device 51 is printed. The output error information is analyzed, and then the failed component is specified to repair the logic card.

[0040]

As described above, the logic card of the information processing apparatus of the present invention is provided with a non-volatile memory for recording error information in the logic card, and the non-volatile memory is stored in the non-volatile memory according to a command from the diagnostic processor. By being able to write and read error information, it is possible to collect error information even if there is a failure in the service processor or a failure in the interface circuit between the service processor and the diagnostic processor. There is. Further, since it is not necessary to send the error information list or the flexible disk medium to the repair department, there is an effect that it is possible to prevent the error information list or the flexible disk medium from being unrepairable due to forgetting or missing. Furthermore, when multiple errors are detected in one failure and multiple logical cards are replaced at the same time, the list of error information or flexible disk media becomes one, and the logical cards are transferred during sending to the repair department. There is also an effect that it is possible to prevent the situation where the correspondence between the logical card and the error information list or the flexible disk medium is lost due to being separated or mixed with other logical cards.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing an example of a logical card of a conventional information processing apparatus. It is a figure.

FIG. 3 is a block diagram showing a connection state of logical cards in the information processing apparatus.

[Explanation of symbols]

1 Hold request signal 2-1 ・ 2-2-2-n Monitor signal 5-1 ・ 5-2-5-n Error detection signal 8 Selection signal 9 ・ 18 Read enable signal 10 Read data 11 Read control signal 12 Re-operation Command signal 13 Error report signal 14 Diagnostic bus 15 Write enable signal 16 Write command signal 17 Data bus 18 Read enable signal 19 Memory address 20 Read command signal 21 Read address 22 Write address 23 Error data 24 Read request signal 26 Write request signal 27 Write Completion report signal 30/31 / 54-1 / 54-2 to 54-n Logic card 32-1 / 32-2 to 32-n Logic circuit 35-1 / 35-2 to 35-n Error detection circuit 38 Selection circuit 39 Error control circuit 40/42/44 Output circuit 41 Read control circuit 43 Non-volatile memory 45 memory read control circuit 46 a memory address generating circuit 47 a memory write control circuit 48 the service processor 49 diagnostic processor 50 display device 51 a flexible disk unit 52 the printer 53 a magnetic disk device

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H03K 19/00 8941-5J // G06F 11/22 360 E 8323-5B

Claims (2)

[Claims] 1. A plurality of logic circuits, and a plurality of error detection circuits provided corresponding to each of the plurality of logic circuits,
In the logic card of the information processing device, which includes an error control circuit for temporarily suspending the operation state of the logic circuit and resetting and starting the update of the error detection circuit by an external command, an error from the error detection circuit A non-volatile memory that stores error information when a detection signal is detected, a memory write control circuit that writes the error information to the non-volatile memory by an external command, and the error from the non-volatile memory by an external command A logic card for an information processing device, comprising: a memory read control circuit for reading information and outputting it to the outside. 2. A plurality of logic circuits, and a plurality of error detection circuits provided corresponding to each of the plurality of logic circuits,
In the logic card of the information processing device, which includes an error control circuit for temporarily suspending the operation state of the logic circuit and resetting and starting the update of the error detection circuit by an external command, an error from the error detection circuit A non-volatile memory that stores error information when a detection signal is detected, a selection circuit that selects error information that is input to the non-volatile memory, and an instruction from the outside to give a command to the selection circuit Information processing, comprising: a memory write control circuit for writing error information into the non-volatile memory; and a memory read control circuit for reading the error information from the non-volatile memory according to a command from the outside and outputting the error information to the outside. Device logic card.