JPH05317505A - Data processor at service interruption time - Google Patents

Abstract

PURPOSE:To provide a data processor at the time of service interruption for detecting exactly a fact that storage data stored in a volatile storage means becomes unreadable due to a service interruption, or a fact that, even if it remains satisfactorily at the time when a power source is restored, a service interruption time exceeding the prescribed time is precisely detected, and executes sure erasure of the storage data only when one condition thereof is satisfied. CONSTITUTION:The data processor is provided with a timepiece IC 15 operated even at the time of service interruption by a backup power source 16, and a processing means 13 for receiving a service interruption signal inputted from the outside at the time of service interruption and writing prescribed identification data in a storage means 12, erasing storage data, in the case the identification data cannot be read out of the storage means 12, when a power source is restored, and erasing the storage data only when the counting value of the timepiece IC 15 exceeds a prescribed time, in the case the identification data can be read out.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is such that stored data such as daily total data at a pachinko game hall cannot be read due to a power failure (including artificial power interruption), or remains well when the power is restored. The present invention also relates to a data processing device during a power failure, which detects that the power failure time exceeds a predetermined time and erases the stored data when any of these conditions is satisfied.

[0002]

2. Description of the Related Art In a ball lending machine for pachinko games, a medal lending machine for various game machines, or a money changer, various kinds of totaling such as the number of coins deposited, lent out, and the number of medals are performed on a daily basis. , These daily total data are stored in the RAM and retrieved as needed. Then, this daily total data is cleared for the new aggregation of the next day.

The daily total data is programmed to be cleared after a lapse of a predetermined time (t) after the machine stops operating. Normally, for example, around 10 pm,
After the end of business hours, the daily total data will be cleared around 2:00 pm, which is about two hours after the operation of the machine was completed.

Therefore, conventionally, the time after the power supply is cut off is counted and the predetermined time t is detected. By the way, the power-off operation may occur due to some accident in addition to the case where the operator intentionally performs it. In this case, most of the time, the power supply is restored in a short time, and the time after the power supply is cut off is shorter than the predetermined time t. In such a case, it is inconvenient to clear the daily total data when the power supply is restored. Becomes Further, even if the daily total data is not stored in a good state and cannot be read out even within the predetermined time t, it is meaningless to retain the data, so that a process of deleting the data is required. You will need it. That is, it is necessary to determine whether or not to clear the daily total data depending on the length of the power failure time (including power failure due to operator's intention and so-called power failure in a narrow sense due to accident).

The contents of a conventional data processing device during a power failure will be described with reference to FIGS. First, FIG. 5 is a block diagram of a main part. RAM2 in which daily total data is registered is CPU
The RAM 2 is built into the RAM 3, and is backed up by a large-capacity capacitor 9 called a so-called supercapacitor so that it can operate for a predetermined time determined by the CR time constant even during a power failure. A power supply circuit 7 that is operated by the switch 8 to supply power (Vcc) to the CPU 3 and output a power failure signal (Ps) to the CPU 3 immediately before a power failure, and a ROM 4 in which an operation program of the CPU 3 is registered are provided. ..

FIG. 6 is a control flow chart when the power is cut off. When there is a power failure signal (step S1), the RAM is
The identification data to that effect (for example, “1234”) is written in 2. FIG. 7 is a control flowchart when the power is turned on (when the power is restored). If the above-mentioned identification data cannot be read from the RAM 2 (step S11), it means that the RAM 2 has not already been backed up by the large capacity capacitor 9. Predetermined time determined by CR time constant (for example, 2 hours)
It is determined that the value exceeds the limit, and the daily total data is cleared (step S12). Further, if the above-mentioned identification data is written in the RAM 2 and can be read out, it means that the RAM 2 is backed up by the large-capacity capacitor 9. Therefore, it is determined that the RAM 2 is within the predetermined time determined by the CR time constant, and the daily total data is obtained. Do not clear.

[0007]

However, since the large-capacity capacitor used in the above-mentioned conventional device has a problem in the accuracy of setting the time constant, the reliability of power failure time detection is poor and the power failure time is within the predetermined time. There is a drawback in that it is difficult to perform accurate processing of holding the data in the case of and clearing the data when the power failure time exceeds a predetermined time. That is, when the CR time constant is shorter than the predetermined time due to an error, the daily power data to be saved may be cleared even though the power failure time is actually shorter than the predetermined time. When the CR time constant is longer than the predetermined time due to an error, it is determined that the identification data can be read and the daily total data should not be cleared even though the power failure time is actually longer than the predetermined time. There was a problem that it might happen.

The present invention solves the above-mentioned drawbacks of the conventional device,
An object of the present invention is to provide a data processing device at the time of power failure, which is capable of accurately determining whether or not data should be cleared by accurately performing detection such as power failure time detection.

[0009]

The gist of the present invention for achieving the above object is that the stored data stored in the volatile storage means (12) cannot be read due to a power failure. , Or even if it remains well when the power is restored, it is detected that the power failure time exceeds a predetermined time, and the stored data is erased when any of these conditions is satisfied, in a power failure data processing device, A clock IC (15) that operates even during a power failure, and a predetermined identification data is written in the storage means (12) in response to a power failure signal input from the outside during a power failure, and when the power is restored, the identification data is stored in the storage means ( 12) If the identification data can be read, the stored data is erased, and if the count value of the clock IC (15) exceeds a predetermined time, the stored data is erased. Processing means for erasing the 憶 data (1
3) The present invention resides in a data processing device at the time of power failure characterized by being provided with.

[0010]

In the power failure data processor of the present invention, the power failure time is accurately measured by the clock IC (15) which operates even during a power failure. Then, the processing means (13) receives a power failure signal input from the outside at the time of power failure, writes predetermined identification data in the storage means (12), and reads the identification data from the storage means (12) when the power is restored. If not,
When the stored data in the storage means (12) is erased and the identification data can be read from the storage means, the clock IC
Only when the count value in (15) exceeds a predetermined time, the stored data is erased.

When the backup of the storage means (12) is sufficient and the stored data remains until the power failure is restored, the identification data registered in the same storage means (12) naturally remains and can be read. The processing means (1
The process according to 3) is a process based on an accurate determination based on the power failure time accurately measured by the clock IC (15).
That is, it is determined that the stored data should be surely erased if the power failure time exceeds the predetermined time, and that the stored data should not be surely deleted if the power failure time does not exceed the predetermined time.

Further, when the stored data has disappeared or becomes unreadable by the time of power failure restoration due to insufficient backup of the storage means (12) or the like, the same storage means (12) Since the identification data registered in) is naturally in the same state and cannot be read, the determination by the processing means (13) should surely erase the stored data regardless of the time measurement result of the clock IC. Therefore, it is possible to avoid holding unnecessary data.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a data processing device at the time of power failure showing an embodiment of the present invention, and a substrate 1 forming a main part of the device.
1, a one-chip CPU 13 incorporating a battery backup RAM 12, a ROM 14 in which an operation program of the CPU 13 shown in FIGS. 3 and 4 is written, a clock IC 15,
At the time of power failure (including artificial power-off state), this watch IC1
5, a backup power source 6 for backing up the RAM 12 and the like are incorporated. A DC power supply circuit 17 is connected to the board 11.

The RAM 12 is a storage means for storing the storage data of the present invention (in this case, the daily total data). Further, the CPU 13 is constituted by a microprocessor or the like and is the processing means of the present invention. This CPU 13
Receives the power failure signal Ps input from the DC power supply circuit 17, writes predetermined identification data in the RAM 12, and when the identification data cannot be read from the RAM 12 when the power is restored, the daily total data is erased. When the identification data can be read, the daily total data is deleted only when the count value of the clock IC 15 exceeds a predetermined time.

The DC power supply circuit 17 is a DC power supply circuit which is connected to an AC power supply and applies a drive voltage Vcc to the CPU 13 by closing a switch 18, and the CPU 13 is supplied with the power failure signal PS for notifying power off and power on. Output. The power outage signal PS is the same as that in step S21 described later.
Drive voltage Vc until CPU 13 completes the processing of
In order to prevent c from falling, its output falls slightly before the power failure (power failure signal output), and its output rises when the power is turned on (power failure recovery signal output). Further, the backup power supply 16 is made up of, for example, a battery or the like having a small arrangement space.

Next, the operation will be described. The CPU 13 operates normally while the AC power of the DC power supply circuit 17 is being supplied. In other words, while receiving various data (stored data) such as the deposit amount of the ball lending machine, etc., the number of balls lent out, the number of medals at the pachinko game hall from the outside (ball lending machine etc.)
Store in M12. 2 is a time chart showing the operating time of the CPU 13, that is, the Vcc ON signal and data clear, the power failure detection timing, and the time setting timing. As shown on the left side of FIG. The power failure signal Ps is in the ON state, and the clock IC 15 does not measure the time.

Then, as shown in the central position of FIG.
When the power is cut off at time Tb (for example, 22:00), the power failure signal Ps from the power supply circuit 17 falls immediately before, and in response to this, the CPU 13 performs the processing when the power is cut off as shown in FIG. That is, if there is a power failure signal (S21), R
Identification data of the power failure signal to AM2 (for example, "1234")
(S22), the time at that time is set in the timepiece IC5, and the start of timekeeping is instructed (S23).

Next, when the power source Vcc rises as shown in the right side position of FIG. 2, the power failure signal Ps also rises, and in response thereto, the CPU 13 carries out the processing at the time of power-on (when the power is restored) shown in FIG. To do. That is, first, it is checked whether or not the identification data is in a good state in the RAM (S41),
If it cannot be read (or if it is not in a complete state), the daily total data is cleared (S32). If the identification data in the RAM 2 remains in good condition (S3
1) The clock I determines whether a predetermined time t (2 hours) has elapsed.
Judging from the contents of C5, the daily total data is cleared only when the time has elapsed (S32).

Therefore, when the RAM 12 is sufficiently backed up and the daily total data remains until the power is restored, the identification data registered in the same RAM 12 also naturally remains and can be read out. The processing is performed by an accurate determination based on the power failure time accurately measured by the IC 15. That is, the power failure time exceeds the predetermined time t (2 hours), and the time Tc (for example, 2
If it is past 4 o'clock), the daily total data will surely be deleted,
The power failure time does not exceed the predetermined time t (2 hours) and the time T
If it is before c (for example, 24:00), it is determined that the daily total data should not be surely deleted.

A backup power source 16 for the RAM 12
If the daily total data disappears or becomes unreadable by the time of power failure recovery due to consumption of below a certain level after a long time has passed, the same RAM1
The identification data registered in No. 2 is naturally in the same state and cannot be read out. Therefore, the determination by the CPU 13 is a determination that the daily total data should be surely deleted regardless of the time measurement result of the clock IC 15, Useless data retention can be avoided.

As described above, with the above apparatus, it is possible to detect the power failure time with high accuracy and process the daily total data based on the accurate judgment, and the large-capacity capacitor as in the prior art becomes unnecessary. It is also possible to reduce the size of the device.

[0022]

According to the present invention, it is accurately judged from the contents of the memory means and the contents of the clock IC whether or not the stored data is good, or whether the power failure time has exceeded the predetermined time t. As a result, the stored data can be accurately processed in the event of a power failure. Therefore, for example, daily total data at a pachinko game arcade can be accurately managed and effectively utilized.

[Brief description of drawings]

FIG. 1 is a block diagram of a data processing device during a power failure according to an embodiment of the present invention.

FIG. 2 is a time chart of a power failure data processing device according to an embodiment of the present invention.

FIG. 3 is an operation flowchart when the power is off in the embodiment of the present invention.

FIG. 4 is an operation flowchart when power is restored in the embodiment of the present invention.

FIG. 5 is a block diagram of a power failure data processing device according to a conventional example.

FIG. 6 is an operation flowchart when the power supply is cut off in the conventional example.

FIG. 7 is an operation flowchart when power is restored in the conventional example.

[Explanation of symbols]

 12 ... Storage means 13 ... Processing means 15 ... Clock IC 16 ... Backup power supply

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Toshio Hata 4-12 Atago Town, Hanamaki City, Iwate Prefecture

Claims (1)

[Claims] Claims: 1. The stored data stored in the volatile storage means cannot be read due to a power failure, or the power failure time exceeds a predetermined time even if it remains well when the power is restored. In a power failure data processing device that detects and erases the stored data when any one of these conditions is satisfied, a clock IC that operates even during a power failure and a predetermined power failure signal that is input from the outside during a power failure The identification data is written in the storage means, and when the identification data cannot be read from the storage means when the power is restored, the storage data is erased, and when the identification data can be read, the clock IC count is calculated. A data processing device at the time of power failure, which is provided with processing means for erasing the stored data only when a numerical value exceeds a predetermined time.