JPH05315899A - Variable frequency oscillating circuit - Google Patents

Abstract

PURPOSE:To realize a variable frequency oscillating circuit controlled by a digital signal. CONSTITUTION:The oscillation circuit is provided with 3-rows 3-stages of inverters 1-9 and among them, clocked inverters 1-6 are employed. The clocked inverters 1-6 are controlled by a digital signal from a control register 10 and the oscillating frequency is made variable through the combination of the clocked inverters in operation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a variable frequency oscillator circuit.

[0002]

2. Description of the Related Art Here, for the sake of simplicity, a circuit of a variable frequency oscillator using a ring oscillator constituted by three stages of inverters is shown in FIG. 2 and will be described with reference to this circuit. In the figure, 21 to 23 are inverters, 24 is a MOS transistor for controlling the feedback resistance, 25 is a delay capacitor, 26 and 27 are resistors and capacitors which form a low-pass filter for removing the AC component of the control signal, and 28 are A control signal input terminal and 29 are output terminals.

Here, when an appropriate voltage V _IN is applied to 28, the output 29 is affected by the transmission delay of the inverters 21 to 23 and the delay due to the on-resistance of the transistor 24 and the time constant of the delay capacitor 25. An AC waveform with a fixed cycle appears. At this time, the transistor 2
If 4 is an N-channel MOS, when the control signal V _IN is increased, the on-resistance of the transistor 24 decreases and the delay of the entire circuit decreases, so that the output 2
The frequency of the AC signal appearing at 9 becomes high. On the other hand, V _IN
Conversely, lowering the frequency lowers the frequency, and by varying the voltage at V _IN , an arbitrary output frequency can be obtained.

[0004]

In the conventional circuit shown above, the analog change of the control voltage is changed to the change of resistance by utilizing the characteristics of the transistor, and the oscillation frequency is changed by this. When the gate voltage exceeds a certain range, the on-resistance does not change much, so that the variable range of the frequency becomes narrow. Further, if the control signal V _IN is mixed with ripples or noise, the oscillation frequency fluctuates. To prevent this, a low-pass filter is inserted in the control input section, but this filter requires a sufficiently large time constant, so when the control signal is changed, a delay occurs until the oscillation frequency changes, and the response is There were defects such as badness.

In view of the above, the present invention aims to expand the variable range of a variable frequency oscillator and improve the response.

[0006]

In the variable frequency oscillator of the present invention, the inverter constituting the ring oscillator is replaced with a plurality of clocked inverters connected in parallel, and the operation of each clocked inverter is controlled by a digital signal. It is characterized by doing.

[0007]

According to the present invention, by increasing the number of stages of the ring oscillator and the number of clocked inverters forming each stage, the variable range of the frequency can be greatly expanded, and the control signal Even if noise or ripple is mixed, it can be ignored because it is digital control, and the response time associated with ripple removal is also improved.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the variable frequency oscillator of the present invention having 3 stages × 3 columns will be described with reference to FIG. Here, 1 to 6 are clocked inverters, 7 to 9 are inverters, 10 is a control register (6 bits), and 11 is an output terminal.

First, suppose that 101010 is written in the control register 10 from the left as an example. Then, among the clocked inverters, 1 to 3 operate but 4 to 6 stop. At this time, when viewed as a three-stage ring oscillator, each stage is equivalent to two inverters connected in parallel, and an AC signal having a constant cycle appears at the output 11. Next, considering the case where the contents of 10 are rewritten to be 001010 from the left, the clocked inverter 4 also starts operating. Then, in the first stage of the ring oscillator, the number of inverters is increased to three, and the delay time in this stage decreases, so 1
The output signal of 1 has a shorter cycle and an increased frequency.
Similarly, if the content of 10 is 110101 from the left, the oscillation frequency is lower than the initial value.

In this example, only six different frequencies can be selected, but if the number of stages of the ring oscillator, the number of clocked inverters in each stage, and the number of bits of the control register are increased, the range of frequencies and It goes without saying that the variable amount can be set arbitrarily.

[0011]

As described above, according to the present invention, a variable frequency oscillator having a wider frequency variable range and a faster response speed can be realized as compared with the conventional circuit, which is extremely useful.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention.

FIG. 2 is a circuit diagram of a conventional example.

[Explanation of symbols]

 1, 2, 3, 4, 5, 6 Clocked inverter 7, 8, 9 Inverter 10 Control register 11 Output terminal

Claims (1)

[Claims] 1. A ring oscillator circuit in which odd-numbered (2n + 1) inverters are connected in cascade and the output of the last-stage inverter is connected to the input of the first-stage, and the inverters of each stage are connected in parallel in a ring oscillator circuit for self-excited oscillation. Is connected to the control input terminal of each of the clocked inverters, and Hi or Lo is connected to the clocked inverters.
Has a register for supplying the control signal of
Among the clocked inverters, an arbitrary number of the clocked inverters are selectively operated, and the number of clocked inverters to be operated is changed to change the delay time of each stage to make the oscillation frequency variable. Frequency oscillator circuit.