JPH0530194Y2 - - Google Patents

Description

[Detailed description of the invention] (a) Industrial application field This invention relates to a key input device for inputting coded signals to a CPU (computer) or the like.

(b) Prior Art A typical conventional key input device has a plurality of key switches arranged in a matrix, and one end of each row and column key switch is connected to a row encoder and a column encoder, respectively. , when any key switch is operated, the corresponding code signals are output from the encoders and input to the CPU.

Further, some types of key input devices usually use a priority encoder to assign codes to keys. A key input device employing this priority encoder is configured so that when two or more keys are pressed at the same time, only the one with a higher priority is accepted.

(c) Problems that the invention aims to solve In the above-mentioned conventional key input device using a priority encoder, the priority order is determined by the code, so it is not possible to freely assign keys, and the degree of freedom is reduced. There is a problem in that not only the keys are damaged, but also the placement of the keys needs to be taken into consideration. Furthermore, prioritizing itself may be inconvenient and undesirable.

On the other hand, with keyswitches that simply have a static key matrix, when two or more keys are pressed, a code may be generated for a key that has not been operated at all, leading to the problem of incorrect input. It was hot.

In view of the above, an object of this invention is to provide a key input device that can prevent erroneous inputs from occurring when two or more keys are pressed at the same time.

(d) Means for solving the problem The key input device of this invention is composed of a plurality of key switches, and in response to the pressing operation of the key switches, a row signal C ₀ ...C _o and a column signal R ₀ ...R are generated. A key matrix that outputs a key matrix _n , and an input terminal i that receives the row signal C ₀ ...C _o at its input terminal, and has the highest priority.
a first encoder that outputs a binary code i in response to a _row signal to the first encoder _; Operating with the same prioritization, 2
a second encoder that outputs a binary code j; and a second encoder that receives the column signals R ₀ ...R _n at its input terminals and outputs a binary code i in response to the column signal to the input terminal i having the highest priority. No. 3 encoder receives the column signals R ₀ ...R _n at input terminals in the reverse order from the third encoder, operates with the same priority order as the third encoder, and sends the column signals R 0 ...R n to the input terminal j with the highest priority. a fourth encoder that outputs a binary code j in response to a column signal of It is characterized by a detection circuit which compares all bits of the binary code outputs and outputs a multiple key press detection signal b if there is even one matching bit.

(E) Function In this key input device, when a single key switch is operated, the first encoder and the third encoder output a binary code signal corresponding to the operated key switch. In this case, all bits of the outputs of the first and second encoders and the outputs of the third and fourth encoders do not match, so the detection circuit does not output a multiple key press detection signal. do not have.

On the other hand, if multiple key switches are operated at the same time, one or more bits of the binary code outputs of the first and second encoders (and/or the third and fourth encoders) will match, so detection will occur. A multiple key press detection signal is output from the circuit.

(F) Examples This invention will be explained in more detail below using examples.

FIG. 1 is a circuit block diagram of a key input device showing an embodiment of this invention. In Figure 1,
In the key matrix 1, a plurality of key switches are connected to the intersections of lines arranged in a matrix, and encoders 2 and 3 are connected to one end of each line in the row arrangement and the column arrangement. Furthermore, multiple key press detectors 4 are connected to the row and column lines of the key matrix 1, respectively.

The encoder 2 outputs a coded signal depending on which switch connected to the row line of the key matrix 1 is turned on, and the encoder 3 outputs a coded signal depending on which switch connected to the column line of the key matrix 1 is turned on. In response to a key switch being pressed,
Output a coded signal. Therefore, when any switch in key matrix 1 is operated, encoder 2 and encoder 3 output a coded signal a corresponding to that key switch.

When the number of key switches operated by key matrix 1 is one, the multi-key press detector 4 does not derive an output;
When two or more keys are operated at the same time, signals are derived to two or more output lines of the key matrix 1, so the multiple key press detector 4 detects this and sends a multiple key press detection signal b.
Output.

The bit code signal a and the multiple key press detection signal b of the key input device are output from the key input device 10 and input to the CPU 20, as shown in FIG. When the CPU 20 receives only the bit code signal a, it performs normal input operations, but when it receives the multiple key press detection signal b together with the bit code signal a,
In response, a multi-key press signal c is displayed on the display device 30.
is output, and a display indicating this is displayed on the display device 30. The operator can see the multi-key press operation signal on the display device 30 and know that two or more keys have been operated at the same time.

Note that when the multiple key press detection signal b is input, the CPU 20 inhibits the bit code signal a that is input at the same time, and prevents the coded signal from being input in terms of circuitry, thereby preventing erroneous input. prevent.

FIG. 3 shows another embodiment of this invention, and the key input device of this embodiment has row signals C ₀ ...C ₃
Key matrix 1 that outputs and column signals R ₀ ... R ₃
, an encoder 2a which receives row signals _C0 ... _C3 at input terminals 0-3, and an encoder 2a which receives row signals _C0 ... _C3 at input terminals 3-3.
encoder 41 receives column signals R ₀ ...R ₃ at input terminals 0 to 3; encoder 44 receives column signals R ₀ ...R ₃ to input terminals 3 to 0; Exclusive OR circuits 42 and 43 that detect a mismatch between code outputs, exclusive OR circuits 45 and 46 that detect a mismatch between code outputs of the encoders 3a and 44, and an exclusive OR circuit 42,
The output of one or more of 43, 45, 46 is L
If the multi-key press detection signal b is at the H level, the gate circuit 47 outputs the multiple key press detection signal b at the H level.

Here, encoders 2a, 3a, 41, 44
is a priority encoder, which is an element that encodes only the signal to the input terminal with the highest priority when input signals are simultaneously supplied to a plurality of input terminals. Note that here, the encoders 2a, 3a, 41, 44 have input terminals 0 to 44.
It is assumed that the priority order is highest in order of 3.

As shown in FIG. 3, row signals _C0 to _C3 are supplied to the input terminals of encoder 2a and encoder 41 in reverse order, so the codes of encoders 2a and 41 in response to a certain row signal C _i The output is
They have a one's complement relationship with each other. The same applies to the encoder 3a and the encoder 44, and the code outputs of the encoders 3a and 44 for a certain column signal R _i have a one's complement relationship with each other.

On the other hand, if multiple row signals (C _i , C _{j .} . . ) are simultaneously supplied to multiple input terminals of encoders 2a and 41, only the signal to the input terminal with the highest priority is encoded. , encoder 2a
There is no complement relationship between the outputs of and 41. Note that the same applies when a plurality of column signals (R _i , R _{j .} . . ) are simultaneously supplied to a plurality of input terminals of the encoders 3a and 44.

Hereinafter, the circuit operation of the key input device will be explained separately in the case where a single key is pressed in the key matrix 1 and the case where a plurality of keys are pressed simultaneously.

[When a single key is pressed] When a single key in key matrix 1 is pressed, encoders 2a, 41, and encoder 3
The outputs of a and 44 are in a high complement relationship, and all bits of the code outputs do not match. Therefore, the outputs of the exclusive OR circuits 42, 43, 45, and 46 all become H level, and the gate circuit 47
The output becomes L level. That is, when a single key of the key matrix 1 is pressed, the multiple key press detection signal b is not output, and only the code outputs a of the encoders 2a and 3a are output.

[When multiple keys are pressed at the same time] On the other hand, when multiple keys in key matrix 1 are pressed at the same time, the complement relationship of the outputs of encoders 2a, 41, or (and) encoders 3a, 44 is disrupted. Therefore, exclusive OR circuits 42, 43,
The output of one or more of 45 and 46 becomes L level, and the output of gate circuit 47 becomes H level. In other words, when a plurality of keys are pressed simultaneously, the gate circuit 47 outputs the multiple key press detection signal b.

(G) Effect of the invention According to this invention, when two or more multiple keys are operated, this is detected by the multiple key operation detector,
Since this fact is displayed on the display, the operator can know that multiple keys have been operated at the same time, and can prevent erroneous inputs.

[Brief explanation of the drawing]

FIG. 1 is a circuit block diagram of a key input device showing an embodiment of this invention, and FIG. 2 is an overall schematic block diagram illustrating a case where the same key input device is used to display multiple key presses on a display device. , FIG. 3 is a circuit block diagram of a key input device showing another embodiment of this invention. 1...Key matrix, 2, 2a, 3, 3a...
...Encoder, 4...Multi-key press detector, 30...
Display device.

Claims (1)

[Claims for Utility Model Registration] A key matrix 1 that is composed of a plurality of key switches and outputs row signals C ₀ ...C _o and column signals R ₀ ...R _n in response to pressing operations of the keys; The row signal C ₀ ...C _o is received at the input terminal, and 2 is received in response to the row signal to the input terminal i with the highest priority.
a first encoder 2a that outputs a base code i; and a first encoder 2a that receives the row signals _C0 ... _Co at its input terminal in the reverse order of the first encoder and operates with the same priority order as the first encoder. , a second encoder 41 that outputs a binary code j in response to the _row signal to the highest priority input terminal _j ; Corresponding to the column signal to i,
Third encoder 3a outputting binary code i
and receives the column signals R ₀ ...R _n at the input terminal in the reverse order to the third encoder, operates with the same priority as the third encoder, and outputs the column signal to the input terminal j with the highest priority. A fourth encoder 44 that outputs a binary code j corresponding to Detection circuits 42 and 4 compare all bits of the hexadecimal code output and output a multiple key press detection signal b if there is even one matching bit.
3, 45, 46, and 47.