JPH0530097B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a data transfer method between a main unit and a gaming machine in controlling a pachinko gaming machine.

(2) There are two data transfer methods for the centralized control shift register of conventional pachinko gaming machines: parallel data transfer method and serial data transfer method. The disadvantage is that the number of wiring between the two machines becomes enormous, and the latter requires a complicated circuit for the pachinko machine, and the disadvantage is that the system cost becomes extremely expensive as the number of pachinko machines increases. There is.

(3) Purpose of the Invention The present invention was created in view of this point, and is capable of simplifying the data transfer device of the pachinko gaming machines in a system in which a plurality of pachinko gaming machines are centrally managed by the main unit. The aim is to provide a data transfer method that requires less wiring between devices.

(4) Structure of the invention Therefore, the data transfer method of the present invention is a data transfer method for a system having a plurality of pachinko gaming machines and a main unit that centrally manages the plurality of pachinko gaming machines, and which An n-bit shift register capable of parallel data input, parallel data output, serial data input, and serial data output is provided in the machine and main unit, and the serial data output terminal of the shift register is connected to the serial data input of other shift registers. By connecting to the terminal, multiple shift registers are connected in a daisy pattern, and a signal line is provided to supply the transfer clock to the shift clock terminal of each shift register. A frequency dividing circuit that divides the frequency into n and a counter that counts the output of the frequency dividing circuit are provided so that the data sent from each pachinko gaming machine to the main unit includes a flag bit indicating whether the data is valid or invalid. , is characterized in that it constitutes a pachinko gaming machine.

(5) Embodiments of the invention Hereinafter, embodiments of the invention will be described with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention. In the figure, 1 is a shift register, 2 is a frequency dividing circuit, 3 is a counter, 40 to 4m are shift registers, 11 is a parallel input line of shift register 1, 12 is a parallel output line of shift register 1, 13
is the output line of counter 3, 14i (however, i=0,
1,...,m) are parallel input lines of the shift register 4i, 15i are parallel output lines of the shift register 4i,
Reference numeral 16 indicates a signal line for transmitting serial data, 17 also indicates a signal line for transmitting serial data, and 18 indicates a signal line for supplying a transfer clock to the shift clock terminal of the shift register. .

Shift register 1 has serial data input,
It is capable of serial data output, parallel data input, and parallel data output. The same applies to shift registers 40 to 4m. The shift registers 1, 40, 41, . . . , 4m are connected in a beaded pattern to form a large shift register. In each shift register, Si is the serial data input terminal, So is the serial data output terminal, Pi1 to Pin are the parallel data input terminals, Po1 to Pon are the parallel data output terminals, and n indicates the number of bits of the shift register. .

A shift register 1 of the main device transmits data sent from a control device (not shown) to a terminal device through a signal line 1.
1 through the parallel input terminals Pi1 to Pin, converts it into serial data, and sequentially sends it bit by bit to the signal line 16 from the serial data output terminal So. In addition, the shift register 1 of the main unit receives serial data from the terminal device to the control device from the signal line 17 at the serial data input terminal Si, converts it into parallel data, and converts it into parallel data as n-bit received data. - Send data from data output terminals Po1 to Pon to the control device through signal line 12.

Shift register 4i of each terminal device (i is 0, 1,
...m) transmits data to the main unit through the signal line 14.
Parallel data input terminal Pi1 or Pin from i
, converts it into serial data, and sequentially transmits it bit by bit from the serial data output terminal So to the main unit through the signal line 17. In addition, the shift register 4i of each terminal device directly (or through several shift registers) serial data sent from the main device.
It is received at the data input terminal Si, converted to parallel data, and sent as n-bit received data from the parallel output terminal Po1 to Pon to the signal line 15i.
Send to.

The frequency dividing circuit 2 divides the frequency of the transfer clock by 1/n, and the counter 3 counts the clock output from the frequency dividing circuit 2. counter 3
has a sufficient number of bits to represent the address of the terminal device, and the address information output from the counter 3 is sent to the control device via the signal line 13. The transfer clock is sent to the shift clock terminals of the shift registers 1, 40, . . . , 4m and the input terminal of the frequency dividing circuit 2 via the signal line 18.

FIG. 2 is a diagram showing a system configuration when the centralized management of pachinko gaming machines of the present invention is applied.
FIG. 3 is a diagram for explaining data acquisition and data transmission. In FIG. 2, 50 to 52 indicate flip-flops.

The system of FIG. 2 shows an example when n=4. n
=4 is a terminal device (control unit of pachinko gaming machine)
It corresponds to a total of 4 bits of information: ball in, ball out, contact point, and flag. The terminal device exists regardless of the presence or absence of a pachinko machine, and the flag bit is set to "1" when the pachinko machine's ball input, ball output, and empty contact input signals and ball replenishment solenoid signal are connected. , the flag bit is fixed to "0" when the pachinko machine is not connected or is out of order.

First, the acquisition of ball in, ball out, and empty contact signals from a pachinko machine will be explained with reference to FIG. 3a. First, a data import command is issued, and the shift register of each terminal device records the input, output, and input of each pachinko machine.
The empty contact signal and flag bit are set, and then the data is shifted by the transfer clock signal. In the example of n=4, after four transfer clocks, the incoming and outgoing balls, empty contacts, and flag bits will be in the shift register of the main unit, and at this timing, the main unit will receive the first data as data. recognize. Four more transfer clocks to the next unit (second unit), four more transfer clocks to the third unit,
...By continuing to send the transfer clock, information from all units can be captured. Note that by providing a flag, it is possible to determine whether the captured information is valid or invalid. The transfer clock is provided by a 1/n frequency dividing circuit, and in this example, the counter is incremented by 1 every time four transfer clocks are supplied, so the value of the counter directly corresponds to the machine number.

Next, the transmission of the solenoid drive signal to the pachinko machine will be explained with reference to FIG. 3b. After initializing the frequency dividing circuit and counter, first set the solenoid drive signal for the first unit in the shift register on the main body side (based on the set signal).
After that, four transfer clocks are generated and data is transferred to the terminal side. Next, the solenoid drive signal for the second unit is set and four transfer clocks are generated. After transmitting data to all units, a data transmission command is issued to control the shift of each terminal. The data in the register is transferred to the next flip-flop and sent to the pachinko machine as the solenoid drive signal for the machine. In addition, upon transfer, the value of the counter corresponds to each pachinko machine number.

(6) Effects of the Invention As is clear from the above explanation, according to the present invention, the number of wiring between the main unit and the pachinko gaming machine and between the pachinko gaming machines can be reduced to a small number, and the addresses of the pachinko gaming machines can be is recognized within the main unit, so the data transmitting/receiving device of the pachinko gaming machine can have a simple configuration. As a result, the present invention is extremely effective in implementing a data transfer method in a system that centrally manages a large number of pachinko gaming machines.

[Brief explanation of drawings]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG.
This figure shows a system configuration when the present invention is applied to centralized management of pachinko gaming machines, and FIG. 3 is a diagram for explaining data import and data transmission. 1...Shift register, 40 to 4m...Shift register, 2...Divider circuit, 3...Counter.

Claims (1)

[Scope of Claims] 1. A data transfer method for a system having a plurality of pachinko gaming machines and a main unit that centrally manages the plurality of pachinko gaming machines, wherein each pachinko gaming machine and main unit have By providing an n-bit shift register capable of data input, parallel data output, serial data input, and serial data output, and by connecting the serial data output terminal of the shift register to the serial data input terminal of other shift registers, multiple The shift registers are connected in a daisy pattern, a signal line is provided to supply the transfer clock to the shift clock terminal of each shift register, and a frequency divider circuit that divides the transfer clock to 1/n is installed in the main unit. , a counter that counts the output of the frequency dividing circuit, and the pachinko gaming machine is configured so that the data sent from each pachinko gaming machine to the main unit includes a flag bit indicating whether the data is valid or invalid. Characteristic data transfer method.