JPH05284670A - Integrated circuit incorporating battery back-up - Google Patents

Integrated circuit incorporating battery back-up

Info

Publication number
JPH05284670A
JPH05284670A JP4074976A JP7497692A JPH05284670A JP H05284670 A JPH05284670 A JP H05284670A JP 4074976 A JP4074976 A JP 4074976A JP 7497692 A JP7497692 A JP 7497692A JP H05284670 A JPH05284670 A JP H05284670A
Authority
JP
Japan
Prior art keywords
integrated circuit
battery
battery backup
function
battery back
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP4074976A
Other languages
Japanese (ja)
Inventor
Susumu Enokizono
進 榎木薗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4074976A priority Critical patent/JPH05284670A/en
Publication of JPH05284670A publication Critical patent/JPH05284670A/en
Withdrawn legal-status Critical Current

Links

Abstract

PURPOSE:To facilitate the addition of a battery back-up function to an integrated circuit and to ensure compatibility with a general purpose integrated circuit by incorporating the battery back-up function for the integrated circuit in the integrated circuit. CONSTITUTION:A diode 2 for separating a back-up battery from the outside, a capacitor C and a resistor R for charging and discharging a battery are provided at an input power supply for an existing integrated circuit in order to ensure battery back-up function upon power interruption.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はバッテリーバックアップ
内蔵集積回路に関し、特に外部バッテリー電源の不時断
に対して集積回路の動作を確保する機能を内蔵するバッ
テリーバックアップ内蔵集積回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit with a built-in battery backup, and more particularly to an integrated circuit with a built-in battery backup which has a function of ensuring the operation of the integrated circuit even when the external battery power source is interrupted.

【0002】[0002]

【従来の技術】従来の電子回路におけるバッテリーバッ
クアップ機能は、集積回路の周辺に電池やコンデンサ、
ダイオード、抵抗等を含んで形成した回路のバッテリー
電源により、集積回路に対する電源のバックアップを可
能としていた。
2. Description of the Related Art A battery backup function in a conventional electronic circuit has a battery, a capacitor,
The battery power supply of the circuit formed by including the diode, the resistor, etc. has enabled the backup of the power supply for the integrated circuit.

【0003】[0003]

【発明が解決しようとする課題】この従来のバッテリー
バックアップ方式は、集積回路の外部にバッテリーバッ
クアップ回路を付加しなければならない為、バッテリー
バックアップ回路自体のスペースが必要である。
This conventional battery backup system requires a space for the battery backup circuit itself because a battery backup circuit must be added to the outside of the integrated circuit.

【0004】バッテリーバックアップ機能の追加や削除
が困難である。
It is difficult to add or delete the battery backup function.

【0005】バッテリーバックアップ機能の要否により
電源パターンの区分けが必要である。
It is necessary to classify the power source pattern depending on the necessity of the battery backup function.

【0006】バッテリーバックアップ回路の設計がユー
ザー側で必要である。
The user needs to design a battery backup circuit.

【0007】バッテリー回路が外部にあるので取扱いに
注意が必要である。
Since the battery circuit is external, it must be handled with care.

【0008】といったさまざまな問題点があった。There are various problems such as the above.

【0009】本発明は上述した問題点を解決し、特別な
スペースを必要とせず、機能の追加や削除が容易で、機
能の要否により電源パターンの区分けを必要とせず、ユ
ーザー側の回路設計を要しない取扱い容易なバッテリー
バックアップ内蔵集積回路を提供することにある。
The present invention solves the above-mentioned problems, does not require a special space, is easy to add or delete functions, does not require division of power supply patterns depending on the necessity of functions, and is a circuit design on the user side. An object is to provide an integrated circuit with a built-in battery backup that does not require and is easy to handle.

【0010】[0010]

【課題を解決するための手段】本発明のバッテリーバッ
クアップ内蔵集積回路は、常時は外部バッテリー電源に
よって集積回路とともに電源を印加されて充電し、前記
外部バッテリー電源の不時断時には充電された電荷を放
出して集積回路の動作を確保するバッテリーバックアッ
プ手段を内蔵して構成される。
An integrated circuit with a built-in battery backup according to the present invention is normally charged by an external battery power source together with the integrated circuit for charging, and when the external battery power source is uninterrupted, the charged electric charge is charged. It is configured to include a battery backup means for discharging to secure the operation of the integrated circuit.

【0011】[0011]

【実施例】次に、本発明について図面を参照して説明す
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

【0012】図1は、本発明の一実施例の正常動作を示
す構成図(a)、および電源の不時断時の動作を示す構
成図(b)である。
FIG. 1 is a configuration diagram (a) showing a normal operation of one embodiment of the present invention and a configuration diagram (b) showing an operation when the power supply is interrupted.

【0013】本実施例は、集積回路としてのメモリ素子
部1と、メモリ素子部1とともに集積回路に内蔵され、
バッテリーバックアップ手段を構成するダイオード2お
よび2組の抵抗RとコンデンサCとを含んで成る。
In the present embodiment, the memory element portion 1 as an integrated circuit is built in the integrated circuit together with the memory element portion 1,
It comprises a diode 2 and two sets of a resistor R and a capacitor C which constitute a battery backup means.

【0014】次に、本実施例の動作について説明する。Next, the operation of this embodiment will be described.

【0015】電源端子には電源VDDが供給され、図1
(a)に示すように電流が矢印方向に流れ、コンデンサ
Cに対し、抵抗Rを通して電荷の充電が行なわれる。
A power supply VDD is supplied to the power supply terminal, and FIG.
As shown in (a), a current flows in the direction of the arrow, and the capacitor C is charged with electric charge through the resistor R.

【0016】また、メモリ素子部1にも電源VDDの供
給が行なわれ、メモリ素子部1のメモリに対するリード
/ライト動作が正常に行なわれる。
Further, the power supply VDD is also supplied to the memory element portion 1, and the read / write operation of the memory element portion 1 with respect to the memory is normally performed.

【0017】次に、外部からの集積回路に対する電源V
DDの供給が何から理由で不時断となった場合には、図
1(b)に示すように、図1(a)で充電されたコンデ
ンサCの電荷がメモリ素子部1に対して放出されてバッ
テリーバックアップの機能が保証され、メモリ素子部1
の状態は電源が断となる前の状態を正常に保持すること
ができる。
Next, a power source V for the integrated circuit from the outside
When the supply of DD is interrupted for some reason, as shown in FIG. 1B, the charge of the capacitor C charged in FIG. 1A is discharged to the memory element unit 1. The function of battery backup is guaranteed and the memory device section 1
The state of can hold the state before the power is turned off normally.

【0018】この時、集積回路内のダイオード2によ
り、外部に対しては電荷の漏洩はなく、集積回路内部に
のみバッテリーバックアップが行なわれる。
At this time, due to the diode 2 in the integrated circuit, there is no leakage of charges to the outside, and battery backup is performed only inside the integrated circuit.

【0019】[0019]

【発明の効果】以上説明したように本発明は、バッテリ
ーバックアップ機能を集積回路に内蔵することにより、
バッテリーバックアップ機能の追加を容易にし、またバ
ッテリーバックアップ機能のためのスペースの削減,設
計作業の削減が確保でき、さらにバッテリーが外に見え
ない為、取扱いの安全性も確保できるとう効果がある。
As described above, according to the present invention, by incorporating the battery backup function in the integrated circuit,
The battery backup function can be easily added, the space for the battery backup function can be reduced, the design work can be reduced, and the safety of handling can be ensured because the battery cannot be seen outside.

【0020】また、すべての回路を本集積回路で構成す
ることにより、電源切断前の状態をそのまま保持し、電
源投入時切断前の動作の継続をそのまま再開できるとい
う効果がある。
Further, by configuring all the circuits with the present integrated circuit, there is an effect that the state before power-off can be maintained as it is and the operation before power-off can be resumed as it is.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の正常時の動作を示す構成図
(a)、および電源不時断における動作を示す構成図
(b)である。
FIG. 1 is a configuration diagram (a) showing an operation at a normal time of an embodiment of the present invention and a configuration diagram (b) showing an operation when a power supply is interrupted.

【符号の説明】[Explanation of symbols]

1 メモリ素子部 2 ダイオード C コンデンサ R 抵抗 1 memory element part 2 diode C capacitor R resistance

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 常時は外部バッテリー電源によって集積
回路とともに電源を印加されて充電し、前記外部バッテ
リー電源の不時断時には充電された電荷を放出して集積
回路の動作を確保するバッテリーバックアップ手段を内
蔵して成ることを特徴とするバッテリーバックアップ内
蔵集積回路。
1. A battery backup means for always charging the battery by applying a power source together with the integrated circuit by an external battery power source and discharging the charged charge when the external battery power source is uninterrupted to ensure the operation of the integrated circuit. An integrated circuit with built-in battery backup, characterized by being built-in.
JP4074976A 1992-03-31 1992-03-31 Integrated circuit incorporating battery back-up Withdrawn JPH05284670A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4074976A JPH05284670A (en) 1992-03-31 1992-03-31 Integrated circuit incorporating battery back-up

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4074976A JPH05284670A (en) 1992-03-31 1992-03-31 Integrated circuit incorporating battery back-up

Publications (1)

Publication Number Publication Date
JPH05284670A true JPH05284670A (en) 1993-10-29

Family

ID=13562833

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4074976A Withdrawn JPH05284670A (en) 1992-03-31 1992-03-31 Integrated circuit incorporating battery back-up

Country Status (1)

Country Link
JP (1) JPH05284670A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999031664A1 (en) * 1997-12-15 1999-06-24 Infineon Technologies Ag Buffer circuit and integrated-circuit memory with a buffer circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999031664A1 (en) * 1997-12-15 1999-06-24 Infineon Technologies Ag Buffer circuit and integrated-circuit memory with a buffer circuit
US6426899B1 (en) 1997-12-15 2002-07-30 Infineon Technologies Ag Integrated memory with a buffer circuit

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Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19990608