JPH05267474A - Semiconductor device - Google Patents

Abstract

PURPOSE:To form a fine two-layer wiring having good adhesion with a foundation insulating film and a low electric resistance regarding a two-layer wiring consisting of a polysilicon wiring which is coated with metal. CONSTITUTION:In a semiconductor device having a two-layer wiring 6 which is formed by selectively depositing a metallic coating 4 on a surface of a polysilicon wiring 3 arranged on an insulating film 2 formed on a surface of a substrate 1, a fixing part 5 which is closely fitted by charging an etching hole shaped in the insulating film 2 immediately below the polysilicon wiring 3 is provided projecting in a direction of the insulating film 2 in a lower surface of the polysilicon wiring 3. The fixing part 5 of the polysilicon wiring 3 is provided passing through the insulating film 2 and is joined with an impurity region formed inside the substrate 1 in contact with the insulating film 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a two-layer wiring structure made of polysilicon wiring having a metal film and having good adhesion to a substrate.

Since a two-layer wiring formed by selectively depositing a metal film on the surface of a polysilicon wiring arranged on an insulating film has a smaller electric resistance than a polysilicon wiring, the wiring area is reduced. It is regarded as an important means for improving the integration degree of semiconductor devices.

However, the two-layer wiring may cause internal stress and peel off from the substrate, which makes it impossible to manufacture a thin wiring by the two-layer wiring. Therefore, there is a strong demand for double-layer wiring with good adhesion to the substrate.

[0004]

2. Description of the Related Art FIG. 3 is a partial view of a conventional embodiment.
FIG. 3A is a perspective view of the two-layer wiring arranged on the insulating film, and FIG. 3B is a sectional view of the two-layer wiring shown in FIG.

In the conventional two-layer wiring, referring to FIG. 3B, an insulating film 2 is formed on the surface of a silicon substrate 1, a polysilicon wiring 3 is formed on the insulating film 2, and then the polysilicon film is formed. It was formed by selectively depositing a metal film 6, for example, a tungsten film on the surface of the silicon wiring 3.

In the two-layer wiring 6 having such a structure, the metal film 4
By depositing, a tensile stress is generated on the back surface of the polysilicon wiring 3 and the polysilicon wiring 3 is warped to the back surface, so that the polysilicon wiring 3 is separated from the insulating film 2.

In particular, referring to FIG. 3A, the double-layer wiring 6
When the has an end face or a corner, peeling occurs and progresses from the part where stress concentration is remarkably applied.

[0008]

As described above, in the semiconductor device having the double-layered wiring of the conventional structure, stress is generated in the polysilicon wiring due to the deposition of the metal film on the surface of the polysilicon wiring, and the insulating film is formed. There is a problem of peeling from.

Therefore, since the line width of the two-layer wiring cannot be reduced, there is a drawback that a fine pattern cannot be formed or the pattern shape is limited, and a thick metal film is deposited. However, there is a drawback that it is not possible to form a wiring having a low electric resistance.

According to the present invention, an etching hole is formed in the underlying insulating film, and a fixing portion for tightly fitting the etching hole and fixing the polysilicon wiring is provided on the lower surface of the polysilicon wiring to project the polysilicon wiring. An object of the present invention is to provide a semiconductor device having improved adhesion to an insulating film, low electric resistance, and fine two-layer wiring.

[0011]

FIG. 1 is a partial view of a first embodiment of the present invention. FIGS. 1 (a) and 1 (b) are plan views of thin two-layer wiring and thick two-layer wiring, respectively. Figure 1 (c) is
It shows the AB cross-sectional structure in (a).

In order to solve the above-mentioned problems, referring to FIG. 1, the first structure of the present invention is that the surface of the polysilicon wiring 3 provided on the insulating film 2 formed on the surface of the substrate 1 is formed. In a semiconductor device having a two-layer wiring 6 formed by selectively depositing a metal film 4, a polysilicon wiring 3 is provided on the lower surface of the polysilicon wiring 3 so as to project toward the insulating film 2.
The insulating film 2 immediately below is provided with a fixing portion 5 which is filled with an etching hole and is closely fitted, and the second configuration is the semiconductor device of the first configuration. The fixing portion 5 of the polysilicon wiring 3 is provided so as to penetrate the insulating film 2, and is in contact with the insulating film 2 to be bonded to the impurity region 7 formed in the substrate 1. Constitute.

[0013]

In the structure of the present invention, referring to FIG. 1 and FIG.
On the lower surface of the polysilicon wiring 3 formed on the insulating film 2,
A fixing portion 5 is provided which fills the pre-drilled etching hole in the surface of the insulating film 2 and tightly fits it.

The fixing portion 5 is tightly fitted in the etching hole to mechanically fix the insulating film 2 and the polysilicon wiring 3 to improve the peel strength. Therefore, when the metal film 4 is deposited on the surface of the polysilicon wiring 3, even if the stress in the direction of peeling the polysilicon wiring 3 from the insulating film 2 acts, it is not easily peeled.

In particular, the peel strength can be increased by providing the fixing portion 5 close to the end portion or corner of the polysilicon wiring 3 where the stress concentration is remarkable. For this reason, the two-layer wiring 6 of the present invention has the same structure as the polysilicon wiring 3 and the underlying insulating film 2 even if the metal coating 4 is thickened or the wiring line width is reduced.
It is possible to prevent the peeling from.

In the second structure of the present invention, the fixing portion 5 penetrates the underlying insulating film 2 to reach the substrate 1 and is joined to the impurity region 7 formed on the surface of the substrate 1. Therefore, the polysilicon wiring 3 is metallurgically bonded and electrically connected to the impurity region 7, and is firmly bonded because it is directly bonded to the substrate 1.

For this reason, the polysilicon wiring 3 and the insulating film 2 are
Adhesion with is better than that of the first embodiment. In addition, the double-layered wiring of this configuration has an advantage that the electric capacity between the wiring and the substrate is large.

The fixed portion 5 is formed of the polysilicon wiring 3
By integrally depositing with, the fixing portion 5 and the polysilicon wiring 3 can have sufficient strength.

[0019]

EXAMPLES The present invention will be described with reference to examples. In the first embodiment of the present invention, referring to FIGS. 1A and 1B, a two-layer wiring 6 having a narrow L-shaped pattern and a two-layer wiring 6 having a wide pattern bent at a right angle are provided. The present invention relates to a semiconductor device provided.

The two-layer wiring of this embodiment is manufactured as follows. First, referring to FIG. 1C, a SiO ₂ film formed on the surface of the silicon substrate 1 has a thickness of, for example, 900 nm.
On the insulating film 2 of, for example, side length 0.7 μm, depth 500 nm
With reference to FIGS. 1A and 1B, the rectangular etching hole is drilled at a position where the fixing portion 5 is to be formed by, for example, ion etching.

The etching hole is formed on the substrate 1
It can also be prepared by forming an etching hole penetrating the insulating film 2 using as a stopper for etching and forming an insulating layer on the bottom surface of the etching hole.

The position of the fixing portion 5 is preferably a position where stress concentration is remarkable, such as in the vicinity of the end face of the wiring pattern or in the vicinity of a corner bent at a right angle. Of course, they may be provided at other positions in order to improve the peel strength.

Next, referring to FIG. 1C, for example, C
By VD method (chemical vapor deposition method), for example, thickness 250 nm
Of polysilicon is deposited on the insulating film 2 by filling the etching hole.

Next, the deposited polysilicon is photoetched to form, for example, an L-shape having a width of 1.0 μm and a predetermined pattern bent at a right angle of 3.0 μm,
The polysilicon wiring 3 is used. In this case, for the thin wiring, the width of the position where the fixing portion 5 is to be formed is, for example, 1.5 μm.
It is preferable to widen the width to facilitate patterning. The etching hole formed in the insulating film 2 is located immediately below the wiring pattern.

Therefore, polysilicon filling these etching holes is formed on the lower surface of the polysilicon wiring 3 as the fixing portion 5. Then, a metal film 4 is selectively deposited on the surface of the polysilicon wiring 3, for example, a tungsten film having a thickness of 0.2 μm is deposited by the CVD method to manufacture a two-layer wiring 6.

According to this embodiment, since a thick metal film can be provided even for a thin wiring, a wiring having a low electric resistance can be realized. FIG. 2 is a sectional view of a second embodiment of the present invention, showing a two-layer wiring used as one end of a bias supply wiring of an ECL integrated circuit.

The second embodiment of the present invention will be described with reference to FIG.
The fixing portion 5 is formed so as to penetrate the insulating film 2 and be bonded to the substrate 1. The fixed portion 5 is formed by the p-type diffusion region (FIG. 2) formed on the surface of the n-type diffusion region 8 provided in the substrate surface region.
For example, an ohmic junction is formed with the impurity region 7) of 1., and a bypass capacitance with the substrate is added to the two-layer wiring 6 by the pn junction capacitance at the interface between these regions.

In this embodiment, since the fixing portion 5 is directly metallurgically bonded to the substrate 1, the fixing can be strengthened.

[0029]

According to the present invention, the polysilicon wiring is
Since the fixing portion that is tightly fitted in the etching hole provided in the underlying insulating film mechanically fixes the insulating film to increase the peel strength, it has excellent adhesion to the underlying layer, low electrical resistance, and a fine two-layer structure. It is possible to provide a semiconductor device having wiring, which largely contributes to the performance improvement of the semiconductor device.

[Brief description of drawings]

FIG. 1 is a partial view of a first embodiment of the present invention.

FIG. 2 is a sectional view of a second embodiment of the present invention.

FIG. 3 Partial view of a conventional embodiment

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 Insulating film 3 Polysilicon wiring 4 Metal coating 5 Fixing part 6 Two-layer wiring 7 Impurity region 8 N-type diffusion region

Claims (2)

[Claims] 1. A metal film (4) selectively deposited on the surface of a polysilicon wiring (3) provided on an insulating film (2) formed on the surface of a substrate (1). In a semiconductor device having a layer wiring (6), a projection is provided on the lower surface of the polysilicon wiring (3) in the direction of the insulating film (2), and the insulating film (2) is provided directly under the polysilicon wiring (3). A semiconductor device, comprising: a fixing portion (5) which is filled with an etched etching hole and is fitted tightly. 2. The semiconductor device according to claim 1, wherein the fixed portion (5) of the polysilicon wiring (3) is provided so as to penetrate the insulating film (2) and is in contact with the insulating film (2). A semiconductor device characterized by being joined to an impurity region (7) formed in the substrate (1).