JPH05259770A - Radio receiver - Google Patents

Abstract

PURPOSE:To allow the radio receiver to deal with an intense electric field input by connecting an attenuation element of an attenuation circuit in series to an AGC output terminal and providing a limit means to a post-stage attenuation circuit so that its attenuation is less than the attenuation of the pre-stage attenuation circuit. CONSTITUTION:When an electric field intensity of an antenna input signal is stronger further, since an AGC voltage outputted from a 5th terminal of an FM front end IC 22 is increased more, while a bias voltage of a limit resistor 11 of a 2nd attenuation circuit 3 is increased and PIN diodes 9a, 9b of the 1st attenuation circuit 2 are saturated, PIN diodes 10a, 10b of a 2nd attenuation circuit 3 approaches the saturation state with a delay and the attenuation by the 2nd attenuation circuit is implemented in addition to the attenuation by the 1st attenuation circuit. That is, varactor diodes 8b, 8b in an antenna tuning circuit 8 are protected from a high electric field intensity by the 1st and 2nd attenuation circuits 2, 3 without causing out of tuning, the insufficient attenuation at the input prestage of a high frequency amplifier element 13 by the 1st attenuation circuit 2 is replenished by the attenuation by the 2nd attenuation circuit 3 provided to the limit resistor 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present application relates to a radio receiver which is effective mainly for mounting on a vehicle and which has a large attenuation effect.

[0002]

2. Description of the Related Art Conventionally, an attenuation circuit is connected in front of an antenna tuning circuit provided with a variable capacitance diode that varies a tuning frequency according to an antenna signal, and an FET (field effect transistor) of the attenuation circuit and the high frequency amplification circuit is connected. A gain control signal generated according to the received electric field strength is applied to the second gate of the antenna and when the electric field strength of the antenna input signal exceeds the first level, the antenna input signal is attenuated by the attenuator circuit and tuned. Intermodulation interference due to the non-linearity of the variable capacitance diode of the circuit is eliminated, and when the electric field strength exceeds a second level higher than the first level, the amplification gain of the high frequency amplification circuit is controlled in addition to the attenuation circuit. A receiving input level control device for a receiver configured as described above is known, for example, from Japanese Utility Model Publication No. 17857/1989.

[0003]

By the way, according to the above-mentioned known structure, since the attenuation circuit is connected to the front stage of the antenna tuning circuit, the saturation of the tuning variable capacitance diode is protected from the strong reception electric field strength. However, when trying to obtain a large amount of attenuation in the attenuating circuit, the tuning deviation due to the impedance change of the antenna tuning circuit becomes large, so the attenuation rate in the attenuating circuit is limited by itself. Therefore, in order to compensate for the shortage of the amount of attenuation in the attenuator circuit against the strong received electric field intensity, when the electric field intensity exceeds the second level higher than the first level, the amplification degree of the high frequency amplifier circuit is suppressed. However, when the electric field strength is extremely high, the high frequency amplifier circuit may be saturated and induce cross modulation distortion.

[0004]

SUMMARY OF THE INVENTION Therefore, according to the present application, before a signal is input to a high frequency amplifying element, the signal input can be significantly attenuated between the antenna input end and the antenna tuning circuit. A plurality of stages of attenuating circuits in which a capacitor and an attenuating element are L-shaped are connected, and the attenuating element of the attenuating circuit is connected in series to an AGC output terminal, and the attenuating circuit of the attenuating circuit of the latter stage has an attenuation amount of the former stage. Limiting means is provided so that the amount of attenuation is smaller than the attenuation amount of the attenuation circuit, or a plurality of stages of attenuation circuits in which capacitors and attenuation elements are L-shaped are connected between the antenna input end and the antenna tuning circuit, and The attenuation element of the attenuation circuit is connected in parallel to the AGC output terminal, and the attenuation circuit in the subsequent stage is provided with a limiting means so that the attenuation amount thereof is smaller than that of the attenuation circuit in the previous stage. It is an.

[0005]

However, when the electric field strength of the antenna input signal is weak, the AGC voltage is also low, so that the antenna input signal is hardly attenuated and is resonated by being input to the antenna tuning circuit, and then the high frequency of the next stage. Input to the amplification element. When the electric field strength of the antenna input signal increases, the AGC voltage also increases, so that the first and second attenuating circuits are driven at the same time, so that the antenna input signal is attenuated by each attenuating circuit and the variable capacitance diode of the antenna tuning circuit is attenuated. Is protected from a strong input electric field, and the antenna input signal resonated with the antenna tuning circuit is input to the high frequency amplifying element at the next stage. In the above description, the first and second attenuating circuits perform the attenuating operation at the same time, but since the limiting means is connected to the second attenuating circuit, the operation rising of the circuit is delayed compared to the first attenuating circuit, and the AGC voltage is When it is relatively low, the first damping circuit acts predominantly, and when the electric field strength then increases and the AGC voltage increases, the damping action of the first damping circuit saturates before the second damping circuit, In addition to the damping of the damping circuit, the damping action of the second damping circuit is performed. That is, the variable capacitance diode in the antenna tuning circuit is protected from the electric field strength of strong input by the first and second attenuating circuits, and the damping action of the second attenuating circuit lags behind that of the first attenuating circuit, which causes a change in impedance. Damping is performed to the extent that no tuning shift occurs, and the shortage of the amount of attenuation by the first attenuating circuit is supplemented by the attenuating action by the second attenuating circuit in the subsequent stage.

[0006]

Embodiments of the present invention will be described in detail below with reference to the drawings. Capacitors 4 and 5 respectively constituting a first attenuation circuit 2 and a second attenuation circuit 3 at an antenna terminal 1 and a capacitor for antenna tuning damping. 6 are connected in series, and an antenna tuning circuit 8 including a tuning coil 8a and a pair of variable capacitance diodes 8b and 8b is connected to the capacitor 6, and the variable capacitance diode 8 of the antenna tuning circuit 8 is connected.
The tuning voltage VT is applied to the connection point of b and 8b. The first attenuation circuit 2 includes the capacitor 4 and the capacitor 4
Is composed of a pair of PIN diodes 9a and 9b L-connected to each other, and the second attenuation circuit 3 includes the capacitor 5
And a pair of PIN diodes 10a, 10b L-connected to the capacitor 5, the PIN diodes 9a, 9b and 10a, 10b are connected in series to output the AGC voltage of the FM front end IC 22 described later. A limiting resistor 11 for limiting the amount of attenuation is connected between the pair of PIN diodes 10a and 10b that form the second attenuation circuit 3 in the subsequent stage.

The output terminal of the antenna tuning circuit 8 is connected to a first gate G ₁ of a high frequency amplifying element 13 formed of a MOSFET via a coupling capacitor 12, and a drain D of the high frequency amplifying element 13 is connected to a coupling capacitor 14 Via the tuning coil 16 and a pair of variable capacitance diodes 16
b and 16b, which are connected to a high frequency tuning circuit 16a, and the output of this high frequency tuning circuit 16 is the coupling capacitor 1
8, the frequency conversion circuit 19 and the intermediate frequency amplification circuit 2
0 and an FM front end I comprising a gain control circuit 21
It is connected to a fifth terminal which is an input terminal of the frequency conversion circuit 19 of C22 (for example, LA1175 manufactured by Sanyo Electric Co., Ltd.).

The signal input to the antenna terminal 1 is input to the antenna tuning circuit 8 via the capacitors 4, 5 and 6 and selected, and then input to the first gate G ₁ of the high frequency amplifying element 13. Is amplified, is input from the drain D to the high-frequency tuning circuit 16 via the coupling capacitor 14, is selected again, and is then F through the coupling capacitor 18.
Input to the fifth terminal of the M front end IC 22. Fifth
The input signal input to the terminal is converted into an intermediate frequency signal and then output from the eighth terminal and the ninth terminal, respectively, and the output passes through the intermediate frequency transformer T and then the capacitor C and the resistor R ₁
Via the series circuit of the ceramic filter F and the ceramic filter F, the amplified signal is input from the twelfth terminal to the intermediate frequency amplifier circuit 20 and amplified, and the amplified output is output from the fifteenth terminal to the detection stage.

A part of the wideband intermediate frequency signal that has passed through the intermediate frequency transformer T is input to the gain control circuit 21 from the tenth terminal through the series circuit of the capacitor C and the resistor R _2, and the circuit 21 1, PIN of the second attenuation circuit 2, 3
AGC voltage for driving the diode and high frequency amplifier 13
Control AGC voltage is generated, and these AGC voltages are output from the sixth terminal and the thirteenth terminal, respectively.

In the above, when the electric field strength of the antenna input signal becomes strong, the AG for driving the PIN diode output from the gain control circuit 21 of the FM front end IC 22 is output.
Since the C voltage also increases, the first and second attenuating circuits 2 and 3
Since the PIN diodes 9a, 9b and 10a, 10b are driven, and the impedance of the circuit is lowered, the signal input to the antenna input terminal receives the first and second attenuation circuits 2, 3
Attenuated by. And FM front end IC22
When the AGC voltage output from the sixth terminal of the second attenuation circuit 3 is relatively low, the pair of PIN diodes 10a,
Since the limiting resistor 11 connected between 10b limits the current flowing through the PIN diodes 10a and 10b, the damping action is mainly controlled by the first damping circuit 2.

In the above, when the electric field strength of the antenna input signal becomes stronger, the AGC voltage output from the fifth terminal of the FM front end IC 22 also becomes higher, so that the bias voltage of the limiting resistor 11 of the second attenuating circuit 3 becomes higher. Then, the PIN diodes 9a, 9 of the first attenuation circuit 2
While b is saturated, the PIN of the second attenuation circuit 3
The diodes 10a and 10b approach the saturation state with a delay,
In addition to the damping action of the first damping circuit, the damping action of the second damping circuit is performed. That is, the variable capacitance diodes 8b and 8b in the antenna tuning circuit 8 are protected from the strong electric field strength by the damping action of the first and second attenuating circuits 2 and 3 and the tuning deviation does not occur. 1
Insufficient attenuation of the high frequency amplification element 13 before the input by the attenuating circuit 2 is caused by the second attenuating circuit 3 provided in the limiting resistor 11.
It is supplemented by the damping action by.

Next, when a signal of a stronger strong electric field is input, the antenna tuning circuit 8 attenuates the signal due to the capacitor 6 decreasing the tuning degree in addition to the attenuation action of the first and second attenuating circuits 2 and 3. And the variable capacitance diodes 8b, 8
b protects the FM front end IC 22
Since the amplification degree is limited by the control voltage applied to the second gate G ₂ of the high frequency amplification element 13 from the three terminals,
The high frequency amplification element 13 hardly saturates. Note that the second gate G ₂ of the high-frequency amplifying device 13, L 0 _/ DX pin Yes connected, is intended to lower the reception sensitivity for example in conjunction with the tuning operation.

FIG. 2 shows that attenuation circuits are provided in three stages and
1 shows another embodiment in the case where the attenuation effect is sequentially applied from the attenuation circuit close to the antenna input end as the AGC voltage rises with the electric field strength of the antenna input signal. Is connected between the second attenuator circuit 2 and the antenna tuning damping capacitor 6 by connecting a third attenuator circuit 32 in which a capacitor 30 and a pair of PIN diodes 31a and 31b are L-shaped connected to each other.
The IN diodes 31a and 31b are connected to the FM front end I
It is connected to the sixth terminal of C22 in series, and a limiting resistor 33 having a value higher than that of the limiting resistor 11 in the second attenuation circuit 3 is connected between the PIN diodes 31a and 31b.

However, according to this configuration, the electric field strength of the antenna input signal becomes strong, the AGC voltage rises, and the damping action of the second attenuating circuit 3 is saturated, and then the AG
When the C voltage becomes high, the first and second attenuation circuits 2, 3
In addition, the damping of the third damping circuit 32 acts to obtain a large damping effect, and in the configuration of FIG.
When the second attenuation circuit 3 is saturated, the selectivity decreases due to the impedance ratio between the attenuation circuit 3 and the antenna tuning damping capacitor 6, but in the configuration of FIG.
The third attenuating circuit 32 has an advantage that the decrease in selectivity can be delayed to a higher input level.

In FIG. 3, instead of the limiting resistors 11 and 33 for limiting the drive current flowing through the pair of PIN diodes 10a, 10b and 31a, 31b in FIG. 2, in the second attenuating circuit 3, the capacitor 5 and the pair are provided. In the third attenuation circuit 32, a capacitor 35 is connected between the PIN diodes 10a and 10b, and a capacitor 36 is connected between the capacitor 30 and the pair of PIN diodes 31a and 31b. According to this configuration, the second attenuating circuit 3 uses the impedance of the limiting capacitor 35 to provide a pair of PINs.
The attenuation amount by the diodes 10a, 10b is limited, and the attenuation amount by the pair of PIN diodes 31a, 31b in the third attenuating circuit 32 is limited by the impedance of the limiting capacitor 36 having a smaller capacity than the limiting capacitor 35.

In each of the above embodiments, the PIN diodes constituting the plurality of attenuating circuits are connected in series to the AGC voltage. However, FIG. 4 shows the first attenuating circuit 2 in FIG. A pair of PIN diodes 9a and 9b that make up the pair of P diodes that make up the second attenuation circuit 3
The IN diodes 10a and 10b and the pair of PIN diodes 31a and 31b forming the third attenuating circuit 32 are connected in parallel to the sixth terminal of the FM front end IC 22, respectively, and the limiting resistors 11 and 33 are used instead. 2 damping circuit 3 and 3rd damping circuit 32, limiting resistance 40 and 4 respectively
1 shows another embodiment in which the limiting resistors 40 and 4 are connected with the increase of the AGC voltage.
Prior to the second and third damping circuits 3 and 32 limited by 1, the damping action by the first damping circuit 2 becomes dominant first, and then the first damping circuit 2 saturates and is damped by the second damping circuit 3. The action becomes dominant, and
In addition to the damping action of the second damping circuits 2 and 3, the damping action of the third damping circuit 32 is added.

FIG. 5 shows each of the attenuation circuits 2 and 3 in FIG.
A current amplification element 45 between the parallel connection ends of the attenuation circuits 2, 3 and 32 and the sixth terminal of the FM front end IC 22 in order to obtain a necessary and sufficient drive current for operating the first and second drive circuits 32 and 32. FIG. 6 shows another embodiment in the case of
Shows another embodiment in the case of parallel connection corresponding to FIG. 3, and each of the above-mentioned effects is essentially the same as the embodiment described above.

[0018]

As described above, according to the present application, as the electric field strength of the signal input to the antenna terminal increases, the antenna input signal is first attenuated by the first attenuating circuit, and the strong electric field signal is input to the antenna. It is possible to sufficiently protect the variable capacitance diode of the tuning circuit, there is no fear that tuning deviation will occur, and a large attenuation effect can be obtained up to the preceding stage of the high frequency amplification element, so the amplification degree in the high frequency amplification element is large. There is an advantage that the fear of being suppressed and generating intermodulation distortion can be eliminated, the selectivity of the tuning circuit can be maintained up to a high input level, and the circuit configuration is simple.

[Brief description of drawings]

FIG. 1 Electric circuit diagram

2 to 6 are electric circuit diagrams in other embodiments, respectively.

[Explanation of symbols]

2 1st attenuation circuit 3 2nd attenuation circuit 4,5,6,12,35,36 capacitor 8,16 tuning circuit 9a, 9b, 10a, 10b, 31a, 31b PIN
Diode 11, 33, 40, 41 Limiting resistance 13 High frequency amplification element 22 FM front end IC 32 Third attenuation circuit 45 Current amplification element

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[Procedure amendment]

[Submission date] April 4, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Brief explanation of the drawing

[Correction method] Change

[Correction content]

[Brief description of drawings]

FIG. 1 Electric circuit diagram

FIG. 2 is an electric circuit diagram of another embodiment.

FIG. 3 is an electric circuit diagram of another embodiment.

FIG. 4 is an electric circuit diagram of another embodiment.

FIG. 5 is an electric circuit diagram of another embodiment.

FIG. 6 is an electric circuit diagram of another embodiment.

Claims (5)

[Claims] 1. An attenuator circuit having an L-shaped connection between a capacitor and an attenuator is connected in multiple stages between an antenna input end and an antenna tuning circuit, and the attenuator element of the attenuator circuit is connected to an AGC output end. A radio receiver characterized by being connected in series with each other, and provided with a limiting means in a subsequent-stage attenuation circuit so that the attenuation amount is smaller than that in the previous-stage attenuation circuit. 2. An attenuator circuit having an L-shaped connection between a capacitor and an attenuator is connected in multiple stages between an antenna input end and an antenna tuning circuit, and the attenuator of the attenuator circuit is connected to an AGC output end. A radio receiver characterized by being connected in parallel with each other, and further provided with limiting means in a subsequent attenuation circuit so that the amount of attenuation is smaller than that of the previous attenuation circuit. 3. The radio receiver according to claim 2, wherein a current amplification element is connected between the AGC terminal and the parallel connection end of the attenuation circuit. 4. A radio receiver according to claim 1, 2 or 3, wherein the limiting means comprises a resistor. 5. A radio receiver as claimed in claim 1, wherein the limiting means comprises a second capacitor connected between the capacitor and the attenuating element.