JPH0519783B2 - - Google Patents

Description

[Detailed Description of the Invention] [Field of Industrial Application] This invention relates to a method for recording digital data on a recording medium, and in particular, when converting a reproduced signal from serial to parallel, identification of every m bits is performed after access. This relates to a recording method on a recording medium that can be determined up to the point of data.

[Conventional technology]

An example will be explained in which digitized digital data such as image information is magnetically recorded on a magnetic recording medium such as a magnetic disk. For example, the fifth
A recording format as shown in the figure can be considered, which is
One track out of 50 is shown here. In the figure, 25 is a synchronization pattern, 2
6 is the frame address, 27 is the subcode, 28
is a parity of 26 and 27. 29 consists of 25 to 28, C ₁ and C ₂ parities, and 32 bytes of data, and is called a frame. This frame has sector 32 with frame 129, preamble 30, and postamble 31. These four sectors, the index signal 34, and five gaps 33 between them make up one track.
Since this track can be recorded and reproduced sector by sector, an index is provided to detect the cue position of each sector, and a gap and a preamble are provided to correct the deviation at cue.

FIG. 7 is a block diagram of the recording system, where 1 is an input terminal, 2 is a memory circuit, 3 is a code circuit, 4 is a selector, 35 is a preamble and postamble generation circuit, 6 is an 8/10 conversion circuit, and 7 is a block diagram of the recording system. 1 is a synchronization pattern generation circuit, 8 is a selector, 9 is a parallel/serial conversion circuit, 10 is a recording amplifier, and 11 is an output terminal.

FIG. 8 is a block diagram of the reproduction system, in which 12 is an input terminal, 13 is a reproduction amplifier, 14 is an equalization circuit, 15 is an integration circuit, 16 is a pulse detection circuit, 1
7 is PLL, 20 is synchronous pattern detection circuit, 36
is a serial/parallel conversion circuit, 21 is an 8/10 conversion circuit, 22 is a memory circuit, 23 is a decoding circuit, 24
is the output terminal.

The format shown in FIG. 5 is created by a circuit as shown in FIG. First, an input signal from input terminal 1 is recorded in memory circuit 2, and encoder circuit 3 records the input signal from input terminal 1.
Create C ₁ and C ₂ parity. First, a signal for selecting a preamble signal from 35 during the preamble period is sent to the selector 4 from the memory circuit 2, and then output for 129 frames is output from the memory circuit. At that time, the selector 8 selects a synchronization pattern from 7 at the timing to output the synchronization pattern. 9 converts it to a serial signal,
The recording current is optimized by the recording amplifier 10, outputted as a recording signal from 11, and recorded on the disk.

Tmin is usually used for the preamble.
This is a 10-bit pattern "1111111111", but since the preamble is inserted before 8/10 conversion, the 8-bit pattern "11101011" becomes the preamble pattern. “0100010001” or “1100010001” is used as the synchronization pattern. 8/10 modulation modulates an 8-bit pattern into a 10-bit code word, and is used to regulate the run length and to keep the integral value (DSV) when the binary level is ±1 to a finite value. , is a conversion to make it DC-free. Table 1 shows an example of 8/10 conversion. The codeword after conversion is NRZI.
In NRZI, "0" corresponds to no inversion, and "1" corresponds to inversion. FIG. 6 shows the waveform of the synchronization pattern "110001001" when Q'=1. Since 1 and 0 are distinguished depending on whether or not there is inversion, the waveform will be inverted depending on whether the previous data is “1” or “0”. Q in Table 1 is used to decide which one to use, since one pattern has a codeword with a DSV of +2 and a codeword with a DSV of -2. Depending on its use,
Make sure that DSV falls within a finite value.

During reproduction, only data is extracted from the reproduced signal using a circuit as shown in FIG. First, a reproduced signal is input from 12, the signal is amplified by a reproduction amplifier 13, and the waveform is shaped by an equalization circuit 14, an integration circuit 15, and a pulse detection circuit 16. Create a clock using PLL17. Then, the synchronization pattern detection circuit 20
Using the timing at which the synchronization pattern is detected, the serial/parallel converter 36 identifies the serial signal into 10-bit code words, and the 8/10 demodulator 21 demodulates the serial signal into an 8-bit pattern for each byte. After being recorded in the memory circuit 22 and decoded by the decoding circuit 23, only the data is output to 24.

[Problem that the invention seeks to solve]

As shown in FIG. 8, the timing of identifying serial signals into 10-bit code words and converting them to parallel signals relies on the detection of synchronization patterns. The synchronization pattern not only indicates the beginning of a frame, but also has the role of timing the identification of each byte. If the first synchronization pattern following the preamble cannot be detected, the identification of each byte will not be known until the synchronization pattern of the next frame. If the 10-bit codewords are not separated correctly, 8/10 demodulation will not be performed correctly, and as a result, the entire first frame will be unplayable because one byte of the first synchronization pattern cannot be detected. becomes. As shown in Figure 7, up to the synchronization pattern is a preamble.
Since Tmin continues, when a dropout occurs in the synchronization pattern, the identification of each byte is lost.

This invention was made to solve the above-mentioned problems, and even if a synchronization pattern cannot be detected, it is possible to identify each byte and obtain correct playback data by 8/10 demodulation. The purpose of this study is to obtain a recording method for recording media that is possible.

[Means for solving problems]

The recording method on a recording medium according to the present invention includes n
A bit pattern that can be identified as a set of m bits is used in the preamble of data that is converted from (n≧2) bits to m (m>n) bits and recorded.

[Effect]

In the recording method of the recording medium according to the present invention, by detecting the preamble pattern, it is possible to identify every m bits.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described with reference to the drawings, in which the present invention is applied to magnetic recording of digital data of image information on a magnetic recording medium such as a magnetic disk. 1st
In the figure, 5 is a preamble/postamble generation circuit, 18 in FIG. 2 is a preamble detection circuit, and 19 is a serial/parallel conversion circuit. In Figure 4, 40 is 16 in Figure 2.
41 is a register,
42 is an inverting circuit, 43 is a 10-input AND circuit, 4
4 is a preamble detection signal directed to 19 in FIG.

The preamble explained in the conventional example was Tmin, that is, '1111111111', but this is changed to an identifiable pattern, for example, the pattern '0111111111' after 8/10 conversion of '00101011'. for that,
'00101011' is output from the preamble/postamble generation circuit 5 shown in FIG. The preamble, which was '1111111111' in the conventional example, is changed to '0111111111' in the embodiment of the present invention. When playing,
As shown in the block diagram of the playback system in FIG.
Find the identification of every 10 bits. Preamble detection circuit 18 is shown in detail in FIG. In this way, only the most significant bit (MSB) is inverted and AND is performed, so when '0111111111' arrives, the output becomes 1. This timing is the final bit of the byte. Utilizing this timing, the conversion circuit 19 performs serial/parallel conversion, the demodulation circuit 21 performs 8/10 demodulation, and then only data is output as in the conventional example.

With this pattern, each byte can be identified by the preamble as shown in FIG. 8, and even if a dropout occurs in the synchronization pattern, it will not occur that the entire first frame cannot be reproduced. Furthermore, since the preamble has several tens of bytes, if it is an error of several bytes, it is possible to identify each byte.

Note that in the above example, the preamble/postamble generation circuit 5 was placed before the 8/10 modulation circuit 6, but it is placed after the 8/10 modulation circuit 6, and similarly to the synchronization pattern generation circuit 7.
You can also enter a 10-bit pattern directly. Also,
I used '0111111111' as an example, but if you repeat '0101001001' or '0100010010' multiple times, no matter how many bits you shift, the pattern will not be the same unless you shift it by an integer multiple of m bits. Anything is fine. In addition, in the above embodiment, the preamble pattern that already existed in the conventional example was changed, but if there is no corresponding pattern or if it is difficult to change the pattern, it is possible to similarly identify every m bits. A pattern may be added before the multi-byte data. In addition,
In the above embodiment, a recording method on a magnetic recording medium such as a magnetic disk was described, but it is of course applicable to other recording media such as a magneto-optical disk and an optical disk.

〔Effect of the invention〕

As described above, according to the present invention, since a bit pattern that can be identified as a set of m bits is used in the preamble in one frame, a pattern that can be identified as a set of m bits is created before reaching the data part. Since multiple bytes continue, a correct reproduction signal can be obtained without relying on a single byte.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a recording system to which an embodiment of the present invention is applied, Fig. 2 is a block diagram of a reproduction system to which an embodiment of the invention is applied, and Fig. 3 is a block diagram of an embodiment of the invention. 4 is a block diagram of a preamble detection circuit to which an embodiment of the present invention is applied; FIG. 5 is a recording format diagram of an embodiment of the present invention; FIG. 6 is a timing chart showing how to set timing for each byte; 7 is a recording pattern diagram showing the NRZI pattern, FIG. 7 is a block diagram of the recording system according to the conventional embodiment, FIG. 8 is a block diagram of the reproduction system according to the conventional embodiment, and FIG. 9 is a diagram of each byte according to the conventional embodiment FIG. 2 is a timing chart showing how to set the timing. In the figure, 29 is a frame, and 30 is a preamble. In the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. Data in a block consisting of a plurality of frames constituted by a synchronization pattern and a plurality of data signals, and a preamble of a plurality of bits added before the plurality of frames is divided into n (n≧2) bits. In the method of dividing the divided data into m bits and converting the divided data into m (m>n) bits and recording them on a recording medium, the preamble includes a plurality of consecutive bit patterns that can be identified as a set of m bits after being converted to m bits. A method for recording on a recording medium, characterized in that it is used as a recording medium. 2 Divide multiple frames made up of a synchronization pattern and multiple data signals into n (n≧2) bits, convert the divided data into m (m>n) bits, and add a multiple-bit preamble in front of it. 1. A method for recording on a recording medium, characterized in that a plurality of bit patterns that can be identified as a set of m bits are used consecutively as the preamble.