JPH0519047Y2 - - Google Patents

Description

[Detailed description of the invention] (a) Industrial application field The present invention is an ultrasonic Doppler device that uses the ultrasonic Doppler effect to measure the blood flow velocity in a living body and displays the results as an image. Regarding.

(b) Prior art and its problems Conventionally, an ultrasonic Doppler device has been used to measure the blood flow velocity distribution inside the heart.
In this ultrasonic Doppler device, an echo signal obtained by emitting pulsed ultrasonic beams from a transducer is passed through a phase detection circuit to extract a Doppler signal, the extracted Doppler signal is sampled, and temporarily stored in memory. The Doppler signal is transferred to a fast Fourier transform circuit to obtain a frequency spectrum, and the average blood flow velocity is calculated from this frequency spectrum, and the result of this calculation is displayed as an image on a monitor.

Incidentally, the emission repetition frequency of the ultrasound beam needs to be set according to the depth of the region to be diagnosed, and is approximately 10 KHz in the case of cardiac diagnosis. Therefore, if the ultrasonic beam is to be emitted 256 times to obtain data for fast Fourier transform, the time required to sample the Doppler signal is 256÷10KHz=25.6msec. On the other hand, the time required from fast Fourier transformation to image display is about 2 msec. In other words, it takes longer to sample the Doppler signal than the time from fast Fourier transforming the Doppler signal to displaying the image. Therefore, when data processing from Doppler signal sampling to image display is performed serially, sampling takes a lot of time and data is sent to the monitor intermittently, resulting in poor image quality. It is displayed in a mosaic pattern and becomes difficult to see.

To eliminate this inconvenience, conventional devices include
Some devices are configured to read out the Doppler signal stored in the memory every time the cycle from fast Fourier transform to image display ends during sampling of the Doppler signal, so that the data is sent to the monitor without interruption.

However, in the case of conventional devices, even when reading Doppler signals stored in time series in memory, they are always read in the forward direction of the time series, which is the same as the write direction, so that the data is transferred from memory to the fast Fourier transform circuit. The configuration of the processing circuit that transfers the Doppler signal has become complicated.

The present invention was developed in view of the above circumstances, and its purpose is to make it possible to transfer Doppler signals stored in memory to a fast Fourier transform circuit with a simple circuit configuration. do.

(C) Means for Solving the Problems In order to achieve the above object, the present invention provides a method for writing/reading Doppler signals in a memory that stores Doppler signals obtained by emitting pulsed ultrasonic beams. an up-down counter that specifies an address; a latch circuit that latches the count output of the up-down counter when switching from a write state to a read state of the memory;
The ultrasonic Doppler device comprises preset means for loading the count output latched by the latch circuit into the up-down counter when switching from the read state to the write state of the memory.

(d) Function The Doppler signals obtained by pulsed ultrasonic beam radiation are sequentially addressed by the up-down counter and stored in the memory in chronological order. Once the Doppler signals have been stored in the memory, the up-down counter switches to down-counting, and the count output immediately before the switching is latched by the latch circuit. As a result, the Doppler signal stored in memory is
The memory is read backwards in the past from the address position immediately before switching to the read state, and the read Doppler signal is transferred to the fast Fourier transform circuit.

When the required number of Doppler signals are read out, the up-down counter is switched to up-counting, and the count output immediately before transfer, which was latched by the latch circuit, is loaded into the up-down counter by the preset means. As a result, the up-down counter counts up from the count output immediately before transfer, so that the Doppler signals stored in the memory are time-series consistent.

(e) Embodiment FIG. 1 is a block diagram of the main parts of an ultrasonic Doppler device according to an embodiment of the present invention. In the figure, reference numeral 1 indicates the entire main part of the ultrasonic Doppler device, 2 is an A/D converter that digitizes the Doppler signal obtained by emitting pulsed ultrasonic beams, and 4 is the A/D converter 2 that digitizes the Doppler signal. This is a memory that temporarily stores converted Doppler signals.

Reference numeral 6 designates an up-down counter for specifying a write/read address of the Doppler signal for the memory 4, and 8 a latch circuit that latches the count output of the up-down counter when the memory 4 is switched from a write state to a read state.

Reference numeral 10 denotes a one-shot circuit serving as a preset means for loading the count output latched by the latch circuit 8 into the up-down counter 6 when the memory 4 is switched from the read state to the write state.

12 is an inverter, 14 is an OR circuit, 16 is an input terminal for clock pulse A for Doppler signal sampling/writing, 18 is an input terminal for clock pulse B for reading Doppler signals, and 20 is an input terminal for Doppler signal transfer start control signal C. be.

The input terminal 16 of the clock pulse A for Doppler signal sampling/writing is connected to the A/
It is connected to the clock input terminal CK of the D converter 2 and the write input terminal of the memory 4, respectively, and to one input terminal of the OR circuit 14. Further, the input terminal 18 of the clock pulse B for reading the Doppler signal is connected to the OR circuit 1.
This OR circuit 1 is connected to the other input terminal of 4.
The output terminal of 4 is connected to the clock pulse input terminal CK of up-down counter 6. moreover,
Input terminal 2 of Doppler signal transfer start control signal C
0 is the up/down switching terminal DOWN/ of the up/down counter 6 and the one shot circuit 10
and the inverter 12
It is connected to the read input terminal of the memory 4 via.

Next, the writing/reading operation of the Doppler signal in the memory 4 in the device 1 will be explained.

A Doppler signal that is phase-detected is extracted from the echo signal obtained by receiving the ultrasonic echo with a transducer (not shown). The Doppler signal extracted in this way is input to the A/D converter 2.

On the other hand, the clock pulse A for Doppler signal sampling/writing inputted from the input terminal 16 is applied to the A/D converter 2 and is also applied to the clock pulse input terminal CK of the up-down counter 6 via the OR circuit 14.
The A/D converter 2 digitizes the Doppler signal in synchronization with this clock pulse A and sends it to the next stage memory 4. At that time, the up/down switching terminal of up/down counter 6
Since the Doppler signal transfer start control signal C applied to DOWN/ is at the "L" level, the up-down counter 6 is in a count-up state. Therefore, the up-down counter 6 counts up every time the clock pulse A is applied and sequentially specifies the write address of the memory 2. As a result, the Doppler signals are stored in the memory 4 in a time-series manner in the order in which the up-down counter 6 counts up, as indicated by the symbols in FIG.

When a predetermined number of Doppler signals are stored in the memory 4, the Doppler signal transfer start control signal C applied to the input terminal 20 becomes "H" level. Then, the up-down counter 6 switches to a down-counting state in response to the rising timing of the Doppler signal transfer start control signal C, while the latch circuit 8 is activated and the current count output of the up-down counter 6 is latched. . This latched count output is stored in memory 4.
It corresponds to the address specified position immediately before transferring the Doppler signal from. Furthermore, the memory 4 is also switched to a readable state.

In this state, when the clock pulse B for reading the Doppler signal is input from the input terminal 18, this clock pulse B is applied to the clock pulse input terminal CK of the up-down counter 6 via the OR circuit 14, so that the clock pulse B for reading out the Doppler signal is inputted from the input terminal 18. 6 counts down every time the clock pulse B is applied and sequentially designates the read address of the memory 4. Therefore, in this case, the Doppler signal stored in the memory 4 is read out backwards from the address position immediately before the memory 4 switches to the read state, as indicated by the symbol in FIG. . The Doppler signal read from the memory 4 is then transferred to a fast Fourier transform circuit (not shown).

In this way, when the up-down counter 6 sequentially counts down and the necessary number of Doppler signals are read out, the Doppler signal transfer start control signal C applied to the input terminal 20 goes "L".
become the level. Then, up-down counter 6
is switched to an up-count state in response to the fall timing of the Doppler signal transfer start control signal C, while the one-shot circuit 10 is activated and a set pulse is output from the circuit. Since this set pulse is applied to the load terminal LOAD of the up-down counter 6, the count output immediately before transfer, which has already been latched by the latch circuit 8, is loaded into the up-down counter 6. As a result, the up-down counter 6 counts up from the count output immediately before the transfer every time the clock pulse A is applied, and sequentially specifies the write address of the memory 2, as indicated by the symbol in FIG. This allows the Doppler signals stored in the memory 4 to be time-series consistent.

Thereafter, addresses in the memory 4 are sequentially designated by the up-down counter 6 as indicated by the symbols . . . in FIG.

In this way, during sampling of the Doppler signal, the Doppler signal stored in the memory 4 is read out seamlessly and transferred to the fast Fourier transform circuit, so that an apparently smooth image is displayed on the monitor. It turns out.

(F) Effects As described above, the present invention has excellent effects such as being able to transfer the Doppler signal stored in the memory to the fast Fourier transform circuit with a simpler circuit configuration than before. is demonstrated.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a main part of an ultrasonic Doppler device according to an embodiment of the present invention, and FIG. 2 is an explanatory diagram of address designation when writing/reading Doppler signals to/from memory in the same device. 1... Ultrasonic Doppler device, 2... A/D converter, 4... Memory, 6... Up/down counter, 8... Latch circuit, 10... Preset means (one shot circuit).

Claims (1)

[Claims for Utility Model Registration] An up-down counter that specifies a write/read address of the Doppler signal to a memory that stores the Doppler signal obtained by pulsed ultrasonic beam radiation; and a change from the write state to the read state of the memory. a latch circuit that latches the count output of the up-down counter when the memory is switched from a read state to a write state; and a preset means that loads the count output latched by the latch circuit to the up-down counter when the memory is switched from a read state to a write state. An ultrasonic Doppler device characterized in that the Doppler signals stored chronologically in the memory are read out backwards from the address position of the Doppler signal stored immediately before.