JPH05190310A - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPH05190310A
JPH05190310A JP4004020A JP402092A JPH05190310A JP H05190310 A JPH05190310 A JP H05190310A JP 4004020 A JP4004020 A JP 4004020A JP 402092 A JP402092 A JP 402092A JP H05190310 A JPH05190310 A JP H05190310A
Authority
JP
Japan
Prior art keywords
conductor
resistance
resistance value
integrated circuit
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP4004020A
Other languages
Japanese (ja)
Inventor
Yoshihiro Hirota
善弘 廣田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4004020A priority Critical patent/JPH05190310A/en
Publication of JPH05190310A publication Critical patent/JPH05190310A/en
Withdrawn legal-status Critical Current

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  • Parts Printed On Printed Circuit Boards (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Abstract

PURPOSE:To accurately provide low resistance of the specific value or lower than the specific value for a thick film hybrid integrated circuit. CONSTITUTION:For a conductor resistance pattern 13 for a first conductor 11, a distance which allows the required resistance value is calculated by a board lot. Two points in the conductor resistance pattern 13 or the conductor resistance pattern 13 and a second conductor 12 are connected, for example, by bonding a conductor line 14 made of Au or Al so as to bypass the distance.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、厚膜混成集積回路装置
に関し、特に低抵抗値を精度よく得ることのできる混成
集積回路装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thick film hybrid integrated circuit device, and more particularly to a hybrid integrated circuit device capable of accurately obtaining a low resistance value.

【0002】[0002]

【従来の技術】厚膜混成集積回路装置において、抵抗値
を精度よく得る方法として図6に示すように導体パター
ン1及び2の間に接続された厚膜印刷抵抗5をレーザー
等を用いてパターンの一部を除去することによりレーザ
ーカット部6を形成し、抵抗値を所望の値に追込む技術
が知られている。これをトリミングというがこの方法に
よれば精度1%以内の抵抗値を得ることは容易である
が、修正前の厚膜印刷抵抗5の抵抗値を最小として高抵
抗値への修正にのみ用いられる手法である。
2. Description of the Related Art In a thick film hybrid integrated circuit device, as a method of accurately obtaining a resistance value, a thick film printing resistor 5 connected between conductor patterns 1 and 2 is patterned by using a laser or the like as shown in FIG. There is known a technique in which the laser cut portion 6 is formed by removing a part of the above, and the resistance value is adjusted to a desired value. Although this is called trimming, it is easy to obtain a resistance value within 1% accuracy by this method, but it is used only for correction to a high resistance value by minimizing the resistance value of the thick film printing resistor 5 before correction. It is a technique.

【0003】然るに、低抵抗値を得ようとすると厚膜印
刷抵抗5のパターン面積が非常に増大し装置が大きくな
ってしまうため、実用上1Ω程度までしか使用されてい
ない。これに対して、更に低抵抗値を必要とする場合に
は、導体パターンを抵抗として用いることが一般に行わ
れている。
However, when trying to obtain a low resistance value, the pattern area of the thick film printed resistor 5 is greatly increased and the device becomes large. Therefore, it is practically used only up to about 1Ω. On the other hand, when a lower resistance value is required, the conductor pattern is generally used as the resistance.

【0004】[0004]

【発明が解決しようとする課題】上述したように厚膜印
刷抵抗で低抵抗を形成する場合には、実用上1Ω程度ま
でしか形成することができない。しかしながら、電源回
路等で電流制限を数Aまでとしたいときなど、数100
mΩの低抵抗を必要とする場合がよくある。この場合に
は導体パターンを使った導体抵抗を使用する。しかし導
体抵抗の場合、その精度が±40%程度であるのに対
し、厚膜抵抗のようにトリミングすると、レーザーカッ
ト部の状態が経時変化により抵抗値が変化してしまう危
険があるため抵抗値の調整ができないという問題があ
る。このため実用上において精度を必要とする回路に使
用できないという問題があった。
As described above, when the low resistance is formed by the thick film printing resistance, it can be practically formed only up to about 1Ω. However, if you want to limit the current to several amps in a power supply circuit, etc.
Often a low resistance of mΩ is required. In this case, a conductor resistance using a conductor pattern is used. However, in the case of conductor resistance, the accuracy is about ± 40%, but when trimming like thick film resistance, there is a danger that the resistance value of the laser cut part may change due to aging, so the resistance value There is a problem that it cannot be adjusted. Therefore, there is a problem that it cannot be used in a circuit that requires precision in practical use.

【0005】本発明の課題は、導体抵抗パターンの面積
を増大させることなく低抵抗を精度よく得られる混成集
積回路装置を提供することにある。
An object of the present invention is to provide a hybrid integrated circuit device which can accurately obtain low resistance without increasing the area of the conductor resistance pattern.

【0006】[0006]

【課題を解決するための手段】本発明の混成集積回路装
置は、第1の導体部と、この第1の導体部から離間して
設けられている第2の導体部と、前記第1並びに第2の
導体部間の抵抗を導体抵抗パターンを用いて形成する如
くされた混成集積回路装置において、前記導体抵抗パタ
ーンの一部に接続され前記導体抵抗パターンより低抵抗
を有する抵抗値低下調整手段から構成されている。
A hybrid integrated circuit device according to the present invention includes a first conductor portion, a second conductor portion provided apart from the first conductor portion, the first and second conductor portions. In a hybrid integrated circuit device in which the resistance between the second conductor portions is formed by using a conductor resistance pattern, a resistance value decrease adjusting means connected to a part of the conductor resistance pattern and having a lower resistance than the conductor resistance pattern. It consists of

【0007】[0007]

【作用】離間した複数の導体部間の抵抗値を導体抵抗パ
ターンを用いて形成するに際し、導体抵抗パターン内部
の2点間あるいは導体抵抗パターンと他の導体部との間
を導電線等の抵抗値低下調整手段で接続することにより
導体抵抗パターンの面積を増大することなく精度よい低
抵抗値への調整が行われる。
When the resistance value between a plurality of conductor portions separated from each other is formed by using the conductor resistance pattern, a resistance such as a conductive wire is provided between two points inside the conductor resistance pattern or between the conductor resistance pattern and another conductor portion. By connecting with the value reduction adjusting means, it is possible to accurately adjust to a low resistance value without increasing the area of the conductor resistance pattern.

【0008】[0008]

【実施例】次に本発明を図面を参照して説明する。図1
は第1の実施例の構造を示す図で、図2は導体抵抗値を
ボンディング間距離を変更して調整することを説明する
図である。図1において、第1の導体部11から引き出
され第2の導体部12に接続された導体抵抗パターン1
3が導体抵抗として使われる。導体抵抗値は、導体抵抗
パターンが基板上に印刷、焼成される際の製造ばらつき
により±40%程度のばらつきを持っている。しかしな
がら、同一基板ロット内のばらつきは数%内に抑えるこ
とが可能であり、本発明はこの性質を利用したものであ
る。
The present invention will be described below with reference to the drawings. Figure 1
FIG. 3 is a diagram showing the structure of the first embodiment, and FIG. 2 is a diagram for explaining adjusting the conductor resistance value by changing the bonding distance. In FIG. 1, the conductor resistance pattern 1 is drawn out from the first conductor portion 11 and connected to the second conductor portion 12.
3 is used as a conductor resistance. The conductor resistance value has a variation of about ± 40% due to manufacturing variations when the conductor resistance pattern is printed and fired on the substrate. However, the variation within the same substrate lot can be suppressed within several percent, and the present invention utilizes this property.

【0009】即ち、同一基板ロット毎に長さX0に対す
る導体抵抗値を確認し、必要となる抵抗値を示す距離
(X0−X1)を求める。そして導体抵抗パターン13
の内部でX1の距離の間をAu又はAlからなる導電線
14をボンディングにより接続する。このようにして厚
膜混成集積回路装置で導体抵抗パターンとして用いられ
るAgPdあるいはAgPtの持つ抵抗値をこの距離X
1の間で極端に下げることができ、ほぼ0Ωとみなすこ
とができる。即ち、導電線により電流のバイパス経路を
形成することになり、残るX0−X1の距離の導体抵抗
パターン部だけが導体抵抗として寄与することになる。
That is, the conductor resistance value for the length X0 is confirmed for each same substrate lot, and the distance (X0-X1) indicating the required resistance value is obtained. And the conductor resistance pattern 13
Inside, the conductive wire 14 made of Au or Al is connected by bonding for a distance X1. In this way, the resistance value of AgPd or AgPt used as the conductor resistance pattern in the thick film hybrid integrated circuit device is set to this distance X
It can be extremely lowered between 1 and can be regarded as almost 0Ω. In other words, the conductive wire forms a bypass path for the current, and only the remaining conductor resistance pattern portion of the distance X0-X1 contributes as the conductor resistance.

【0010】このようにして図2(A),(B),
(C)のように基板ロット単位で所望の導体抵抗値が得
られるように、ボンディング間距離を変えて導体抵抗値
を調整する。ここで導体抵抗パターン13の長さX0を
2mm以上に設定しておけば導電線14の位置ずれによ
る抵抗値ずれは、5%程度に抑えることができ、基板毎
の抵抗値ばらつきを考慮しても±10%の精度で低抵抗
を実現することができる。
In this way, FIG. 2 (A), (B),
The conductor resistance value is adjusted by changing the inter-bonding distance so that a desired conductor resistance value can be obtained for each substrate lot as shown in (C). Here, if the length X0 of the conductor resistance pattern 13 is set to 2 mm or more, the resistance value deviation due to the position deviation of the conductive wire 14 can be suppressed to about 5%, and the resistance value variation among the substrates is taken into consideration. It is possible to realize low resistance with an accuracy of ± 10%.

【0011】次に図3は第2の実施例の構造を示す図
で、図4は導体抵抗値をボンディング位置を変えて調整
することを説明する図である。図3において、第1の導
体部11より引き出された導体抵抗パターン13は、第
2の導体部12とパターン的に分離された構造である。
導体抵抗パターン13の抵抗値の調整は、第1の実施例
と同様に同一基板ロット毎に長さX0に対する抵抗値を
確認し、そして必要となる抵抗値を示す位置(X0−X
1)を求め、この位置と第2の導体部12とをAu又は
Alの導電線14にて接続することにより行う。
Next, FIG. 3 is a diagram showing the structure of the second embodiment, and FIG. 4 is a diagram for explaining adjusting the conductor resistance value by changing the bonding position. In FIG. 3, the conductor resistance pattern 13 drawn out from the first conductor portion 11 has a structure that is patternwise separated from the second conductor portion 12.
The adjustment of the resistance value of the conductor resistance pattern 13 is performed by confirming the resistance value with respect to the length X0 for each lot of the same substrate as in the first embodiment, and displaying the necessary resistance value (X0-X).
1) is obtained, and this position and the second conductor portion 12 are connected by a conductive wire 14 of Au or Al.

【0012】即ち、図4(A),(B),(C)のよう
に基板ロット単位で所望の抵抗値が得られるように導体
抵抗パターン13内のボンディング位置を変化させるこ
とにより導体抵抗値を調整する。
That is, as shown in FIGS. 4A, 4B and 4C, the conductor resistance value is changed by changing the bonding position in the conductor resistance pattern 13 so that a desired resistance value can be obtained for each substrate lot. Adjust.

【0013】本実施例によれば第1の実施例と同様に±
10%の精度を得ることができる。また、導体抵抗パタ
ーン13と第2の導体部12がパターンとして分離され
ているため、この間に別のパターンを配置することがで
き、設計の自由度を上げることができる。また、図5は
第3の実施例を示す図で、第2の実施例に対して導体抵
抗パターン13に並列に1Ω程度の厚膜印刷抵抗15を
接続したものである。一般に導体抵抗は電流検出源とし
て使用されることが多く、抵抗値100mΩ〜500m
Ωがよく使用される。
According to this embodiment, as in the first embodiment,
An accuracy of 10% can be obtained. Further, since the conductor resistance pattern 13 and the second conductor portion 12 are separated as a pattern, another pattern can be arranged between them and the degree of freedom in design can be increased. Further, FIG. 5 is a diagram showing a third embodiment, in which a thick film printed resistor 15 of about 1Ω is connected in parallel to the conductor resistance pattern 13 as compared with the second embodiment. Generally, the conductor resistance is often used as a current detection source, and the resistance value is 100 mΩ to 500 m.
Ω is often used.

【0014】この程度の領域では、厚膜印刷抵抗15の
トリミングによるレーザーカット部16により+10%
程度抵抗値の可変を行うことができ、第2の実施例と比
較してより精度を上げることができ、所望の抵抗値に対
して±5%程度まで追込むことができる。
In this region, the laser cut portion 16 by trimming the thick film printing resistor 15 causes + 10%.
The resistance value can be varied to some extent, the accuracy can be further improved as compared with the second embodiment, and the resistance value can be increased to about ± 5% with respect to the desired resistance value.

【0015】なお、上記各実施例において抵抗値低下調
整手段として導電線を用いたが、導電線に代えて導体抵
抗パターンより低抵抗値の他の部材を用いることも可能
である。
Although the conductive wire is used as the resistance value lowering adjusting means in each of the above embodiments, it is possible to use another member having a resistance value lower than that of the conductor resistance pattern instead of the conductive wire.

【0016】[0016]

【発明の効果】本発明によれば、従来±40%程度の精
度が限度であった低抵抗値の導体抵抗パターンをこのパ
ターンの面積を増大させることなく±5%程度の精度ま
で得ることが可能となった。この結果、回路構成が容易
になると共に特性値の精度が上がるという効果が得られ
た。
According to the present invention, it is possible to obtain a conductor resistance pattern having a low resistance value, which has hitherto been limited to an accuracy of about ± 40%, to an accuracy of about ± 5% without increasing the area of the pattern. It has become possible. As a result, the effect that the circuit configuration is easy and the accuracy of the characteristic value is improved is obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】図1は本発明の第1の実施例の要部拡大図であ
る。
FIG. 1 is an enlarged view of a main part of a first embodiment of the present invention.

【図2】図2(A),(B),(C)は図1に示した本
発明に係わる第1の実施例において、導体抵抗値をボン
ディング間距離により調整する例を示した図である。
2A, 2B, and 2C are views showing an example of adjusting the conductor resistance value by a bonding distance in the first embodiment according to the present invention shown in FIG. is there.

【図3】図3は本発明の第2の実施例の要部拡大図であ
る。
FIG. 3 is an enlarged view of a main part of the second embodiment of the present invention.

【図4】図4(A),(B),(C)は図3に示した本
発明に係わる第2の実施例において、導体抵抗値をボン
ディング間距離により調整する例を示した図である。
4 (A), (B), and (C) are diagrams showing an example of adjusting the conductor resistance value by a bonding distance in the second embodiment according to the present invention shown in FIG. is there.

【図5】図5は本発明の第3の実施例の要部拡大図であ
る。
FIG. 5 is an enlarged view of a main part of a third embodiment of the present invention.

【図6】図6は従来の抵抗値調整を説明するための図で
ある。
FIG. 6 is a diagram for explaining a conventional resistance value adjustment.

【符号の説明】[Explanation of symbols]

11…第1の導体部 12…第2の導体部 13…導体抵抗パターン 14…導電線 15…厚膜印刷抵抗 16…レーザーカット部 11 ... 1st conductor part 12 ... 2nd conductor part 13 ... Conductor resistance pattern 14 ... Conductive wire 15 ... Thick film printing resistor 16 ... Laser cut part

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 第1の導体部と、この第1の導体部から
離間して設けられている第2の導体部と、前記第1並び
に第2の導体部間の抵抗を導体抵抗パターンを用いて形
成する如くされた混成集積回路装置において、前記導体
抵抗パターンの一部に接続され前記導体抵抗パターンよ
り低抵抗を有する抵抗値低下調整手段を具備することを
特徴とする混成集積回路装置。
1. A first conductor portion, a second conductor portion provided apart from the first conductor portion, and a resistance between the first and second conductor portions are defined by a conductor resistance pattern. A hybrid integrated circuit device, which is formed by using the hybrid integrated circuit device, further comprising resistance value lowering adjusting means connected to a part of the conductor resistance pattern and having a resistance lower than that of the conductor resistance pattern.
【請求項2】 前記導体抵抗パターンの一端が前記第1
の導体部に接続され、前記導体抵抗パターンの他端が前
記第2の導体部に接続され、前記抵抗値低下調整手段が
前記導体抵抗パターンの一部に両端が接続された導電線
であることを特徴とする請求項1記載の混成集積回路装
置。
2. One end of the conductor resistance pattern is the first
Of the conductor resistance pattern, the other end of the conductor resistance pattern is connected to the second conductor part, and the resistance value lowering adjusting means is a conductive wire having both ends connected to a part of the conductor resistance pattern. The hybrid integrated circuit device according to claim 1, wherein:
【請求項3】 前記導体抵抗パターンの一端が前記第1
の導体部に接続され、前記抵抗値低下調整手段が前記導
体抵抗パターンの一部と前記第2の導体部間を橋絡する
導電線であることを特徴とする請求項1記載の混成集積
回路装置。
3. One end of the conductor resistance pattern is the first
2. The hybrid integrated circuit according to claim 1, wherein the resistance value lowering adjusting means is a conductive wire that is connected to the conductor portion and bridges between a part of the conductor resistance pattern and the second conductor portion. apparatus.
【請求項4】 前記第1の導体部と前記第2の導体部間
に厚膜印刷抵抗が接続されていることを特徴とする請求
項3記載の混成集積回路装置。
4. The hybrid integrated circuit device according to claim 3, wherein a thick film printed resistor is connected between the first conductor portion and the second conductor portion.
【請求項5】 前記厚膜印刷抵抗はレーザーカットによ
り抵抗値調整が施されていることを特徴とする請求項4
記載の混成集積回路装置。
5. The thick film printing resistor has a resistance value adjusted by laser cutting.
A hybrid integrated circuit device as described.
JP4004020A 1992-01-13 1992-01-13 Hybrid integrated circuit device Withdrawn JPH05190310A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4004020A JPH05190310A (en) 1992-01-13 1992-01-13 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4004020A JPH05190310A (en) 1992-01-13 1992-01-13 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPH05190310A true JPH05190310A (en) 1993-07-30

Family

ID=11573291

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4004020A Withdrawn JPH05190310A (en) 1992-01-13 1992-01-13 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPH05190310A (en)

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Effective date: 19990408