JPH0516785B2 - - Google Patents
Info
- Publication number
- JPH0516785B2 JPH0516785B2 JP60245410A JP24541085A JPH0516785B2 JP H0516785 B2 JPH0516785 B2 JP H0516785B2 JP 60245410 A JP60245410 A JP 60245410A JP 24541085 A JP24541085 A JP 24541085A JP H0516785 B2 JPH0516785 B2 JP H0516785B2
- Authority
- JP
- Japan
- Prior art keywords
- gain control
- circuits
- control circuit
- circuit
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000015572 biosynthetic process Effects 0.000 claims description 8
- 238000003786 synthesis reaction Methods 0.000 claims description 8
- 230000002194 synthesizing effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 6
- 230000006866 deterioration Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はテレビスタジオ伝送に関し、特に映像
信号合成装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to television studio transmission, and more particularly to a video signal synthesis device.
従来の映像信号合成回路は、例えば第３図に示
すように、入力端子１−１，１−２，２−１，２
−２，３−１，３−２、切替回路４，５，６，
７，８，９，１６，１７，１８，１９，２０，２
１、位相調整回路１０，１１，１２，１３，１４
−１，１４−２，１５−１，１５−２、利得制御
回路２２，２３，２４、出力端子２５，２６，２
７で構成されていた。
For example, as shown in FIG. 3, a conventional video signal synthesis circuit has input terminals 1-1, 1-2, 2-1, 2.
-2, 3-1, 3-2, switching circuit 4, 5, 6,
7, 8, 9, 16, 17, 18, 19, 20, 2
1. Phase adjustment circuit 10, 11, 12, 13, 14
-1, 14-2, 15-1, 15-2, gain control circuit 22, 23, 24, output terminal 25, 26, 2
It consisted of 7.
入力端子１−１，１−２，２−１，２−２，３
−１，３−２へ入力映像信号が供給される。入力
端子１−１，１−２の入力映像信号は、それぞれ
切替回路４，５へ利得制御回路２３の出力信号と
ともに供給されている。この切替回路４，５は系
統条件により切替えられ、出力信号を、それぞれ
切替回路１６，１７および位相調整回路１０，１
１へ供給している。切替回路１６，１７は、切替
回路４，５と同じ系統条件によつて切替えられ、
それぞれ利得制御回路２２へ供給される。さら
に、利得制御回路２２の出力信号は、出力端子２
５へ第１の系統の出力信号として供給される。同
様にして、入力端子２−１，２−２の入力映像信
号は、利得制御回路２２の出力信号とを切替る切
替回路６，７を経て、さらに、位相調整回路１
２，１３を経て、切替回路１８，１９へ供給され
る。この出力信号は、利得制御回路２３へ供給さ
れ、出力信号は、出力端子２６へ第２の系統の出
力信号として出力される。さらに、入力端子３−
１，３−２の入力映像信号は利得制御回路２２，
２３の出力信号とともに、切替器８，９を経て、
さらに、位相調整回路１４−１，１４−２，１５
−１，１５−２を経て切替回路２０，２１へ供給
される。この出力信号は利得制御回路２４へ供給
され、出力信号は出力端子２７へ第３の系統の出
力信号として出力される。 Input terminals 1-1, 1-2, 2-1, 2-2, 3
Input video signals are supplied to -1 and 3-2. The input video signals of the input terminals 1-1 and 1-2 are supplied to the switching circuits 4 and 5, respectively, together with the output signal of the gain control circuit 23. The switching circuits 4 and 5 are switched depending on the system conditions, and the output signals are transferred to the switching circuits 16 and 17 and the phase adjustment circuits 10 and 1, respectively.
1. The switching circuits 16 and 17 are switched according to the same system conditions as the switching circuits 4 and 5,
Each is supplied to the gain control circuit 22. Furthermore, the output signal of the gain control circuit 22 is transmitted to the output terminal 2.
5 as the output signal of the first system. Similarly, the input video signals of the input terminals 2-1 and 2-2 pass through the switching circuits 6 and 7 that switch between the output signal of the gain control circuit 22 and the phase adjustment circuit 1.
2 and 13, it is supplied to switching circuits 18 and 19. This output signal is supplied to the gain control circuit 23, and the output signal is outputted to the output terminal 26 as an output signal of the second system. Furthermore, input terminal 3-
The input video signals 1 and 3-2 are sent to the gain control circuit 22,
Along with the output signal of 23, it passes through the switchers 8 and 9,
Furthermore, phase adjustment circuits 14-1, 14-2, 15
-1 and 15-2, and are supplied to the switching circuits 20 and 21. This output signal is supplied to the gain control circuit 24, and the output signal is outputted to the output terminal 27 as an output signal of the third system.
この方式によれば、第４図に示すように利得制
御回路２２，２３，２４を縦続接続した系統を実
現した場合、利得制御回路２４の入力となる切替
回路２０までの映像系統が、入力端子１−１から
見た場合、切替回路４，１６，６，１８，８，２
０と切替回路を６台経由するため、映像特性の劣
化および映像位相の遅延の増大という欠点があ
り、また、映像系統を切替る時、切替回路が多数
あるため、制御方式も複雑となる欠点がある。
According to this method, when a system in which gain control circuits 22, 23, and 24 are connected in cascade as shown in FIG. When viewed from 1-1, switching circuits 4, 16, 6, 18, 8, 2
0 and six switching circuits, which has the drawback of deteriorating video characteristics and increasing video phase delay.Also, when switching video systems, there are many switching circuits, so the control system is complicated. There is.
本発明の映像信号合成装置は、複数の入力映像
信号を受け、映像信号の利得を制御信号によりそ
れぞれ独立に制御し、かつ合成することができる
第１から第３の系統の利得制御回路と、前記３系
統の利得制御回路の出力を受ける第１から第３の
位相調整回路と、第１および第２系統の利得制御
回路の出力を受ける第１の切替回路と、第１の切
替回路の２本の出力を受け、第１と第２の系統の
利得制御回路の出力信号を合成する第４の利得制
御回路と、第１、第２の位相調整回路の出力と、
第４の利得制御回路の出力信号とを受ける第２の
切替回路と、第１から第３の位相調整回路の出力
と、第４の利得制御回路の出力とを受ける第３の
切替回路と、第３の切替回路の２本の出力信号を
合成する第５の利得制御回路を有する。
The video signal synthesis device of the present invention includes gain control circuits of first to third systems that can receive a plurality of input video signals, independently control the gain of the video signals by a control signal, and synthesize the video signals; first to third phase adjustment circuits that receive the outputs of the three systems of gain control circuits; a first switching circuit that receives the outputs of the first and second gain control circuits; and two of the first switching circuits. a fourth gain control circuit that receives the output of the book and combines the output signals of the gain control circuits of the first and second systems; and the outputs of the first and second phase adjustment circuits;
a second switching circuit that receives the output signal of the fourth gain control circuit; a third switching circuit that receives the outputs of the first to third phase adjustment circuits and the output of the fourth gain control circuit; It has a fifth gain control circuit that combines two output signals of the third switching circuit.
第１から第３の系統の映像出力信号を出力する
場合、第１の系統の利得制御回路の出力信号と第
２の系統の利得制御回路の出力信号は第４の利得
制御回路で合成され、さらに、第３の系統の利得
制御回路の出力信号とそれ以外の系統の出力信号
は第５の利得制御回路で合成されるので、映像系
統が短かくなり、特性の劣化も改善され、制御方
式も容易となる。 When outputting video output signals of the first to third systems, the output signal of the first system gain control circuit and the output signal of the second system gain control circuit are combined in a fourth gain control circuit, Furthermore, since the output signal of the gain control circuit of the third system and the output signal of the other systems are combined in the fifth gain control circuit, the video system is shortened, the deterioration of characteristics is improved, and the control system It also becomes easier.
次に、本発明の実施例について図面を参照して
説明する。
Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の映像信号合成装置の一実施例
を示すブロツク図、第２図はその接続系統図であ
る。 FIG. 1 is a block diagram showing an embodiment of the video signal synthesis apparatus of the present invention, and FIG. 2 is a connection diagram thereof.
入力映像信号は入力端子１−１，１−２を経由
し、利得制御回路４へ供給される。また、入力端
子２−１，２−２からの入力映像信号は利得制御
回路５へ供給される。利得制御回路４，５の出力
信号は、それぞれ位相調整回路７，８および切替
回路１０，１１へ供給される。切替回路１０，１
１の出力信号は利得制御回路１６へ供給され利得
制御される。さらに、入力端子３−１，３−２へ
供給される入力映像信号は利得制御回路６で利得
制御され、位相調整回路９を経て切替回路１２，
１３へ供給される。切替回路１２，１３は位相調
整回路７，８，９および利得制御回路１６の出力
信号とを切替えて、利得制御回路１７へ供給す
る。切替回路１４，１５は、位相調整回路７，８
および利得制御回路１６の信号を切替え、出力端
子１８，１９へ第１、第２の出力映像信号として
出力する。また、利得制御回路１７の出力信号は
出力端子２０へ出力される。 The input video signal is supplied to the gain control circuit 4 via input terminals 1-1 and 1-2. Further, input video signals from input terminals 2-1 and 2-2 are supplied to a gain control circuit 5. Output signals of gain control circuits 4 and 5 are supplied to phase adjustment circuits 7 and 8 and switching circuits 10 and 11, respectively. Switching circuit 10,1
The output signal of 1 is supplied to a gain control circuit 16 and gain-controlled. Further, the input video signals supplied to the input terminals 3-1 and 3-2 are gain-controlled by a gain control circuit 6, passed through a phase adjustment circuit 9, and then passed through a switching circuit 12,
13. The switching circuits 12 and 13 switch between the output signals of the phase adjustment circuits 7 , 8 , and 9 and the gain control circuit 16 and supply them to the gain control circuit 17 . The switching circuits 14 and 15 are phase adjustment circuits 7 and 8
and the signals of the gain control circuit 16 are switched and outputted to the output terminals 18 and 19 as first and second output video signals. Further, the output signal of the gain control circuit 17 is outputted to the output terminal 20.
この映像系統により、第２図において、利得制
御回路４，１６，１７を縦続接続して、入力端子
１−１，１−２，２−２，３−２の入力映像信号
を合成し、出力端子２０へ出力する場合、入力端
子１−１の入力映像信号に着目すると、切替回路
１０，１２の２段のみ経由することとなり、映像
系統の簡素化が図られている。これにより、出力
信号の映像の特性劣化を防ぐことが可能となり、
かつ、第２図以外の系統も容易な制御方式で実現
できる。また、利得制御回路４，５，６での映像
位相が全く同じため、入力信号の位相管理が利得
制御回路４，５，６の前段では不用となる。 With this video system, in FIG. 2, gain control circuits 4, 16, and 17 are connected in cascade to synthesize input video signals of input terminals 1-1, 1-2, 2-2, and 3-2, and output When outputting to the terminal 20, focusing on the input video signal of the input terminal 1-1, it passes through only two stages of switching circuits 10 and 12, thereby simplifying the video system. This makes it possible to prevent deterioration of the video characteristics of the output signal.
In addition, systems other than those shown in FIG. 2 can be realized using a simple control method. Furthermore, since the video phases in the gain control circuits 4, 5, and 6 are exactly the same, phase management of the input signal is not necessary at the stage before the gain control circuits 4, 5, and 6.
なお、本実施例では、利得制御回路４，５，６
は２信号扱うものとしているが、３本以上の信号
を扱う利得制御回路であつても、同様な効果が得
られることは明白である。 Note that in this embodiment, the gain control circuits 4, 5, 6
Although the above is assumed to handle two signals, it is clear that similar effects can be obtained even with a gain control circuit that handles three or more signals.
以上説明したように本発明は、３系統の入力映
像信号についてそれぞれの利得制御回路（第１、
第２、第３の利得制御回路）、位相調整回路で利
得制御、位相調整を行なつた後、切替回路を介し
て、新たに追加した２個の利得制御回路（第４、
第５の利得制御回路）で、第１の系統の利得制御
回路の出力信号と第２の系統の利得制御回路の出
力信号、第３の系統の利得制御回路の出力信号
と、それ以外の系統とを合成することにより、映
像系統が短かくなり、特性の劣化も改善され、制
御方式も容易となる効果がある。
As explained above, the present invention provides gain control circuits (first,
After performing gain control and phase adjustment with the second and third gain control circuits (second and third gain control circuits) and phase adjustment circuits, the two newly added gain control circuits (fourth and
5th gain control circuit), the output signal of the gain control circuit of the first system, the output signal of the gain control circuit of the second system, the output signal of the gain control circuit of the third system, and the output signal of the gain control circuit of the other system. By combining these, the video system can be shortened, characteristic deterioration can be improved, and the control system can be simplified.
第１図は本発明の映像信号合成装置の一実施例
を示すブロツク図、第２図は第１図の映像信号合
成装置の接続系統図、第３図は従来例を示すブロ
ツク図、第４図は第３図の映像信号合成装置の接
続系統図である。
１−１，１−２，２−１，２−２，３−１，３
−２……入力端子、１８，１９，２０……出力端
子、４，５，６，１６，１７……利得制御回路、
１０，１１，１２，１３，１４，１５……切替回
路、７，８，９……位相調整回路。
FIG. 1 is a block diagram showing an embodiment of the video signal synthesis device of the present invention, FIG. 2 is a connection system diagram of the video signal synthesis device of FIG. 1, FIG. 3 is a block diagram showing a conventional example, and FIG. The figure is a connection system diagram of the video signal synthesis device of FIG. 3. 1-1, 1-2, 2-1, 2-2, 3-1, 3
-2...Input terminal, 18,19,20...Output terminal, 4,5,6,16,17...Gain control circuit,
10, 11, 12, 13, 14, 15... switching circuit, 7, 8, 9... phase adjustment circuit.
Claims (1)
を制御信号によりそれぞれ独立に制御し、かつ合
成することができる第１から第３系統の利得制御
回路と、 前記３系統の利得制御回路の出力を受ける第１
から第３の位相調整回路と、 第１および第２の系統の利得制御回路の出力を
受ける第１の切替回路と、 第１の切替回路の２本の出力を受け、第１と第
２の系統の利得制御回路の出力信号を合成する第
４の利得制御回路と、 第１、第２の位相調整回路の出力と、第４の利
得制御回路の出力信号とを受ける第２の切替回路
と、 第１から第３の位相調整回路の出力と、第４の
利得制御回路の出力とを受ける第３の切替回路
と、 第３の切替回路の２本の出力信号を合成する第
５の利得制御回路を有する映像信号合成装置。[Scope of Claims] 1. Gain control circuits of first to third systems capable of receiving a plurality of input video signals, independently controlling the gain of each video signal using a control signal, and synthesizing the video signals; and the three systems. The first receiving the output of the gain control circuit of
a third phase adjustment circuit; a first switching circuit that receives the outputs of the gain control circuits of the first and second systems; a fourth gain control circuit that combines the output signals of the gain control circuits of the system; and a second switching circuit that receives the outputs of the first and second phase adjustment circuits and the output signal of the fourth gain control circuit. , a third switching circuit that receives the outputs of the first to third phase adjustment circuits and the output of the fourth gain control circuit, and a fifth gain that combines the two output signals of the third switching circuit. A video signal synthesis device with a control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60245410A JPS62105582A (en) | 1985-10-31 | 1985-10-31 | Video signal synthesizing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60245410A JPS62105582A (en) | 1985-10-31 | 1985-10-31 | Video signal synthesizing device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62105582A JPS62105582A (en) | 1987-05-16 |
| JPH0516785B2 true JPH0516785B2 (en) | 1993-03-05 |
Family
ID=17133237
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60245410A Granted JPS62105582A (en) | 1985-10-31 | 1985-10-31 | Video signal synthesizing device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62105582A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01109875A (en) * | 1987-10-22 | 1989-04-26 | Nec Corp | Video mixer |
| JP2880724B2 (en) * | 1989-03-28 | 1999-04-12 | 日本放送協会 | Delay adjustment device for real-time data processing circuit |
-
1985
- 1985-10-31 JP JP60245410A patent/JPS62105582A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62105582A (en) | 1987-05-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |