JPH0514299A - Path checking system of cross connector - Google Patents

Abstract

PURPOSE:To realize the path checking system of a cross connector which can decide the troubled place by using a path checking detecting result for each output line. CONSTITUTION:A pattern inserting part 10, line setting processing parts 21-2n, pattern detecting parts 31-3n and a troubled place detecting part 40 are equipped, and by the pattern inserting part 10, a checking pattern is inserted into an input signal to input from plural input lines I1-In, the cross connection is performed so as to output the same checking pattern to all output lines O1-On by the line setting processing parts 21-2n, and by the pattern detecting parts 31-3n, the checking pattern in the output lines O1-On is compared with the correct checking pattern for the output lines O1-On, and from the output, by the troubled place detecting part 40, the troubled place is decided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for checking a path of a cross connect device. FIG. 3 shows a diagram for explaining the cross-connect connection. FIG. 3 shows an example in which the input lines are four lines A to D and the output lines are four lines W to Z. The line A has time slots A1, A2, A3,
..., but the time slots B1, B2, B on the line B
, And so on to the line C and the line D, the time slots C1, C2, C3, ..., D1, D2, D
3, ..., The cross-connect device 10 is housed.
0, line W has time slots A1, B2, C3, ...
In the same manner, the time slots shown in the figure are connected to line X, line Y, and line Z for output.

As described above, the cross-connect device 100 outputs an arbitrary time slot input from an arbitrary line to an arbitrary time slot of an arbitrary line. In recent communication devices, a redundant configuration is adopted in order to avoid line disconnection due to a failure, the line is constantly monitored, and the line is switched when a failure is detected.

The cross-connect device 100 is used for such line switching. Since a line is always set in the relay device, it is easy to detect a failure. However, in the cross-connect device 100, a failure is detected after the line is set. Disconnects.

In such a cross-connect device,
In order to avoid such line disconnection, there is a demand for a method of constantly checking the paths of all lines and detecting a failure even if no line setting is made.

[0005]

2. Description of the Related Art FIG. 4 shows a block diagram for explaining a conventional example. The figure shows four input lines I1 to I4 and output lines O1 to O4.
It is an example of a line.

Reference numeral 10 is a pattern insertion unit, 21 to 24 are line setting units, and 30A is a pattern detection unit. In FIG. 4, the pattern inserting unit 10 inserts different check patterns into the four input lines I1 to I4, and the line setting units 21 to 24 output the check patterns to the output lines O1 to O4.

In the pattern detection section 30A, the output lines O1 to
The presence or absence of a failure is determined by comparing the check pattern of the four lines of O4 with the correct check pattern. FIG. 5 is a diagram illustrating a conventional check pattern detection method.

For example, first, a check pattern A (shown as PA in the figure) is inserted at the beginning of a signal of a frame input from the input line I1, and the line setting processor 20 outputs the signal of one frame of the output lines O1 to O4. The check pattern A is set to be output at the beginning.

Similarly, the check patterns B, C, and D (indicated as PB, PC, and PD in the figure) are inserted at the beginning of each frame of each line, and the check patterns B, C, and D are set to sequentially output at the beginning of the frame on the output side. To do. (Although the check pattern of the output signal is followed by a time slot accommodating the main signal, the main signal is omitted in the figure, and only the check pattern is shown.) Thus, the output lines O1 to O4 Since the check patterns output from the same are all the same, all the paths are checked by collectively comparing with the correct check patterns PA to PD generated by the pattern detection unit 30A.

[0010]

In the above-mentioned conventional example, when a failure occurs in the pattern inserting section 10 and the output is cut off, an error is generated in the pattern detecting section 30A, so that the failure can be detected. Is.

Further, even when a failure occurs in the line setting processing sections 21 to 24 and the output is cut off, an error similarly occurs in the pattern detecting section 30A, so that the failure can be detected.

However, since the path check for all the output lines is performed collectively, a failure occurs in the pattern detection section 30A or the line setting processing sections 21-24, the output is cut off, and an error occurs in the path check. Even if the pattern detection unit 30A fails, the line setting processing units 21 to 24
It is not possible to determine whether or not there is a failure.

The present invention intends to realize a path check method for a cross-connect device which can determine a failure location by using a path check detection result for each output line.

[0014]

FIG. 1 is a block diagram for explaining the principle of the present invention. Reference numeral 10 in the figure denotes a pattern insertion unit that inserts check patterns into the plurality of input circuits I1 to In, and reference numerals 21 to 2n denote the check patterns inserted by the pattern insertion unit 10 and the signals input from the plurality of input lines I1 to In. It is a line setting processing unit that performs cross-connect connection so as to output to designated output lines O1 to On respectively.

Reference numerals 31 to 3n are line setting processing units 21 to 21.
Reference numeral 40 denotes a pattern detection unit that compares the check pattern in the signal output from 2n with a correct check pattern to detect the presence or absence of a failure.
Is a failure location detection unit that determines a failure location from the output of the pattern insertion section 10. The pattern insertion section 10 inserts a check pattern into an input signal input from a plurality of input lines I1 to In, and all the line setting processing sections 21 to 2n. Cross-connect connection is performed so that the same check pattern is output to the output lines O1 to On, the check patterns in the output lines O1 to On are extracted by the pattern detection units 31 to 3n, and the output line O1 is output.
~ On is compared with the correct check pattern for each On, and the failure point detection unit 40 determines the failure point from the output.

[0016]

Operation: The pattern inserting section 1 is provided for the plurality of input lines I1 to In.
When 0, a different check pattern is inserted for each line, and the line setting processing units 21 to 2n perform line setting so that the same check pattern is output to the output lines O1 to On.

The check patterns output from the output lines O1 to On are correct check pattern and pattern detection unit 31.
The presence / absence of an error is detected by comparing 3 to 3n. When the pattern insertion unit 10 fails and the output is cut off, the outputs of all the line setting processing units 21 to 2n are cut off and all the pattern detection units 31 to 3n detect an error.

Also, one of the line setting processing units 21 to 2n
If one of them fails and the output is cut off, only the pattern detection unit connected to the output detects the error. Therefore, in the failure location detection unit 40, if all the outputs of the pattern detection units 31 to 3n are error detected, it is determined that the pattern insertion unit 10 is in failure, and (n-1) in the pattern detection units 31 to 3n.
When an error is detected for less than the number of pieces, it is possible to determine that the line setting processing unit connected thereto is out of order.

In FIG. 1, the output A of the failure point detector 40 is shown.
LM is a failure occurrence signal indicating that a failure has occurred, AL1
ALn indicates a fault occurrence signal indicating a fault occurrence in the line setting processing units 21 to 2n, and AA indicates a fault occurrence signal indicating a fault occurrence in the pattern insertion unit 10.

[0020]

FIG. 2 is a diagram for explaining an embodiment of the present invention.
The embodiment shows an example of four input lines I1 to I4 and four output lines O1 to O4.

In the figure, the pattern inserting section 10 and the line setting processing sections 21 to 24 are the same components as described in the conventional example of FIG. The pattern detectors 31 to 34 are connected to the output line O1.
To O4 are used to detect the check pattern in the output and to detect an error, and are provided for each of the output lines O1 to O4. A1 to A4 are AND circuits (hereinafter referred to as AND circuits) for outputting the failure occurrence signals of the output lines O1 to O4, and A5 is an AND circuit for outputting the failure occurrence signal of the pattern insertion unit 10.

In the above structure, the pattern insertion section 10
Then, a different check pattern is inserted for each of the input lines I1 to I4. For example, from the input line I1 to the check pattern P
A is inserted, and the pattern detection units 31 to 34 detect whether or not the check pattern PA is correctly output in the first frame of the output lines O1 to O4. Then input line I
The check patterns PB, PC and PD are inserted into 2, I3 and I4, and it is determined whether or not the check patterns are sequentially output to the output lines O1 to O4 correctly.
It is possible to confirm that the input from the input lines I1 to I4 is correctly output to any of the output lines O1 to O4 by detecting with the line 4.

In the figure, the output AA of the AND circuit A5 is a failure occurrence signal indicating that the pattern inserting section 10 has failed when all the pattern detecting sections 31 to 34 detect an error.

The output AL1 of the AND circuits A1 to A4
AL4 are failure occurrence signals indicating the occurrence of failures in the line setting processing units 21 to 24. In addition, all AND circuits A1 to
When A4 outputs an error, the output of the AND circuit A5 causes the outputs AL1 to AL4 of the AND circuits A1 to A4.
Are displayed, and only the output of the AND circuit A5 of the failure occurrence signal of the pattern insertion unit 10 is displayed.

Further, by taking the logical sum of the outputs of the AND circuits A1 to A4 by the logical sum circuit, the signal ALM indicating the occurrence of the failure can be obtained. With the above-described configuration, it is possible to easily determine the failure point, and it is possible to shorten the recovery time when the line is disconnected.

[0026]

According to the present invention, a check pattern is inserted in an input line, and it is determined whether or not the check pattern is correctly output to all the output lines for each line, thereby making it easy to determine a faulty part. The path check method of the cross-connect device can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram illustrating the principle of the present invention.

FIG. 2 is a diagram illustrating an embodiment of the present invention.

FIG. 3 is a diagram illustrating cross-connect connection.

FIG. 4 is a block diagram illustrating a conventional example.

FIG. 5 is a diagram illustrating a check pattern detection method of a conventional example.

[Explanation of Codes] 10 pattern insertion unit 21 to 2n, 20 line setting processing unit 31 to 3n, 30A pattern detection unit 40 failure location detection unit 100 cross-connect device A1 to A5 AND circuit

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification number Reference number within the agency FI Technical indication location H04L 12/26 H04Q 11/04 (72) Inventor Hiroshi Nakade 1015 Ueodachu, Nakahara-ku, Kawasaki-shi, Kanagawa Address within Fujitsu Limited

Claims (1)

Claim: What is claimed is: 1. A method for checking a path of a cross-connect device, comprising: a pattern inserting section (10) for inserting a check pattern into a plurality of input lines (I1 to In); A line setting processing unit (21) for performing cross-connect connection so that the check pattern inserted in the unit (10) and signals input from a plurality of input lines (I1 to In) are output to designated output lines (O1 to On), respectively. ~ 2
n), and a pattern detection unit (31 to 3n) that detects the presence or absence of a failure by comparing the check pattern in the signal output from the line setting processing unit (21 to 2n) with a correct check pattern, and the pattern. A failure point detection section (40) for determining a failure point from the output of the detection section (31 to 3n), and the pattern insertion section (10) to an input signal input from the plurality of input lines (I1 to In). To insert a check pattern, and the line setting processing unit (21 to 2n) performs cross-connect connection so that the same check pattern is output to all output lines (O1 to On).
The check pattern in On) is extracted by the pattern detection unit (31 to 3n) and compared with a correct check pattern for each output line (O1 to On), and the output is sent to the failure location detection unit (40). A path check method for a cross-connect device, which is characterized by determining a failure location.