JPH05122659A - Field converter - Google Patents

Abstract

PURPOSE:To attain satisfactory field conversion processing which is not affected by the generation of reproduction abnormality by providing a protecting circuit detecting the abnormal state of a recording and reproducing device to generate a gate signal and providing a gate circuit making a movement signal pass in a period excepting for the gate signal and outputting the movement signal of a prescribed value in period of the gate signal. CONSTITUTION:The converter is provided with the protecting circuit 70 detecting the abnormal state of the recording and reproducing device at the time of reproduction to output the gate signal in a prescribed period based on the detection and the gate circuit 31 making the movement signal generated in a movement detecting circuit 30 pass in the period excepting for the gate signal and outputting the movement signal of the prescribed value which is previously decided without regard to the movement signal generated in the movement detecting circuit 30 in the period of the gate signal. When the protecting circuit 70 detects the abnormal state of the recording and reproducing device, the gate circuit 31 outputs the movement signal of the prescribed value and a field converting circuit 40 processes the reproducing video signal in accordance with it. Thus, affection caused by the abnormal operation of the recording and reproducing device is eliminated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field converter for producing field data of a different field number from data of an arbitrary field number during special reproduction of a recording / reproducing apparatus such as a magnetic recording / reproducing apparatus (hereinafter abbreviated as VTR). Regarding

[0002]

2. Description of the Related Art When reproducing a video signal recorded on a VTR or the like, the screen is thinned or the same screen is displayed in order to adjust the reproduction time or to obtain a special effect such as slow motion, still image or double speed reproduction. May be repeated. At this time, in order to satisfy the interlace condition of the video signal and the continuity condition of the phase of the color subcarrier (hereinafter referred to as the color phase), that is, in order to maintain the continuity of the field number, May need to be converted into video signals of different field numbers. In such a case, Japanese Patent Publication No. 3-13790 discloses an example of a motion detection circuit of a field conversion circuit that performs signal processing of a video signal between fields to interpolate.

[0003]

The motion detection circuit of the prior art described above performs signal processing between fields when it is determined to be a still image, and inter-line signals within the same field when it is determined to be a moving image. The field conversion circuit is controlled to process. At this time, regarding the signal processing between fields and the motion detection circuit, signal processing is performed using the field interlace condition and the condition of color phase continuity. There is a need to.

However, in the above-mentioned prior art, no consideration is given to the transition period until servo lock in the VTR and the state at the time of servo abnormality, and there is a possibility that the motion detection circuit and the field conversion circuit malfunction. ..

An object of the present invention is to solve the above problem and to provide a field conversion apparatus which is capable of performing a good field conversion operation even during abnormal reproduction operation of the recording / reproduction apparatus.

[0006]

In order to achieve the above object, the present invention provides a motion detection circuit that detects the presence or absence of motion based on a reproduced video signal of a recording / reproducing apparatus and generates a motion signal.
In a field conversion device configured to control the processing operation of a field conversion circuit that field-converts the reproduced video signal according to the motion signal, protection for detecting an abnormal state of the recording / reproduction device and generating a gate signal for a predetermined period A circuit and a gate circuit which passes the motion signal for a period other than the gate signal and outputs a motion signal having a predetermined value which is predetermined in the gate signal period and supplies the motion signal to the field conversion circuit are provided. The motion detection circuit is also controlled by this gate signal.

[0007]

When the protection circuit does not detect the abnormal state of the recording / reproducing apparatus, the field converting circuit performs a processing operation according to the motion signal from the motion detecting circuit, and the reproduced video signal of the recording / reproducing apparatus is desired by the field converting circuit. It becomes a video signal composed of a field of field number.

When the protection circuit detects an abnormal state of the recording / reproducing apparatus, the gate circuit outputs a motion signal having a predetermined value, and in response to this, the field conversion circuit processes the reproduced video signal. In this case, the field conversion circuit processes the reproduced video signal between the lines using only the field data, thereby eliminating the influence of the abnormal operation of the recording / reproducing apparatus.

The gate signal causes the motion detection circuit to output a motion signal when the recording / reproducing device is in a predetermined reproduction state. As a result, when the gate signal ends, the normal motion signal is immediately output. It becomes possible to output.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a field converter according to the present invention, which is applied to a VTR reproducing system for digitally recording and reproducing an NTSC video signal (hereinafter referred to as an NTSC signal). Is an input terminal of the reproduced video signal V0 of the VTR, 2 is information indicating a field number of the reproduced video signal V0 (hereinafter referred to as field number information), a PBF input terminal, and 3 is a VTR.
Of the reproduction mode signal PBM indicating the reproduction state (normal reproduction, special reproduction, etc.), 10 to 14 are field memories, 20 is output video signals V1 to V5 of the field memories 10 to 14, reproduction mode signal PBM, and field number. A selection circuit that selects according to the information PBF, 30 is a motion detection circuit, 31 is a gate circuit, 50 is a Y / C separation circuit that separates a color signal and a luminance signal from a video signal, 60 is a scanning line conversion circuit, and 40 is A field conversion circuit, 50 is a Y / C separation circuit, 60 is a scanning line conversion circuit, 70 is a protection circuit for detecting an abnormality in a reproduction state and preventing malfunction, and 80 is an output terminal of a reproduction video signal after signal processing. Is.

Next, the operation of this embodiment will be described. First, basic signal processing in a normal reproduction state (that is, a state in which each field is reproduced in the order of field numbers) will be described. In FIG. 1, a reproduced video signal V0 of a VTR (not shown) input from the input terminal 1 is sequentially delayed by one field in the field memories 10-14. These field memories 10 to 14 are controlled by a control circuit (not shown) according to each reproduction mode such as normal reproduction and special reproduction. Each field memory 10
The video signals V1 to V5 output from 14 are supplied to the selection circuit 20, respectively. That is, the selection circuit 20 receives the video signals V1 to V5 which are delayed by 1, 2, 3, 4, and 5 fields of the reproduced video signal V0. The selection circuit 20 selects one of the video signals V1 to V5 according to the reproduction mode signal PBM from the input terminal 3 and the field number information PBF from the input terminal 2, and the motion detection circuit 30.
And to the field conversion circuit 40.

The motion detection circuit 30 is a circuit for discriminating whether the reproduced video signal V0 is a still image signal or a moving image signal for each pixel, and various configurations are conceivable, but basically, The video signal is arithmetically processed between fields and the arithmetic result is output as a motion signal. For example, in the motion detection circuit disclosed in the above Japanese Patent Publication No. 3-13790, a difference signal between an undelayed video signal and a video signal delayed by 1 frame, an undelayed video signal and a video signal delayed by 2 frames are used. And the difference signal of ## EQU1 ## are combined, and the obtained combined signal is processed by the spatiotemporal filter to expand the motion region and obtain the motion signal.

The principle of motion detection is based on the continuity of the phase of the color subcarrier in the NTSC signal (hereinafter referred to as the color phase) and the interlacing of the scanning lines.
Will be briefly described using.

In the figure, # 1, # 2, # 3, and # 4 represent field numbers, and arrows in the figure represent color phases. In the NTSC signal, the scanning lines are interlaced for each field, and the color phase is inverted for each scanning line. Further, since one frame (= 2 fields) is composed of 525 scanning lines, it is after 4 fields (2 frames) that the color phases of the scanning lines at the same position on the screen match. When subtraction processing is performed between the video signal and the video signal delayed by one frame, when the video signal is a still image, the color phases are inverted between these video signals, and the luminance signals are the same. , The color component is 2
It is obtained at twice the level, and the luminance component becomes zero. However, in the case of a moving image signal, there is a portion where the luminance signals are not equal in one frame, and as a result of the subtraction processing, a difference signal of the luminance signal is obtained in this portion. Therefore, if a low-pass component (hereinafter referred to as LPF) is used to extract the low-pass component of the subtraction result, a 1-frame difference signal of the luminance signal is obtained, and this becomes a motion signal. Also, the video signal and this
The color phase also matches the frame-delayed video signal. Therefore, if this video signal is a still image signal,
When subtraction processing is performed with these, the obtained luminance component and color component both become 0. In the case of a moving image signal, the same as above, 0
A differential signal of the non-luminance signal is obtained. The subtraction results thus obtained are combined, and even if the video signal is a moving image signal, the still image region and the moving image region are smoothed because the still portion of the image is similar to the still image signal. In order to connect to, the motion area is expanded by the spatiotemporal filter, and the signal subjected to such processing is output as a motion signal.

FIG. 3 is a block diagram showing a specific example of the motion detection circuit 30 in FIG. 1 for performing such signal processing.
Reference numeral 301 denotes an input terminal for the reproduced video signal V0, and 302 and 303.
Is an input terminal of the output video signal of the selection circuit 20, 304 is an input terminal of the gate signal G2 from the protection circuit 70, 310,
311 is a subtractor, 320 is a gate circuit, and 330 is an LP.
F, 350 is a synthesis circuit, 360 is a space-time filter, 37
Reference numeral 0 is a motion signal output terminal.

In the figure, a reproduced video signal V0 is input to an input terminal 301, and a video signal one frame before the reproduced video signal V0 is input to the input terminal 302 (here, the video signal V2 from the field memory 11). However, the video signal (here, the video signal V4 from the field memory 13) two frames before is selected by the selection circuit 20 and input to the input terminal 303. Then, the subtractor 310
Then, the subtraction processing of the video signals V0 and V2 is performed, and the subtracter 3
In 11, the subtraction processing of the video signals V0 and V4 is performed. The low frequency component of the difference signal from the subtracter 310 is separated by the LPF 330, and is combined with the difference signal from the subtractor 311 in the combining circuit 350. This composite signal is the gate circuit 3
20.

The gate circuit 320 is a protection circuit 70 (FIG. 1).
Is controlled by the gate signal G2 output from the input terminal 304 and is in a normal state.
The output signal of 50 is passed as it is (the operation when the reproduction state is abnormal will be described later). Gate circuit 3
The output signal of 20 is supplied to the spatiotemporal filter 360.
The spatio-temporal filter 360 is composed of a field memory, a line memory, etc., processes the calculation result so as to expand it in the horizontal, vertical, and temporal directions, and outputs it as a motion signal from the output terminal 370.

Next, the field conversion circuit 40 shown in FIG. 1 will be described. The field conversion circuit 40 is composed of a Y / C separation circuit 50 and a scanning line conversion circuit 60, and performs the following signal processing. In summary, first, the input reproduction video signal V0 is separated by the Y / C separation circuit 50 into a luminance signal and a chrominance signal using the video signal selected by the selection circuit 20, and then scanning is performed. In order to match the output field with the line conversion circuit 60, the luminance signal and the color signal are subjected to scanning line conversion processing, and the color signal is subjected to color phase matching according to the output field and added to the brightness signal. Output from the output terminal 80.

FIG. 4 is a block diagram showing a specific example of the Y / C separation circuit 50, in which 501 is a reproduced video signal V0.
, 502 to 504 are input terminals of the video signal selected by the selection circuit 20, 505 is an input terminal of the motion signal supplied from the motion detector 30 via the gate circuit 31,
Reference numeral 510 is a current field signal processing circuit, 511 is a previous field signal processing circuit, 520 is an inter-line Y / C separation circuit, 521 is an inter-line Y / C separation circuit, 530 is an inter-frame Y / C separation circuit, 531 is An inter-frame Y / C separation circuit, 540 is a synthesis circuit controlled by a motion signal, 5
Reference numeral 41 is a synthesis circuit controlled by a motion signal, 550 is a subtractor, 551 is a subtractor, 561 and 563 are luminance signal output terminals, and 562 and 564 are color signal output terminals.

In the figure, a reproduced video signal V0 (the field is called the current field) is inputted from the input terminal 501.
, And a video signal one frame before the reproduced video signal V0 (the video signal V2 from the field memory 11 selected by the selection circuit 20) is input from the input terminal 502, and the current field signal processing circuit 510 respectively. Is supplied to. In the current field signal processing circuit 510, the line-to-line Y / C separation circuit 520 using the line correlation in the reproduced video signal V0 and the frame correlation between the reproduced video signal V0 and the video signal V2 one frame before are used. The color signals are separated by the inter-frame Y / C separation circuit 530.

The line-to-line Y / C separation circuit 520 subtracts the reproduced video signal V0 from the video signal delayed by one line. Therefore, regardless of whether the reproduced video signal V0 is a still image signal or a moving image signal, the luminance signal has line correlation and the color phase is inverted between the lines, so that the inter-line Y / C separation circuit 520 reproduces the reproduced signal V0. However, only the color signal is separated regardless of the still image signal and the moving image signal.

The inter-frame Y / C separation circuit 530 subtracts the reproduced video signal V0 from the video signal V2 delayed by one frame. Therefore, when the reproduced video signal V0 is a still image signal, as shown in FIG. 2, since the color phase of the video signal in one frame is inverted and the luminance signal has a frame correlation, the reproduced video signal is The color signals can be separated by subtracting the signal V0 from the video signal V2 delayed by one frame. However, in the case of a moving image signal, since the luminance signal has no frame correlation, it is impossible to separate only the color signal.

The respective color signals separated by the inter-line Y / C separation circuit 520 and the inter-frame Y / C separation circuit 530 are supplied to a combining circuit 540 and combined in accordance with the motion signal input from the input terminal 505. After being processed, the color signal C0 is sent to the subtractor 550 and the output terminal 562. That is, in the synthesizing circuit 540, when the reproduced video signal V0 is a completely still image signal, the inter-frame Y / C separation circuit 5
Only the color signal from 30 is output, in the case of a completely moving image signal, only the color signal from the line-to-line Y / C separation circuit 520 is output, and in the case of a video signal between a still image and a moving image, The color signal from the inter-frame Y / C separation circuit 530 and the color signal from the inter-line Y / C separation circuit 520 are combined and output at a predetermined ratio according to the motion signal.

Color signal C0 output from the combining circuit 540
Is output from the output terminal 562 and the subtracter 550
And is subtracted from the reproduced video signal V0. As a result, the luminance signal Y0 is separated and output from the output terminal 561.

The previous field signal processing circuit 511 has the same structure as the current field signal processing circuit 510, and the video signal one field before the reproduced video signal V0 from the input terminal 503 (the video signal from the field memory 10). V1) is input, and the video signal three fields before the playback video signal V0 (video signal V3 from the field memory 12) is input from the input terminal 504, except that the current field signal processing circuit 510 operates. is there. Therefore, the output terminal 5 of the signal processing circuit 511 for the previous field
63 and 564 indicate the luminance signal Y of the previous field, respectively.
1, the color signal C1 is output.

The luminance signals Y0 and Y1 and the color signals C0 and C1 obtained by the above signal processing are supplied to the scanning line conversion circuit 60 of FIG.

FIG. 5 is a block diagram showing a specific example of the scanning line conversion circuit 60 in FIG. 1, in which 601 is an input terminal for the luminance signal Y0, 602 is an input terminal for the color signal C0, and 60
3 is an input terminal for the luminance signal Y1, 604 is an input terminal for the color signal C1, 605 is an input terminal for the motion signal, and 610 and 611.
Is a line memory, 620 is a luminance signal processing circuit, 640 is an inter-line signal processing circuit, 650 is an inter-field signal processing circuit, 660 is a combining circuit, 630 is a color signal processing circuit, 6
70 is an adder, and 680 is an output terminal.

In the figure, the luminance signal Y0 input from the input terminal 601 is supplied to the line memory 610 and the luminance signal processing circuit 620. In addition, the luminance signal processing circuit 620 has a line memory 610 for input luminance signal Y0.
Luminance signal Y01 delayed by one line and input terminal 6
The luminance signal Y1 of the previous field, which is input from 03, is also supplied. The luminance signal processing circuit 620 is basically composed of an inter-line signal processing (moving image processing) circuit 640, an inter-field signal processing (still image processing) circuit 650, and a synthesizing circuit 660.

In the interline signal processing circuit 640, the luminance signal Y0 of the current field and the luminance signal Y0 one line before the luminance signal Y0.
With 1 and 1, the operation as shown in FIG. That is, the operation 1 is used for the conversion from the odd field to the odd field and the even field to the even field, and the operation 2 is used for the conversion from the odd field to the even field and the even field to the odd field. Are used to perform scanning line conversion, respectively. In the inter-field signal processing circuit 650, the luminance signal Y of the current field
An operation as shown in FIG. 6B is performed with 0, the luminance signal Y01 one line before and the luminance signal Y1 one field before. That is, from odd field to odd field,
Scan line conversion is performed using operation 3 in the case of conversion from an even field to even field, and operation 4 in case of conversion from an odd field to an even field and even field to odd field. Be done.
However, the processing by the inter-field signal processing circuit 650 is effective only for a still image, that is, when there is a correlation between the fields.

Interline signal processing circuit 640 and interfield signal processing circuit 650 obtained by the above arithmetic processing.
The output signal of 1 is combined by the combining circuit 660 according to the motion signal input from the input terminal 605. That is, the synthesizing circuit 660 outputs the output signal of the inter-field signal processing circuit 650 for a complete still image, the output signal of the inter-line signal processing circuit 640 for a complete moving image, and the inter-field signal for a still image and a moving image. The output signal of the processing circuit 650 and the output signal of the inter-line signal processing circuit 640 are combined at a predetermined ratio according to the motion signal and output as scanning line converted luminance signals.

On the other hand, the color signal processing circuit 630 basically performs luminance signal processing on the color signals C0 and C1 from the input terminals 602 and 604 and the color signal C01 obtained by delaying the color signal C0 by one line in the line memory 611. The same signal processing as the circuit 620 is performed. As shown in FIG. 2, the color signals C01 and C1 one line before and one field before are always inverted in color phase with respect to the color signal C0 in the current field. Therefore, the color signals C01 and C1 are inverted. Then, the same processing as the above luminance signal is performed. Since the specific signal processing is the same as that for the luminance signal, the description thereof will be omitted. After the arithmetic processing, similar to the luminance signal processing, the signal processing results between the lines and between the fields are combined according to the motion signal. Further, the color phase matching of the color signal is performed according to the output field number. As a result, the color signal converted by the scanning line is obtained. This color signal is added to the luminance signal from the luminance signal processing circuit 620 by the adder 670 and output from the output terminal 80 as a field-converted NTSC signal.

The above is the signal processing in the normal reproduction state (that is, the state in which the field numbers are sequentially reproduced). However, variable speed reproduction is essential for VTR. In this case, the field numbers are not continuous, but even in that case, the selection circuit 20 performs the selection operation of the outputs of the field memories 10 to 14 so that the above signal processing can be performed. The operation of the selection circuit 20 in this case will be described below.

The signal calculation in the motion detection circuit 30 and the field conversion circuit 40, which has been described above, is performed by utilizing the conditions of the field interlace and the color phase of the NTSC signal, and the selection circuit 20 performs such calculation. As is performed, the output video signals of the field memories 10 to 14 are selected and sent to the motion detection circuit 30 and the field conversion circuit 40.

Here, as an example thereof, a case of variable speed reproduction of 0 to 1 × speed will be described with reference to FIG. However, in the figure, No.
Is a field-series time series, # 1, # 2, # 3, # 4 are field numbers, V0 is a reproduced video signal, V1, V2,
V3, V4, and V5 are field memories 10 and 1, respectively.
The output video signals of 1, 12, 13, and 14 are shown. Here, No. Prior to 1, it is assumed that the video signal is reproduced in continuous field number. In this example, since 0 to 1 × speed reproduction is performed, the same field is reproduced in N
o. 3 to No. It's happening between 5. Although not shown in FIG. 1, in the field memories 10 to 14, writing is stopped when the same field is supplied by a control circuit (not shown) (in the example of FIG. 7), the input video signal of the selection circuit 20, that is, the field numbers of the output video signals V1 to V5 of the field memories 10 to 14 are shown in FIG. It becomes like The selection circuit 20 receives the input video signal V
1 to V5, as described above, the motion detection circuit 30,
A necessary video signal is selected and supplied to the field conversion circuit 40.

Therefore, as described above, the video signal required by the motion detection circuit 30 is different from the reproduced video signal V0.
It is a video signal of one frame before input from the input terminal 302 and a video signal of two frames before input from the input terminal 303. Therefore, as shown in FIG. 7, the motion detection circuit 30 is normally supplied with the video signals V2 and V4 (that is, when the field numbers are continuous), but the same field is repeatedly reproduced. In this case, the video signals V3 and V5 must be supplied, and the selection circuit 20 operates so that the video signals one frame before and two frames before the reproduced video signal V0 are always supplied. Further, the Y / C separation circuit 50 of the field conversion circuit 40 needs the video signal of 1, 2, 3 fields before the reproduced video signal V0. Therefore, as shown in FIG.
Video signals V1, V2, and V3 are normally supplied to the Y / C separation circuit 50 of the field conversion circuit 40, but when the same field is repeatedly reproduced, the video signal V
2, V3, V4 must be supplied, and the selection circuit 20 operates so that the video signal of 1, 2, 3 fields before the reproduced video signal V0 is always supplied.

Here, the case of 0 to 1 × speed reproduction is described. However, even in the case of, for example, −1 to 0 × speed reproduction and reproduction near 1 × speed, the selection circuit 20 causes the field memory 10 to operate similarly to the above. The output signals of 14 to 14 are switched to supply the necessary video signal to the motion detection circuit 30 and the field conversion circuit 40.

Next, the protection circuit 70 in FIG. 1 will be described. In the VTR, the reproduction state may be abnormal, that is, the field sequence may be broken due to the period until the servo is locked, the switching of the reproduction mode, the servo abnormality, and the like. For example, consider the case where an abnormal state as shown in FIG. 8 occurs during the above-described 0 to 1 × speed reproduction. This example is N
o. 4 and No. It shows a case where the reproduction field jumps 3 fields during the period 5. Normally, such a state should not occur during 0 to 1 speed reproduction, and if such an abnormal state is not detected, the selection circuit 20 operates in the same manner as usual, so the motion detection circuit 30 and the field conversion circuit 40. Is supplied with a video signal as shown in FIG.
Therefore, the inter-field signal processing part in the motion detection circuit 30 and the field conversion circuit 40 is a predetermined signal, that is, in the motion detection circuit 30, with respect to the reproduced video signal V0,
The Y / C separation circuit 50 of the field conversion circuit 40 can supply the video signal of one frame before and the video signal of two frames before, respectively, to the reproduced video signal V0. As a result, the periods indicated by diagonal lines in FIG. 8 malfunction. However, in the field conversion circuit 40, in the inter-line signal processing portion of the Y / C separation circuit 50 and the inter-line signal processing portion of the scanning line conversion circuit 60, signal processing is performed only with the reproduced video signal V0, so malfunction occurs. There is no such thing.

The protection circuit 70 is a circuit for preventing the video signal obtained from the output terminal 80 from being damaged even if the above-mentioned abnormal state occurs. FIG. 9 shows the protection circuit 70. FIG. 7 is a block diagram showing a specific example,
01 is an input terminal of the field number information PBF, 702
Is an input terminal of the reproduction mode signal PBM, 710 and 711 are 1-field delay circuits, 720 is a reproduction state decoding circuit, 730 is a mode switching detection circuit, 740 is an abnormality detection circuit, 750 is an AND gate, 760 is a counter circuit, 7
70 is an output terminal for the gate signal G2.

In the figure, the field number information PBF input from the input terminal 701 and the field number information D delayed by the 1-field delay circuit 710.
The PBF and the PBF are supplied to the reproduction state decoding circuit 720.
In the reproduction state decoding circuit 720, the field number information PBF and DPBF are compared, and the state signals J0, J1 and J are compared.
2 and J3 are output. Here, the status signal J0 is in the status only when the field number information PBF advances by 0 fields with respect to the field number information DPBF (when the same field is reproduced), and the status signal J1 is in the status only when it advances by one field. The signal J2 goes to the low level (hereinafter referred to as the L level) only when the field has advanced 2 fields, and the state signal J3 goes to the high level (hereinafter, referred to as the L level) only when the field has advanced 3 fields.
H level). These status signals J0, J1,
J2 and J3 are supplied to the abnormality detection circuit 740, and the status signal J0 is also supplied to the counter circuit 760 as a stop signal.

The abnormality detection circuit 740 is also supplied with the reproduction mode signal PBM input from the input terminal 702 and the gate signal G2 output from the counter 760, and these status signals J0, J1, J2, J3 and the reproduction mode are supplied. Signal P
An abnormal state is detected according to BM and the gate signal G2.
For example, during 0 to 1 speed reproduction, when the reproduction field advances by one field (state signal J1 is at L level), the same field is reproduced (state signal J0 is at L level).
Is normal and the other state, that is, the state signals J2, J3
Is at an L level, it is a state that is impossible during 0 to 1 × speed reproduction. Therefore, the detection circuit 740 detects such an impossible state as an abnormal state and outputs the L level abnormality detection signal A1. In this way, the abnormality detection circuit 74
0 detects this as an abnormal state when it is in a state that normally does not occur in the current reproduction mode.

On the other hand, the reproduction mode signal PBM input from the input terminal 702 and the 1-field delay circuit 711.
The reproduction mode signal DPBM delayed by is supplied to the mode switching detection circuit 730. For example, if the playback mode is switched from 0 to 1x speed playback mode to reverse playback,
It is impossible to know what the reproduction state will be until the servo is locked by this switching. Therefore, the mode switching detection circuit 730 detects that the reproduction mode has been switched, and outputs the L level mode switching detection signal A2.

Abnormality detection signal A1 and mode switching detection signal A
2 is supplied to the AND gate 750. AND gate 7
Reference numeral 50 outputs an L level signal when at least one of the abnormality detection signal A1 and the mode switching detection signal A2 is at L level. The L level output signal of the AND gate 750 is supplied to the counter circuit 760 as a reset signal. The counter circuit 760 outputs the H-level gate signal G2 for a predetermined period after being reset. The predetermined period here is a period from the detection of the abnormal state to the time when each signal processing circuit can start normal operation, as shown in FIG.
In the example, the period is four fields indicated by diagonal lines.

The levels of the abnormality detection signal A1 and the mode switching detection signal A can be set arbitrarily, and accordingly, another gate circuit can be used instead of the AND gate 750.

Abnormality detecting circuit 740 also performs an abnormal state detecting operation in accordance with gate signal G2. In the signal processing circuit of this embodiment, normal signal processing cannot be performed unless there are video signals of at least four consecutive fields.
Therefore, once an abnormal state occurs, the signal processing performed between fields cannot be restarted until the video signals of four consecutive fields are reproduced. Therefore, the gate signal G
While 2 is at H level, abnormality detection circuit 740 performs abnormality detection different from the above-described operation.

First, when the status signal J1 is at the L level, there is no problem because the fields are reproduced in order. Next, an abnormal condition is detected, and the gate signal G2 becomes H.
When the status signals J2 and J3 are at the L level when the level is at the level, it is detected as abnormal regardless of the reproduction mode, the counter circuit 760 is reset, and the counting operation is restarted from that point. Therefore, from this time point, the H level gate signal G2 is output again for a predetermined period. Further, when the state signal J0 becomes L level when the gate signal G2 is H level,
Although not abnormal, the same field is being reproduced while the status signal J0 is at L level, so that signals of four consecutive fields are not reproduced. Therefore, as described above, while the state signal J0 is at the L level, the counting operation of the counter circuit 760 is temporarily stopped and the gate signal G2
Is held at the H level as it is, and when the next field is reproduced and the status signal J0 becomes the H level and J1 becomes the L level, the counting operation restarts and the gate signal G2 becomes the H level until the count value reaches a predetermined value. I am trying to.
Thus, once the abnormal state occurs, the gate signal G2 maintains the H level until the signals of four consecutive fields are reproduced.

As described above, the protection circuit 70 detects an abnormality in the reproduction state and the time when the reproduction mode is switched, and a predetermined number of consecutive fields (4 fields in this embodiment) of the video signal from that point on. H level gate signal G2 is output until is reproduced.

In this embodiment, the reproduction field number is used to detect an abnormality in the reproduction state. However, the present invention is not limited to this and any signal can be used to monitor the reproduction state.
For example, a signal such as a time code may be used.

Next, the operation of each signal processing circuit in FIG. 1 during the period when the gate signal G2 is at the H level (this is called a protection period) will be described.

First, the motion detecting circuit 30 shown in FIG. 3 will be described. In the motion detecting circuit 30, the synthesizing circuit 350 is used.
If the output signal of 1 is directly supplied to the spatiotemporal filter 360, the following problem occurs when the abnormality shown in FIG. 8 occurs. That is, for example, during the shaded period in FIG. 8, the video signals of one frame before and two frames before the reproduced video signal V0 are not input to the motion detection circuit 30 from the input terminals 302 and 303, so the subtractors 310 and 311 are input.
The output signal of is not the correct difference signal. Therefore, the output signal of the synthesis circuit 350 is directly used as the spatiotemporal filter 360.
, The influence of the wrong calculation result is magnified in the horizontal, vertical, and time directions, and even after returning to the normal state, the influence continues for a while, which is not preferable.

Therefore, in the motion detecting circuit 30, the gate circuit 320 is provided between the synthesizing circuit 350 and the spatiotemporal filter 360, and is supplied to the spatiotemporal filter 360 during the period when the gate signal G2 is at the H level. The output signal of the gate circuit 320 is forcibly set to a predetermined value, for example, the same value as in the case of a still image. This allows
It is possible to prevent malfunction of the motion detection circuit 30 in the case of abnormality.

Y of the field conversion circuit 40 shown in FIG.
In the / C separation circuit 50, the line-to-line Y / C separation circuit 520 processes only the reproduced video signal V0, so there is no problem even if an abnormality such as that shown in FIG. 8 occurs. But,
The inter-line Y / C separation circuit 521 and the inter-frame Y / C separation circuits 530 and 531 are not supplied with a predetermined video signal during the shaded period in FIG. 8, so that accurate Y / C separation cannot be performed. Therefore, the correct color signal cannot be obtained from the combining circuits 540 and 541, and accordingly, the output terminals 561 and
A correct luminance signal cannot be obtained at 563. That is, when an abnormality occurs, only the line-to-line Y / C separation circuit 520 can obtain an accurate Y / C separation output.

Therefore, in the Y / C separation circuit 50, the input terminal 5 is operated while the gate signal G2 is at the H level.
On the basis of the motion signal from 05, the synthesizing circuit 540 selects and outputs only the color signal from the line-to-line Y / C separation circuit 520, thereby outputting the output signal 561 to the luminance signal Y0.
However, the output signal 562 outputs the color signal C0 which is the color signal. At this time, the luminance signal Y1 and the color signal C output from the previous field signal processing circuit 511
1 is not correct.

On the other hand, in the scanning line conversion circuit 60 shown in FIG. 5, while the gate signal G2 is at the H level, the luminance signal Y0 and the color signal C0 of the current field supplied from the Y / C separation circuit 50 are accurate. The luminance signal Y1 and the color signal C1 in the previous field are not accurate signals. Therefore, in the luminance signal processing circuit 620 and the color signal processing circuit 630, the inter-field signal processing circuit performs arithmetic processing using the luminance signal Y1 and the color signal C1 of the previous field by the motion signal input from the input terminal 605. If the luminance signal and the color signal are output, the correct scanning line conversion is not performed.

Therefore, in the scanning line conversion circuit 60, in the luminance signal processing circuit 620, the synthesizing circuit 660 selects and outputs only the output luminance signal of the interline signal processing circuit 640 according to the motion signal from the input terminal 605. Similarly, the color signal processing circuit 630 also outputs only the color signal from the line signal processing circuit for the color signal C0 of the current field. As a result, the luminance signal and the chrominance signal that have been converted into the proper scanning lines can be obtained.

As described above, when the gate signal G2 is at the H level, the Y / C separation circuit 50 and the scanning line conversion circuit 60 of the field conversion circuit 40 perform signal processing between lines, that is, a moving image signal. By forcibly performing the signal processing of (1), even if an abnormality occurs, the obtained field-converted video signal is not affected by this. Therefore, in order to operate the field conversion circuit 40 in this manner, in FIG.
1 outputs a motion signal when the reproduced video signal V0 is completely a moving image signal while the gate signal G2 is at the H level.

Although the embodiment of the present invention has been described above, the present invention is not limited to this embodiment. For example, in this embodiment, the method of controlling the motion signal is used.
The present invention is not limited to this, and it is obvious that any method may be used as long as the signal processing of the Y / C separation circuit 40 and the scanning line conversion circuit 50 is forced to perform signal processing between lines. Is.

Further, in the above embodiment, the NTSC signal (that is, the composite video signal in which the luminance signal and the color signal are multiplexed) is targeted, but the present invention is not limited to this, and the luminance signal and the color signal are It is also effective in the case of a component video signal in which is separated. In the case of component video signals, a motion detection circuit is needed separately for the luminance signal and the color signal, and since the luminance signal and the color signal are separated from the beginning in the field conversion circuit, the Y / C separation circuit is unnecessary. However, the circuit configuration is almost the same as above. Even in this case, when the protection circuit 70 detects an abnormal state, the field conversion circuit is forced to perform the signal processing between lines by the gate signal G2, thereby preventing malfunction.

[0058]

As described above, according to the present invention,
When a field conversion circuit including signal processing between fields is applied to the VTR, the field conversion can be performed without malfunction even in a servo abnormality of the VTR, a servo unlock state at the time of switching the reproduction mode, etc. Can be done.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a field conversion device according to the present invention.

FIG. 2 is an explanatory diagram of an NTSC signal.

3 is a block diagram showing a specific example of a motion detection circuit in FIG.

4 is a block diagram showing a specific example of a Y / C separation circuit in FIG.

5 is a block diagram showing a specific example of a scanning line conversion circuit in FIG.

FIG. 6 is a diagram for explaining scanning line conversion processing of the scanning line conversion circuit shown in FIG.

FIG. 7 is a diagram illustrating an operation of the selection circuit in FIG. 1 in a normal state.

FIG. 8 is a diagram illustrating an operation of the selection circuit in FIG. 1 in an abnormal reproduction state.

9 is a block diagram showing a specific example of a protection circuit in FIG.

[Explanation of symbols]

 10, 11, 12, 13, 14 Field memory 20 Selection circuit 30 Motion detection circuit 31 Gate circuit 40 Field conversion circuit 50 Y / C separation circuit 60 Scan line conversion circuit 70 Protection circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor ▲ Yoshi ▼ Miyoko Koshi 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa, Ltd. Inside the Video Media Research Laboratory, Hitachi, Ltd. (72) Toshiaki Takahashi, Nishishinbashi, Minato-ku, Tokyo 15th-12th Stock Company Hitachi, Ltd. Home Appliance Business Headquarters High Vision Strategy Development Division

Claims (4)

[Claims] 1. A field conversion device for converting field data of an arbitrary field number of a reproduction video signal of a recording / reproduction device into field data of a predetermined field number, delaying the reproduction video signal, and delaying an integral multiple of one field. A delay means for generating a plurality of delayed video signals, and the presence / absence of image motion of the playback video signal is detected from the playback video signal and the desired delayed video signal, and a motion signal representing the detection result is generated. A motion detection circuit, a protection circuit that detects an abnormal state at the time of reproduction of the recording / reproducing apparatus, and outputs a gate signal for a predetermined period based on the detection, and a motion detection circuit that occurs in a period other than the gate signal. A gate that allows a motion signal to pass therethrough and outputs a motion signal having a predetermined value regardless of the motion signal generated by the motion detection circuit during the period of the gate signal. Using the road, only the data in each field of the reproduction video signal,
A signal processing circuit between lines forming field data of the predetermined field number, and a signal processing between fields forming field data of the predetermined field number using the reproduced video signal and the desired delayed video signal. A circuit and a synthesizing circuit for synthesizing the output video signal of the signal processing circuit between the lines and the output video signal of the signal processing circuit between the fields at a ratio according to the motion signal from the gate circuit, When the protection circuit detects the abnormal state, the synthesizing circuit selects and outputs only the output video signal of the signal processing circuit between the lines. 2. The field conversion device according to claim 1, wherein the abnormal state detected by the protection circuit is an abnormal reproduction state of the recording / reproduction device and switching of a reproduction mode. 3. The field conversion device according to claim 1, wherein the period of the gate signal output by the protection circuit is a period until a predetermined number of field numbers of the reproduced video signal continue. .. 4. The field conversion device according to claim 1, 2 or 3, wherein the motion detection circuit outputs a motion signal having a predetermined value determined in advance during the gate signal period.