JPH05110399A - Multiplexer input changeover device - Google Patents

Abstract

PURPOSE:To realize the high speed changeover processing of multi-stage input signals with inexpensive circuit configuration by adopting 2-stage configuration of plural multiplexers and a multiplexer for high speed changeover switch for the device. CONSTITUTION:A signal extracted from plural multiplexers A-D is fed to a high speed changeover multiplexer E, in which the signals are selected one by one and extracted and fed to an A/D converter 17. The converted digital data are stored in a memory 18. Moreover, a multiplexer controller 19 controls the multiplexers A-E so that an input signal fed to the multiplexers A-D is outputted in this order and the signals fed to the multiplexer E are outputted sequentially and controls the operation of the A/D converter 17 synchronously with the changeover of the multiplexer E. Thus, signals twice or over successively are not outputted from one multiplexer and the signal is read by the other multiplexers for a changeover time of each multiplexer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiplexer input switching device using a multiplexer for selectively selecting and outputting a plurality of input signals one by one.

[0002]

2. Description of the Related Art In a control system or a diagnostic system, it is necessary to control or diagnose the system based on a large number of analog or digital input signals obtained from a large number of sensors, switches, etc. provided on the controlled or diagnosed object. I have to. The large number of input signals are collected by a data collecting device called a data logger, and are transferred from there according to a request of a control device or a diagnostic device.

The above data collecting device converts an analog input signal of a large number of input signals into digital data by an A / D converter, and then stores the digital data together with the digital input signal in a memory such as a RAM disk or a hard disk. . Therefore, if the number of analog input signals increases, A /
The number of D converters must be increased, which complicates the circuit and increases the cost.

For this reason, conventionally, as shown in FIG. 3, a multiplexer 21 is used, and analog input signals applied to its input terminals 21 _{1 to} 21 _n are sequentially switched and selected by the multiplexer 21 and are selected one by one. In addition to the converter 22, the A / D converted digital data is stored in the memory 23.

[0005]

However, in general, an IC multiplexer has a switching time as shown in FIG. 4, and after switching, a signal is read and output in a stable period, so that a large amount of input is required. Switching signals can take a very long time. Therefore, when the data collecting device as shown in FIG. 3 is used for a control system or a diagnostic system having a large number of input signals, there are problems that control is hindered and diagnosis cannot be performed quickly.

Although there is a multiplexer capable of performing high-speed switching with a short switching time, a high-speed switching multiplexer that handles a large amount of input signals is expensive, which leads to an increase in the cost of the device.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a multiplexer input switching device which can switch a large amount of input signals at high speed.

[0008]

According to the present invention, there are provided a first plurality of multiplexers to which a plurality of input signals are respectively applied, and a high-speed switchable second multiplexer to which an output signal of each multiplexer is added. , A control for taking out signals from the plurality of multiplexers one by one in a predetermined order, adding them to the second multiplexer, and taking out signals one by one in a predetermined order from the second multiplexer Means are provided.

[0009]

The signal is not output from one of the plurality of multiplexers more than once in succession, and the signals are read by the other multiplexers at the switching time of each multiplexer, so that the switching is performed as a whole. Time is eliminated, and high-speed switching processing of a large amount of input signals becomes possible.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT In FIG. 1, four multiplexers A, B, C and D are provided as a first plurality of multiplexers. Each of the multiplexers A to D has four input terminals 1, 5, 9, 13, 2, 6, 10, 14 ,.
3,7,11,15,4,8,12,16 are provided. It should be noted that the numbers 1 to 16 attached to these input terminals also indicate the order of signal extraction described later.

The signals extracted from the multiplexers A to D are added to a high-speed switching multiplexer E as a second multiplexer, where they are selected and extracted one by one, and added to an A / D converter 17. .. A /
The digital data converted by the D converter 17 is stored in the memory 1
Stored in 8.

Further, the multiplexer controller 19 as the control means has an input terminal 1 of the multiplexers A to D.
16 to 16 to control the multiplexers A to D so as to output the input signals applied in this order, and to control the multiplexer E to sequentially output the signals applied to the multiplexer E, and to perform A / D conversion. The operation of the device 17 is controlled in synchronization with the switching of the multiplexer E.

Next, the operation of the above configuration will be described.

Input terminals 1 to 16 of the multiplexers A to D
Includes, for example, the above-mentioned control target and diagnosis target (not shown)
An analog input signal from is added. Under the control of the multiplexer controller 19, each of the multiplexers A to D switches the input signals applied to the input terminals 1 to 16 in this order and outputs them one by one.

That is, first, the multiplexer A selects the input signal applied to the input terminal 1 and applies it to the multiplexer E, and then the multiplexer B selects the input signal applied to the input terminal 2 and applies it to the multiplexer E. . Similarly, the input signals applied to the input terminals 3 and 4 in the order of the multiplexers C and D are selected and added to the multiplexer E.

Next, returning to the multiplexer A, the input signal applied to the input terminal 5 is selected and applied to the multiplexer E, and then the inputs applied to the input terminals 6, 7 and 8 in the order of the multiplexers B, C and D. Select signal and add to multiplexer E.

As described above, the signals applied to the input terminals 1 to 16 are selected in this order and the multiplexer E is selected.
Added to. The multiplexer E is the multiplexer A to
The signals added from D are sequentially switched and selected one by one at high speed and added to the A / D converter 17.

FIG. 2 is a timing chart showing the reading and switching time of the input signals of the multiplexers A to D.
, ... are the input terminals 1 to 16
It corresponds to the input signal of. As is apparent from FIG. 2, signals are not taken out from the same multiplexer twice or more in succession, and reading is performed by another multiplexer during the switching time of one multiplexer. Therefore, the switching time is absorbed between the multiplexers A to D, and the switching time becomes almost zero as a whole.

As a result, the signals of FIG. 2, ... Are sequentially extracted from the multiplexer E in a cycle shorter than the switching cycle of the multiplexers A to D, and high-speed switching processing of the input signal is realized. In this case, since the multiplexer E for high speed switching may have a 4-input terminal,
It can be realized at a lower cost than the case of using 16 input terminals.

In this embodiment, the case where the number of input signals is 16 has been described. However, when handling a larger number of input signals, the multiplexers A to D and their input terminals 1 to 1 are used.
As the number of 6 is increased, the high speed switching multiplexer E having many input terminals is used accordingly.

Further, although the present embodiment has been described with respect to the case where the present invention is applied to the data collecting device, the present invention can be generally used when performing high-speed switching of a large number of input signals.

[0022]

According to the present invention, since a plurality of multiplexers and a multiplexer for performing high-speed switching are provided in a two-stage configuration, a high-speed switching multiplexer having a large number of input terminals can be used for high-speed switching processing of a large number of input signals. It can be realized inexpensively without using it. When the present invention is applied to a data acquisition device, it is not necessary to use a large number of A / D converters, and a device that can collect data at high speed can be obtained while using one A / D converter. ..

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a timing chart showing the operation of the embodiment.

FIG. 3 is a block diagram of a conventional data collection device.

FIG. 4 is a timing chart showing the operation of the multiplexer.

[Explanation of symbols]

A to D multiplexers (first plurality of multiplexers) E multiplexers (second multiplexers) 1 to 16 input terminals 19 multiplexer controller (control means)

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kazunori Serikawa 3-8 Uedanoyu-cho, Beppu City, Oita Prefecture

Claims (1)

[Claims] 1. A second plurality of multiplexers to which a plurality of input signals are respectively applied, and an output signal of the first plurality of multiplexers are added, and a second switching operation is performed faster than the first plurality of multiplexers. And the first plurality of multiplexers are controlled one by one in a predetermined order so that each multiplexer outputs a signal one by one, and the second multiplexer is controlled to control one signal in a predetermined order. A multiplexer input switching device comprising: