JPH05109975A - Resin-sealed type semiconductor device - Google Patents

Resin-sealed type semiconductor device

Info

Publication number
JPH05109975A
JPH05109975A JP3264522A JP26452291A JPH05109975A JP H05109975 A JPH05109975 A JP H05109975A JP 3264522 A JP3264522 A JP 3264522A JP 26452291 A JP26452291 A JP 26452291A JP H05109975 A JPH05109975 A JP H05109975A
Authority
JP
Japan
Prior art keywords
resin
semiconductor device
lead
semiconductor element
sealed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3264522A
Other languages
Japanese (ja)
Inventor
Ryuji Kono
竜治 河野
Asao Nishimura
朝雄 西村
Akihiro Yaguchi
昭弘 矢口
Maya Obata
まや 小幡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3264522A priority Critical patent/JPH05109975A/en
Publication of JPH05109975A publication Critical patent/JPH05109975A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/4826Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To simplify a process by joining a junction plate with a circuit forming surface of a first semiconductor element via an insulating member to be wire- bonded and by joining a non-circuit-forming surface of a second semiconductor element to the opposite side of the junction plate via an insulating member to be wire-bonded. CONSTITUTION:While a semiconductor element 1a with a circuit forming surface facing upward is mounted, a lead frame comprising an assembly of a junction plate 2 having smaller size than the semiconductor element 1a and having insulating members 5 on both sides and a lead 3 is mounted and joined so that an electrode pad lap is exposed. Then, a wire 4 is used to electrically connect the semiconductor element 1a to the lead 3. Then, a semiconductor element 1b is mounted and joined from an upper part of the junction plate 2 with a circuit forming surface facing upward, and the wire 4 is used to electrically connect the semiconductor element 1b to the lead 3. The assembly is sealed by resin 15 and molded with an unnecessary part of the lead 3 cut off. Thus, a manufacture process can be simplified.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は樹脂封止型半導体装置に
係り、特に、内部に複数の半導体素子を内蔵した大容量
メモリーパッケージに代表される樹脂封止型半導体装置
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-encapsulated semiconductor device, and more particularly to a resin-encapsulated semiconductor device represented by a large capacity memory package having a plurality of semiconductor elements incorporated therein.

【0002】[0002]

【従来の技術】メモリーパッケージなどの樹脂封止型半
導体装置では、顧客の要求から年々記憶容量の増加が進
み、これに伴って半導体素子ルールの微細化が進んでい
る。例えば64MDRAM(64Mbit Dynamic Random A
ccess Memory)ではルールが0.3μm となり、微細化
の限界に近づいたといわれている。従って今後、これ以
上の高密度パッケージを得るには装置内に複数の半導体
素子を内蔵することが有効となる。このための手段とし
て、これまでに以下のものをはじめ多数提案され、公知
となっている。
2. Description of the Related Art In a resin-sealed semiconductor device such as a memory package, the storage capacity has been increasing year by year due to customer requirements, and the semiconductor element rule is becoming finer accordingly. For example, 64M DRAM (64Mbit Dynamic Random A
In ccess memory, the rule is 0.3 μm, which is said to be nearing the limit of miniaturization. Therefore, in the future, it will be effective to incorporate a plurality of semiconductor elements in the device in order to obtain a higher density package. As means for this purpose, many proposals including the following have been proposed and are well known.

【0003】(1)特開平1−295454 号公報:大きさの
異なる二枚の半導体素子を、大きい方を下にしてリード
フレーム上に搭載し、ワイヤを用いてリードと半導体素
子との電気接続を行う。
(1) Japanese Patent Application Laid-Open No. 1-295454: Two semiconductor elements having different sizes are mounted on a lead frame with the larger one facing down, and the wires are used to electrically connect the leads to the semiconductor element. I do.

【0004】(2)特開平2−2658 号公報:リードフレ
ームの両面に半導体素子の非回路形成面を接合し、ワイ
ヤを用いて両面より各々電気接続を行う。
(2) Japanese Unexamined Patent Publication No. 2-2658: Non-circuit forming surfaces of a semiconductor element are joined to both surfaces of a lead frame, and electrical connection is made from both surfaces using wires.

【0005】(3)日経マイクロデバイス1991年4
月号p.80:半導体素子の非回路形成面どうしを重ね
合わせ、TAB(Tape Automated Bond−ing)を用いて
電気接続を行う。
(3) Nikkei Microdevice 1991 4
Monthly p. 80: The non-circuit forming surfaces of the semiconductor elements are overlapped with each other and electrically connected using TAB (Tape Automated Bonding).

【0006】[0006]

【発明が解決しようとする課題】上記(1)〜(3)
は、それぞれ以下のような問題点、すなわち、本発明が
解決すべき課題があった。
[Problems to be Solved by the Invention] (1) to (3)
Have the following problems, that is, the problems to be solved by the present invention.

【0007】(1)パッケージ外形寸法の制約の厳しい
メモリーパッケージの場合、半導体素子の外形寸法の小
型化は非常に重要な課題であり、したがって二枚の半導
体素子の大きさを変えることは、必ずどちらかにむだな
エリアが生じることになる。このことからメモリーパッ
ケージでは、複数の同一半導体素子が内蔵できることが
望ましい。
(1) In the case of a memory package in which package outer dimensions are severely restricted, miniaturization of the outer dimensions of a semiconductor element is a very important issue, and therefore it is inevitable to change the size of two semiconductor elements. A wasteful area will be created in either side. For this reason, it is desirable that a plurality of the same semiconductor elements can be built in the memory package.

【0008】(2)リードフレームの両面に半導体素子
の非回路形成面を接合することで、その両面よりワイヤ
ボンディングを行うことが必要となり、そのためリード
フレームを裏返す工程が必要となる、また裏返すことで
下側になった面のワイヤがつぶれるなどの不都合が生じ
る恐れがある。したがって、ワイヤボンディングはいず
れの半導体素子に対しても同一の方向より行われること
が望ましい。
(2) By bonding the non-circuit forming surface of the semiconductor element to both surfaces of the lead frame, it is necessary to perform wire bonding from both surfaces, which requires a step of turning over the lead frame, and turning over. There is a possibility that inconvenience may occur, such as the wire on the lower surface being crushed. Therefore, it is desirable that wire bonding be performed in the same direction on any semiconductor element.

【0009】(3)半導体素子とリードとの電気接続に
TABを用いることは、製造コストの面でワイヤボンデ
ィングに比べて非常に不利であり、できるかぎり避ける
必要がある。
(3) The use of TAB for electrical connection between the semiconductor element and the lead is extremely disadvantageous in comparison with wire bonding in terms of manufacturing cost, and should be avoided as much as possible.

【0010】[0010]

【課題を解決するための手段】上記課題は、以下のよう
な手段により達成される。
The above object can be achieved by the following means.

【0011】(a)一枚目の半導体素子の回路形成面に
絶縁部材を介して、リードフレーム中に構成された接合
板を接合し、所定のワイヤボンディングを行い、同接合
板の反対面に絶縁部材を介して二枚目の半導体素子の非
回路形成面を接合し、再度所定のワイヤボンディングを
行い、それらを樹脂で封止,成形して樹脂封止型半導体
装置を得る。
(A) The bonding plate formed in the lead frame is bonded to the circuit forming surface of the first semiconductor element via an insulating member, and predetermined wire bonding is performed, and the bonding plate is formed on the opposite surface of the bonding plate. The non-circuit forming surface of the second semiconductor element is joined via an insulating member, predetermined wire bonding is performed again, and they are sealed and molded with resin to obtain a resin-sealed semiconductor device.

【0012】(b)一枚目の半導体素子の回路形成面
に、絶縁部材を介してリードの集合体の内端部を接合
し、所定のワイヤボンディングを行い、同リードの反対
面に絶縁部材を介して二枚目の半導体素子の非回路形成
面を接合し、同半導体素子の回路形成面に絶縁部材を介
してリードの集合体を接合し、再度所定のワイヤボンデ
ィングを行い、両者の対応するリードどうしを電気的に
接続し、それらを樹脂で封止,成形して樹脂封止型半導
体装置を得る。あるいは、二枚の半導体素子は各々その
回路形成面に絶縁部材を介してリードの集合体の内端部
を接合し、各々所定のワイヤボンディングを行い、その
状態の両者を重ね合わせ、対応するリードどうしを電気
的に接続し、それらを樹脂で封止,成形して樹脂封止型
半導体装置を得る。
(B) The inner end portion of the lead assembly is joined to the circuit forming surface of the first semiconductor element via an insulating member, predetermined wire bonding is performed, and the insulating member is provided on the opposite surface of the lead. The non-circuit forming surface of the second semiconductor element is joined via, the lead assembly is joined to the circuit forming surface of the same semiconductor element via the insulating member, and the predetermined wire bonding is performed again, and the two The leads are electrically connected to each other, and they are sealed and molded with resin to obtain a resin-sealed semiconductor device. Alternatively, the two semiconductor elements each have an inner end portion of the lead assembly bonded to the circuit formation surface via an insulating member, and each wire bonding is performed in a predetermined manner. These are electrically connected to each other, and they are sealed and molded with resin to obtain a resin-sealed semiconductor device.

【0013】(c)(b)と同様の製造方法により、三
枚以上の半導体素子を内蔵した樹脂封止型半導体装置を
得る。
By the manufacturing method similar to (c) and (b), a resin-sealed semiconductor device having three or more semiconductor elements built therein is obtained.

【0014】[0014]

【作用】本発明は、上記(a)〜(c)に対応してそれ
ぞれ次のように作用する。
The present invention operates as follows corresponding to the above (a) to (c).

【0015】(a)接合板は、半導体素子の周縁部に設
けられた電極パッドを覆わない格好とすることで、接合
板を一枚目の半導体素子の回路形成面に接合した状態で
もワイヤボンディングが行え、しかも接合板とその両面
の絶縁部材を合わせた厚さはワイヤのループ高さよりも
大きくなるので、二枚目の半導体素子をその上部に搭載
してもワイヤに干渉することはない。従って本発明によ
って、同一な二枚の半導体素子を、同一方向に内蔵し
た、大容量の樹脂封止型半導体装置が得られる。
(A) The bonding plate is formed so as not to cover the electrode pads provided on the peripheral portion of the semiconductor element, so that wire bonding can be performed even when the bonding plate is bonded to the circuit forming surface of the first semiconductor element. Since the combined thickness of the bonding plate and the insulating members on both sides thereof is larger than the loop height of the wire, even if the second semiconductor element is mounted on the upper portion of the wire, it does not interfere with the wire. Therefore, according to the present invention, a large-capacity resin-sealed semiconductor device in which two identical semiconductor elements are embedded in the same direction can be obtained.

【0016】(b)所定の形状をなしたリードの集合体
と、一枚目の半導体素子の中央部長手方向に沿って設け
られた電極パッド群は、同半導体素子の回路形成面上で
電気接続されるが、同リードとその両面の絶縁部材を合
わせた厚さはワイヤのループ高さよりも大きくなるの
で、(a)同様に二枚目の半導体素子をその上部に搭載
してもワイヤに干渉することはない。従って本方法によ
っても(a)同様同一な二枚の半導体素子を、同一方向
に内蔵した、大容量の樹脂封止型半導体装置が得られ
る。
(B) An assembly of leads having a predetermined shape and an electrode pad group provided along the longitudinal direction of the central portion of the first semiconductor element are electrically connected to each other on the circuit forming surface of the same semiconductor element. Although it is connected, the combined thickness of the lead and the insulating members on both sides is greater than the loop height of the wire, so even if a second semiconductor element is mounted on top of it as in (a) There is no interference. Therefore, also by this method, a large-capacity resin-sealed semiconductor device in which two identical semiconductor elements are embedded in the same direction as in (a) can be obtained.

【0017】(c)各々の半導体素子とそれに対応する
リードは、(b)同様の作用によって、順次、積層され
るので、本方法によって同一な複数枚の半導体素子を内
蔵した、大容量の樹脂封止型半導体装置が得られる。
(C) Since each semiconductor element and its corresponding lead are sequentially laminated by the same action as in (b), a large-capacity resin containing a plurality of identical semiconductor elements is built by this method. A sealed semiconductor device is obtained.

【0018】[0018]

【実施例】以下、本発明の実施例を、図を用いて説明す
る。
Embodiments of the present invention will be described below with reference to the drawings.

【0019】図1は本発明の第一実施例である樹脂封止
型半導体装置の断面を示したものである。以下に製造方
法を述べる。まず回路形成面を上にした半導体素子1a
が載置された状態で、電極パッド1apが露出するよ
う、半導体素子1aよりも寸法が小さく、かつ、両面に
絶縁部材5を備えた接合板2と、リード3の集合体を備
えたリードフレームを搭載,接合し、ワイヤ4で半導体
素子1aとリード3との電気接続(ワイヤボンディン
グ)を行う。その後、接合板2の上部より半導体素子1
bを回路形成面を上にして搭載,接合し、リード3との
電気接続を行う。この状態となったものを樹脂6にて封
止し、リード3の不要部分を切断し、成形する。なお、
ここで用いる絶縁部材5は、一般に両面に接着剤の塗布
された厚さ100μm程度のフィルムが用いられるが、
その他にエポキシ系の接着剤を用いてもよい。
FIG. 1 shows a cross section of a resin-sealed semiconductor device which is a first embodiment of the present invention. The manufacturing method will be described below. First, the semiconductor element 1a with the circuit formation side facing up
A lead frame having a joint plate 2 having a smaller size than the semiconductor element 1a and having insulating members 5 on both surfaces and an assembly of leads 3 so that the electrode pads 1ap are exposed. Are mounted and joined, and the electrical connection (wire bonding) between the semiconductor element 1a and the lead 3 is performed by the wire 4. After that, the semiconductor element 1 is
Then, b is mounted with the circuit forming surface facing upward and bonded, and then electrically connected to the lead 3. This state is sealed with resin 6, and unnecessary portions of leads 3 are cut and molded. In addition,
As the insulating member 5 used here, a film having a thickness of about 100 μm, which is coated with an adhesive on both sides, is generally used.
Alternatively, an epoxy adhesive may be used.

【0020】図2は同実施例に用いるリードフレームの
一部を示したもので、鎖線A,B,Cはそれぞれ絶縁部
材5,半導体素子1a(1b),樹脂6の輪郭を示して
いる。先の説明の通り電極パッド1apは鎖線B,Cの
間に設けられる。なお、この図のように接合板2の全面
にわたって絶縁部材5を介在させることによって、絶縁
部材5の接着層内部に気泡が発生するなど信頼性が低下
する恐れがある場合には、絶縁部材を分割し、必要最小
限の面積となるようにするとよい。
FIG. 2 shows a part of the lead frame used in this embodiment, and the chain lines A, B and C show the outlines of the insulating member 5, the semiconductor element 1a (1b) and the resin 6, respectively. As described above, the electrode pad 1ap is provided between the chain lines B and C. When the insulating member 5 is interposed over the entire surface of the bonding plate 2 as shown in this figure, if there is a possibility that reliability may be deteriorated such as generation of air bubbles inside the adhesive layer of the insulating member 5, the insulating member 5 may be used. It is recommended to divide it so that the required minimum area is obtained.

【0021】図3は本発明の第二実施例のリードフレー
ムの一部を示したもので、前実施例の接合板2の代わり
に電気的に無効なリードを設けたものである。
FIG. 3 shows a part of the lead frame of the second embodiment of the present invention, in which electrically ineffective leads are provided in place of the joining plate 2 of the previous embodiment.

【0022】メモリーパッケージなどの樹脂封止型半導
体装置では、通常、プリント基板にはんだ付けする際、
リフローという方式がとられることが多い。これは装置
全体が230〜240℃程度の高温にさらされるもの
で、樹脂6に含まれる大気水分が許容値を超えたり、装
置内部に絶縁フィルムなどの膨張しやすい部材が含まれ
ていたり、部材間のはく離が生じたりするとすると、こ
のとき樹脂6にクラックが生じる場合がある。
In a resin-sealed semiconductor device such as a memory package, when soldering to a printed circuit board,
A method called reflow is often used. This is because the entire device is exposed to a high temperature of about 230 to 240 ° C., the atmospheric moisture contained in the resin 6 exceeds an allowable value, the device contains an easily expandable member such as an insulating film, or a member. If peeling occurs, the resin 6 may be cracked at this time.

【0023】本実施例により絶縁部材(フィルム)の面
積を小さくできると同時に、半導体素子1a(1b)
に、直接、樹脂6が付着する面積が増加して接着強度が
向上するため、クラックを防止する効果がある。
According to this embodiment, the area of the insulating member (film) can be reduced, and at the same time, the semiconductor element 1a (1b) can be reduced.
In addition, since the area where the resin 6 adheres directly increases and the adhesive strength improves, it is effective in preventing cracks.

【0024】図4は本発明の第三実施例である樹脂封止
型半導体装置の断面を示したものである。リード3の樹
脂6中に内蔵された部分(内部リード)には段差を設け
てあり、半導体素子1a,1bとはそれぞれ別の段差部
でワイヤボンディングを行っている。第一実施例を用い
た場合に、ワイヤ4が半導体素子のコーナ部と接触する
恐れがある場合にはこのような手段をとるとよい。なお
内部リードは必ずしも図示のように直角に曲げる必要は
なく、効果が得られる程度の最小限の段差があればよ
い。なお図中のバスバー3agは電源供給、もしくは接
地用の共通リードである。
FIG. 4 shows a cross section of a resin-sealed semiconductor device which is a third embodiment of the present invention. A step is provided in a portion (internal lead) embedded in the resin 6 of the lead 3, and wire bonding is performed at a step different from each of the semiconductor elements 1a and 1b. When the wire 4 is likely to come into contact with the corner portion of the semiconductor element when the first embodiment is used, such means may be adopted. The internal leads do not necessarily have to be bent at a right angle as shown in the drawing, but may have a minimum level difference so that the effect can be obtained. The bus bar 3ag in the figure is a common lead for power supply or grounding.

【0025】図5は本発明の第四実施例である樹脂封止
型半導体装置の断面を示したものである。以下に製造方
法を述べる。まず回路形成面を上にした半導体装置1a
が載置された状態で、電極パッド1apが露出するよう
な形状をなし、かつ、両面に絶縁部材5を備えたリード
3aの集合体を持つリードフレームを搭載,接合し、ワ
イヤ4で半導体素子1aとリード3aとの電気接続を行
う。その後、リード3aの上部より回路形成面を上にし
た半導体素子1bと、リード3bの集合体を持つリード
フレームを搭載,接合し、ワイヤ4にて半導体素子1b
とリード3bとの電気接続を行う。そしてリード3aと
3bとを電気的に接合し、リード3bを切断,成形し、
これらを樹脂6にて封止し、リード3aの不要部分を切
断して成形する。あるいは別の製造方法として、半導体
素子1a,1bそれぞれについてあらかじめ電気接続を
行い、後にその状態の両者を積層,接合しても良い。図
中のF部は、他に比べて樹脂封止工程での樹脂6の流路
が小さいが、通常樹脂流動性については特に問題は生じ
ない。しかし、例えばリード3のピッチが微細、あるい
は形状が複雑な製品の場合には、場合によってこの部分
に樹脂6が流入しなくなる可能性があるので、あらかじ
めこの部分をシリコーンゲルや未硬化の液状樹脂によっ
て封止しておくなどの対策を施すとよい。
FIG. 5 shows a cross section of a resin-sealed semiconductor device which is a fourth embodiment of the present invention. The manufacturing method will be described below. First, the semiconductor device 1a with the circuit formation side facing up
Is mounted, a lead frame having a shape in which the electrode pad 1ap is exposed and having an assembly of leads 3a having insulating members 5 on both sides is mounted and bonded, and the wire 4 is used as a semiconductor element. Electrical connection is made between the lead 1a and the lead 3a. After that, the semiconductor element 1b having the circuit forming surface facing upward from the upper portion of the lead 3a and the lead frame having the assembly of the leads 3b are mounted and bonded, and the semiconductor element 1b is connected by the wire 4.
Is electrically connected to the lead 3b. Then, the leads 3a and 3b are electrically joined, the lead 3b is cut and molded,
These are sealed with resin 6, and unnecessary portions of the leads 3a are cut and molded. Alternatively, as another manufacturing method, each of the semiconductor elements 1a and 1b may be electrically connected in advance, and then both of them may be laminated and joined together. The F portion in the figure has a smaller flow path for the resin 6 in the resin sealing step than the other portions, but normally there is no particular problem with respect to resin fluidity. However, for example, in the case of a product in which the pitch of the leads 3 is fine or the shape is complicated, there is a possibility that the resin 6 will not flow into this portion in some cases. It is advisable to take measures such as sealing with.

【0026】図6は同実施例に用いるリードフレームの
一部を示したもので、鎖線A,B,Cはそれぞれ絶縁部
材5,半導体素子1a(1b),樹脂6の輪郭を示して
いる。電極パッドは半導体素子の中央部に長手方向に沿
って設けられる。
FIG. 6 shows a part of the lead frame used in this embodiment, and chain lines A, B and C respectively show the contours of the insulating member 5, the semiconductor element 1a (1b) and the resin 6. The electrode pad is provided in the central portion of the semiconductor element along the longitudinal direction.

【0027】図7は同実施例の電気接続部分(図5のF
部)を拡大したものである。ワイヤ4のループ高さhr
は通常200ないし300μm程度で、一方、リード3
aとその両面の絶縁部材5の厚さの和Tl+Ts1+T
s2は400μm程度となるため、上側に半導体素子1
bを積載してもワイヤ4が干渉することはない。また、
この図のようにリード3aのワイヤ4が接触する部分を
他に比べて薄くすれば、さらにその効果が向上する。
FIG. 7 shows an electrical connection portion of the same embodiment (F in FIG. 5).
Part) is enlarged. Loop height of wire 4 hr
Is usually about 200 to 300 μm, while lead 3
a and the sum of the thicknesses of the insulating members 5 on both sides thereof Tl + Ts1 + T
Since s2 is about 400 μm, the semiconductor element 1 is on the upper side.
The wire 4 does not interfere even when b is loaded. Also,
If the portion of the lead 3a that contacts the wire 4 is made thinner than the other portions as shown in this figure, the effect is further improved.

【0028】図8は本発明の第五実施例である樹脂封止
型半導体装置の断面を示したものである。リード3a
は、半導体素子1aの外側においてその高さがリード3
bと同じくなるよう段差をもっており、両者はワイヤ4
で電気的に接続されている。本発明では半導体素子や内
部リードは絶縁部材5を介して強固に接合されるので、
リードどうしは必ずしもろう材や溶接などで機械的に接
合する必要はなく、このように電気的な導通さえはから
れればよい。またリード3aに設ける段差は、特にリー
ド3bの高さに合わせる必要はなく、曲げ加工を施すこ
とで電気接続位置の精度を損なわない程度でよい。
FIG. 8 shows a cross section of a resin-sealed semiconductor device which is a fifth embodiment of the present invention. Lead 3a
The height of the lead 3 is outside the semiconductor element 1a.
There is a step so that it is the same as b, and both are wire 4
It is electrically connected with. In the present invention, since the semiconductor element and the internal lead are firmly joined via the insulating member 5,
The leads do not necessarily have to be mechanically joined by a brazing material or welding, and it suffices if electrical conduction is obtained in this way. Further, the step provided on the lead 3a does not have to be adjusted to the height of the lead 3b in particular, and may be bent so as not to impair the accuracy of the electrical connection position.

【0029】図9は本発明の第六実施例である樹脂封止
型半導体装置の断面を示したものである。リード3aは
半導体素子1aの上面に段差をもっている。こうするこ
とで二枚の半導体素子の間隔、すなわち、半導体素子1
aとリード3aとの電気接続部の高さを高くすることが
できるので、半導体素子1aがワイヤ4に干渉するのを
防ぐことができ、実施例のような内部リードの薄肉化を
省略することができる。
FIG. 9 shows a cross section of a resin-sealed semiconductor device which is a sixth embodiment of the present invention. The lead 3a has a step on the upper surface of the semiconductor element 1a. By doing so, the distance between the two semiconductor elements, that is, the semiconductor element 1
Since it is possible to increase the height of the electrical connection portion between a and the lead 3a, it is possible to prevent the semiconductor element 1a from interfering with the wire 4, and omit the thinning of the inner lead as in the embodiment. You can

【0030】図10は本発明の第七実施例である樹脂封
止型半導体装置の断面を示したものである。構造的には
第五実施例と同様であるが、パッケージ中に四枚の半導
体素子が内蔵されている。本発明によれば基本的な製造
工程の繰り返しでこのように多数の半導体素子を内蔵す
ることができる。またこの図ではリードの両面に半導体
素子を接合した例を示したが、この他に第一実施例のよ
うに接合板を用いる方法によっても、三枚以上の半導体
素子の内蔵は可能である。
FIG. 10 shows a cross section of a resin-sealed semiconductor device which is a seventh embodiment of the present invention. The structure is similar to that of the fifth embodiment, but four semiconductor elements are incorporated in the package. According to the present invention, such a large number of semiconductor elements can be incorporated by repeating the basic manufacturing process. Further, in this figure, an example in which the semiconductor elements are bonded to both sides of the lead is shown, but in addition to this, three or more semiconductor elements can be incorporated by the method of using the bonding plate as in the first embodiment.

【0031】[0031]

【発明の効果】本発明によれば、二枚、もしくは三枚以
上の同一な半導体素子が、同一の方向に搭載、および電
気接続できるので、大容量で工程簡略化に好適、かつは
んだ付け実装時の高音環境中における信頼性に優れる樹
脂封止型半導体装置が得られる。
According to the present invention, since two or three or more identical semiconductor elements can be mounted and electrically connected in the same direction, they have a large capacity and are suitable for simplification of the process, and solder mounting. It is possible to obtain a resin-sealed semiconductor device having excellent reliability in a high-pitched sound environment.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第一実施例である樹脂封止型半導体装
置の断面図。
FIG. 1 is a sectional view of a resin-sealed semiconductor device that is a first embodiment of the present invention.

【図2】図1のリードフレームの一部の平面図。FIG. 2 is a plan view of a part of the lead frame shown in FIG.

【図3】本発明の第二実施例のリードフレームの一部の
平面図。
FIG. 3 is a plan view of a part of the lead frame of the second embodiment of the present invention.

【図4】本発明の第三実施例である樹脂封止型半導体装
置の断面図。
FIG. 4 is a sectional view of a resin-sealed semiconductor device that is a third embodiment of the present invention.

【図5】本発明の第四実施例である樹脂封止型半導体装
置の断面図。
FIG. 5 is a sectional view of a resin-sealed semiconductor device that is a fourth embodiment of the present invention.

【図6】第四実施例のリードフレームの一部の平面図。FIG. 6 is a plan view of a part of the lead frame of the fourth embodiment.

【図7】第四実施例の樹脂封止型半導体装置の電気接続
部の断面図。
FIG. 7 is a sectional view of an electrical connection portion of a resin-sealed semiconductor device of a fourth embodiment.

【図8】本発明の第五実施例である樹脂封止型半導体装
置の断面図。
FIG. 8 is a sectional view of a resin-sealed semiconductor device that is a fifth embodiment of the present invention.

【図9】本発明の第六実施例である樹脂封止型半導体装
置の断面図。
FIG. 9 is a sectional view of a resin-sealed semiconductor device that is a sixth embodiment of the present invention.

【図10】本発明の第七実施例である樹脂封止型半導体
装置の断面図。
FIG. 10 is a sectional view of a resin-sealed semiconductor device that is a seventh embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1a,1b…半導体素子、1ap…電極パッド、2…接
合板、3,3a,3b…リード、3ag…バスバー、4
…ワイヤ、5…絶縁部材、6…樹脂。
1a, 1b ... Semiconductor element, 1ap ... Electrode pad, 2 ... Bonding plate, 3, 3a, 3b ... Lead, 3ag ... Bus bar, 4
... wire, 5 ... insulating member, 6 ... resin.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 小幡 まや 茨城県土浦市神立町502番地 株式会社日 立製作所機械研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Maya Obata, 502 Jinritsucho, Tsuchiura City, Ibaraki Prefecture Inside the Hiritsu Manufacturing Co., Ltd. Mechanical Research Laboratory

Claims (20)

【特許請求の範囲】[Claims] 【請求項1】二枚の半導体素子と、複数のリードと、半
導体素子の接合板と、絶縁部材と、ワイヤを備え、それ
らを樹脂で封止,成形した樹脂封止型半導体装置におい
て、一枚の半導体素子の回路形成面に絶縁部材を介して
半導体素子の接合板を接合し、ワイヤを用いて所定の電
気接続を行なった後、同接合板のその反対面に絶縁部材
を介してもう一枚の半導体素子の非回路形成面を接合
し、ワイヤを用いて所定の電気接続を行ない、それらを
樹脂で封止,成形したことを特徴とする樹脂封止型半導
体装置。
1. A resin-sealed semiconductor device comprising two semiconductor elements, a plurality of leads, a bonding plate for the semiconductor elements, an insulating member, and wires, which are sealed and molded with resin. After joining the bonding plate of the semiconductor element to the circuit forming surface of the one semiconductor element via the insulating member and making a predetermined electrical connection using a wire, the other surface of the bonding plate is connected via the insulating member to the other side. A resin-encapsulated semiconductor device characterized in that a non-circuit forming surface of one semiconductor element is joined, a predetermined electrical connection is made using a wire, and they are sealed and molded with a resin.
【請求項2】二枚の半導体素子と、複数のリードと、絶
縁部材と、ワイヤを備え、それらを樹脂で封止,成形し
た樹脂封止型半導体装置において、各半導体素子の回路
形成面に絶縁部材を介してリードの半導体素子の近傍の
一部を接合し、ワイヤを用いて所定の電気接続を行い、
それらのうちいずれか一方について、リードを所定の部
位より切断除去,成形し、他方のもののリードに、絶縁
部材を介してその半導体素子の非回路形成面を接合し、
それら双方の対応しあうリードを電気的に接合した後、
それらを樹脂で封止,成形したことを特徴とする樹脂封
止型半導体装置。
2. A resin-encapsulated semiconductor device comprising two semiconductor elements, a plurality of leads, an insulating member, and a wire, which are encapsulated and molded with a resin, on the circuit forming surface of each semiconductor element. Part of the vicinity of the semiconductor element of the lead is joined via an insulating member, and a predetermined electrical connection is made using a wire,
For any one of them, the lead is cut and removed from a predetermined portion and molded, and the non-circuit forming surface of the semiconductor element is joined to the lead of the other through an insulating member,
After electrically connecting the corresponding leads of both of them,
A resin-encapsulated semiconductor device characterized by encapsulating and molding them with resin.
【請求項3】複数の半導体素子と、複数のリードと、絶
縁部材と、ワイヤを備え、それらを樹脂で封止,成形し
た樹脂封止型半導体装置において、各半導体素子の回路
形成面に絶縁部材を介してリードの半導体素子近傍の一
部を接合し、ワイヤを用いて所定の電気接続を行い、そ
れらのうち一つを除いたものについて、リードを所定の
部位より切断除去,成形し、残りの一つのもののリード
上に絶縁部材を介して、順次、半導体素子の非回路形成
面より積載,接合し、それら全ての対応しあうリードど
うしを電気的に接合した後、それらを樹脂で封止,成形
したことを特徴とする樹脂封止型半導体装置。
3. A resin-encapsulated semiconductor device comprising a plurality of semiconductor elements, a plurality of leads, an insulating member, and a wire, which are encapsulated and molded with a resin to insulate the circuit forming surface of each semiconductor element. A part of the vicinity of the semiconductor element of the lead is joined through a member, a predetermined electrical connection is made using a wire, and one except one of them is cut and removed from a predetermined part, and molded, The remaining one of the leads is sequentially stacked and joined from the non-circuit forming surface of the semiconductor element via an insulating member, and all the corresponding leads are electrically joined, and then they are sealed with resin. A resin-encapsulated semiconductor device characterized by being molded and stopped.
【請求項4】請求項1において、前記ワイヤによって他
と電気接続される前記リードのうち、成形後に樹脂中に
内蔵される部分に複数ヶ所曲げ加工が施されている樹脂
封止型半導体装置。
4. The resin-encapsulated semiconductor device according to claim 1, wherein a portion of the lead, which is electrically connected to another by the wire, that is embedded in the resin after molding is bent at a plurality of locations.
【請求項5】請求項2において、前記絶縁部材を介して
いずれかの半導体素子と接合されるリードは、電気的に
有効なリードである樹脂封止型半導体装置。
5. The resin-sealed semiconductor device according to claim 2, wherein the lead joined to any of the semiconductor elements via the insulating member is an electrically effective lead.
【請求項6】請求項3において、前記絶縁部材を介して
いずれかの半導体素子と接合されるリードは、電気的に
有効なリードである樹脂封止型半導体装置。
6. The resin-sealed semiconductor device according to claim 3, wherein the lead joined to any one of the semiconductor elements via the insulating member is an electrically effective lead.
【請求項7】請求項2において、前記絶縁部材を介して
いずれかの半導体素子と接合されるリードは、電気的に
無効なリードである樹脂封止型半導体装置。
7. The resin-sealed semiconductor device according to claim 2, wherein the lead joined to any one of the semiconductor elements via the insulating member is an electrically ineffective lead.
【請求項8】請求項3において、前記絶縁部材を介して
いずれかの半導体素子と接合されるリードは、電気的に
無効なリードである樹脂封止型半導体装置。
8. The resin-sealed semiconductor device according to claim 3, wherein the lead joined to any of the semiconductor elements via the insulating member is an electrically ineffective lead.
【請求項9】請求項2において、前記リードのうち、前
記ワイヤによって半導体素子と電気接続される部分が他
に比べて薄い樹脂封止型半導体装置。
9. The resin-sealed semiconductor device according to claim 2, wherein a portion of the lead electrically connected to the semiconductor element by the wire is thinner than other portions.
【請求項10】請求項3において、前記リードのうち、
前記ワイヤによって半導体素子と電気接続される部分が
他に比べて薄い樹脂封止型半導体装置。
10. The lead according to claim 3,
A resin-sealed semiconductor device in which a portion electrically connected to a semiconductor element by the wire is thinner than other portions.
【請求項11】請求項1において、前記半導体素子の回
路形成面とそれに接合される接合板との間に、封止に用
いた樹脂が介在する部分をもつ樹脂封止型半導体装置。
11. The resin-encapsulated semiconductor device according to claim 1, having a portion in which a resin used for encapsulation is interposed between a circuit forming surface of the semiconductor element and a joining plate joined thereto.
【請求項12】請求項2において、前記半導体素子の回
路形成面とそれに接合されるリードとの間に、封止に用
いた樹脂が介在する部分をもった樹脂封止型半導体装
置。
12. A resin-sealed semiconductor device according to claim 2, wherein a resin used for sealing is interposed between a circuit forming surface of the semiconductor element and a lead joined thereto.
【請求項13】請求項3において、前記半導体素子の回
路形成面とそれに接合されるリードとの間に、封止に用
いた樹脂が介在する部分を設けた樹脂封止型半導体装
置。
13. The resin-encapsulated semiconductor device according to claim 3, wherein a portion in which the resin used for encapsulation is interposed is provided between the circuit formation surface of the semiconductor element and the lead joined thereto.
【請求項14】請求項1において、前記二枚の半導体素
子が少なくとも200μm以上離れている樹脂封止型半
導体装置。
14. The resin-sealed semiconductor device according to claim 1, wherein the two semiconductor elements are separated by at least 200 μm or more.
【請求項15】請求項2において、前記二枚の半導体素
子が少なくとも200μm以上離れている樹脂封止型半
導体装置。
15. The resin-sealed semiconductor device according to claim 2, wherein the two semiconductor elements are separated from each other by at least 200 μm or more.
【請求項16】請求項3において、前記ある半導体素子
からそれに最寄りの半導体素子まで、少なくとも200
μm以上離れている樹脂封止型半導体装置。
16. The semiconductor device according to claim 3, wherein at least 200 from the certain semiconductor element to the semiconductor element closest thereto.
A resin-encapsulated semiconductor device separated by at least μm.
【請求項17】請求項1において、内蔵する二枚の前記
半導体素子が同一のものである樹脂封止型半導体装置。
17. The resin-sealed semiconductor device according to claim 1, wherein the two built-in semiconductor elements are the same.
【請求項18】請求項2において、前記内蔵する二枚の
半導体素子が同一のものである樹脂封止型半導体装置。
18. The resin-encapsulated semiconductor device according to claim 2, wherein the two built-in semiconductor elements are the same.
【請求項19】請求項3において、前記内蔵するすべて
の半導体素子が同一のものである樹脂封止型半導体装
置。
19. The resin-sealed semiconductor device according to claim 3, wherein all the built-in semiconductor elements are the same.
【請求項20】請求項1において、前記一枚の半導体素
子の平面積が、接合板のそれよりも大である樹脂封止型
半導体装置。
20. The resin-sealed semiconductor device according to claim 1, wherein the plane area of the one semiconductor element is larger than that of the bonding plate.
JP3264522A 1991-10-14 1991-10-14 Resin-sealed type semiconductor device Pending JPH05109975A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3264522A JPH05109975A (en) 1991-10-14 1991-10-14 Resin-sealed type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3264522A JPH05109975A (en) 1991-10-14 1991-10-14 Resin-sealed type semiconductor device

Publications (1)

Publication Number Publication Date
JPH05109975A true JPH05109975A (en) 1993-04-30

Family

ID=17404427

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3264522A Pending JPH05109975A (en) 1991-10-14 1991-10-14 Resin-sealed type semiconductor device

Country Status (1)

Country Link
JP (1) JPH05109975A (en)

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