JPH0486788A - Microcomputer - Google Patents

Abstract

PURPOSE:To facilitate the use meeting designing of various systems by providing a means which can select a 1st clock and a 2nd clock of the frequency different from the frequency thereof. CONSTITUTION:This microcomputer has the selecting means which selects the 1st clock and the 2nd clock of the frequency different from the frequency of the 1st clock and a means for controlling this means. The operation of a screen displaying means is executed by either of the two clocks; the 1st clock which operates a CPU or the 2nd clock of the frequency different from the frequency thereof. Then, the operating frequency of the screen displaying means is arbitrarily changed regardless of the operation frequency of the CPU. The changing over in a way as to allow the operation is executed in this way even if various clock oscillators are used. The microcomputer usable according to various systems is thus obtd.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microcomputer having a screen display function for displaying characters such as letters, numbers, and symbols on a display screen of a TV or the like.

[Conventional technology]

FIG. 5 is a block diagram showing the configuration of a conventional microcomputer having a screen display function. This microcomputer mainly controls the TV tuner and additionally controls the TV tuner.
It has a screen display function that displays characters such as channel number and volume level on the V display screen. In the figure, l is the CPU, which mainly controls the tuner and external CPU.
It operates using the CPU clock CK from the PII clock oscillator 4. The CPU clock generator 4 uses a crystal oscillator, and divides its output appropriately to generate the CPU clock CK.
generate.

The CPU clock CK is also given to the screen display clock control circuit 3, which generates a screen display clock pulse synchronized with a horizontal synchronization signal of a specific period. The generated clock pulses are given to the screen display device 2, and the screen display device 2 controls the display position using the given clock pulses to display T.
A character is displayed on a display screen such as V. In this way, in conventional microcomputers, the CPU clock CK
Both the PU 1 and the screen display device 2 were operating.

(Problem to be Solved by the Invention) However, when the CPU 1 and the screen display device 2 are operated with one clock (CPU clock CK), the operating frequency of the screen display device 2 is limited by the frequency of the CPU clock CK. Therefore, when displaying characters on a display screen such as a TV, there is a problem in that it is difficult to adjust the display position in the horizontal direction.In other words, the operating clock of the screen display device 2 is controlled by the CPU clock CK. Therefore, when the horizontal display position is determined by the number of clock pulses, the display position is fixed by the number of clock pulses, and if the number of clock pulses is constant, the display position cannot be adjusted to the left or right.

Also, if you want to display characters using the double scan function used on high-definition TVs, the period of the horizontal synchronization signal on conventional TVs is 63.5 μsec, whereas on high-definition TVs it is half that, 31.25 μsec. , the operating frequency is 2
Need to double it. As a result, the screen display function can be used like a conventional TV, but the operating frequency is CP
If it is limited by the frequency of the U clock and cannot be doubled,
A problem arises in that only half the number of characters displayed on a conventional TV display screen can be displayed on a high-definition TV display screen. That is, it cannot support various TV systems with different horizontal synchronization signals.

The present invention has been made in view of the above circumstances, and it is possible to select the CPU clock or a clock from another screen display oscillator as the operating clock of the screen display device, and also enables operation using various clock oscillators. The purpose of the present invention is to provide a microcomputer that can be switched to and used in various systems.

[Means to solve the problem]

The microcomputer according to the present invention is configured to select either the first clock for operating the CPU or the second clock input from the outside as the clock for operating the screen display means.

[Operation] In the present invention, the operation of the screen display means is performed using one of two clocks: the first clock that operates the CPU, or the second clock that has a different cycle. This allows the operating frequency of the screen display means to be arbitrarily changed regardless of the operating frequency of CP[I.

[Examples] Hereinafter, the present invention will be described in detail based on drawings showing examples thereof. FIG. 1 is a block diagram showing the configuration of a microcomputer according to the present invention. This microcomputer mainly controls the TV tuner and additionally has a screen display function for displaying characters such as channel numbers and volume levels on the TV display screen. In the figure, 1 is the CPU
It mainly performs tuner control and operates using the CPIJ clock CK, which is the first clock generated by the external CPU clock oscillator 4. The CPU clock oscillator 4 uses a crystal oscillator, and divides its output appropriately to generate the CPU clock oscillator 4.
Generate U clock CK. The CPU clock CK is applied to one input terminal of the clock pulse selection circuit 8a.

The first clock pulse CKI from the first oscillator 5a of the external screen display oscillator 5 is applied to the other input terminal of the clock pulse selection circuit 8a.

The first oscillator 5a uses a crystal oscillator, and for example, a first clock pulse C with a period of 31.25 μsec.
Generate JI. The screen display oscillator 5 also has a second oscillator 5b consisting of an RC oscillation circuit or an LC oscillation circuit, and the second oscillator 5b generates a second clock pulse CK2. The clock pulse as a result of the selection by the clock pulse selection circuit 8a is given to the screen display clock control circuit 3,
Synchronization with a horizontal synchronization signal for display, which is a signal of a specific period, is achieved. CPU clock oscillator 4 and first oscillator 5
The crystal oscillator used in a can oscillate a clock with a stable frequency, but there is a slight time lag between when voltage is applied to the crystal oscillator and when the clock is generated to start oscillation, so oscillation is usually stopped. Use it without letting it happen. Therefore, when using a clock generated by a crystal oscillator as an operating clock for the screen display device 2 (described later), it is first input to the screen display clock control circuit 3 and starts oscillating in accordance with the timing of the horizontal synchronization signal. It is necessary to generate a lock pulse like this.

The generated clock pulse is sent to the clock pulse selection circuit 8
It is given to one input terminal of b. The second clock pulse CK2 from the second oscillator 5b of the screen display oscillator 5 is applied to the other input terminal of the clock pulse selection circuit 8b, and one of them is switched. The clock pulse resulting from the selection is given to the screen display device 2, and the screen display device 2 operates using the given clock pulse as an operation clock.

On the other hand, the CPU 1 operates based on software stored in the memory 6. The memory 6 stores data to be stored in a register 7, which will be described later, and the data is given to the register 7 via the CPU 1.

The register 7 is an 8-bit register, and the value of the lower 3 bits thereof, for example, is outputted to the clock pulse selection circuits 8a and 8b according to the CPIJ1 instruction.

With this configuration, CPIJI operates using the CPU clock CK, but the screen display device 2 can also operate using either the CPU clock CK or clock pulses from the external screen display oscillator 5. can be selected by software.

That is, CPIJI gives a command to the register 7 based on the software stored in the memory 6, and from the register 7, the selection signal of the 3 pins is given to the clock pulse selection circuits 8a and 8b.

FIG. 2 is a circuit diagram showing an example of the clock pulse selection circuits 8a and 8b, and the lower three pins of the register 7 are given to each clock pulse selection circuit 8a and 8b from the register 7 as selection signals Ra, Rh, and Rc. . Selection signal R
a is a NAND gate 81a of the clock pulse selection circuit 8a
and one end of the NAND gate 81b of the clock pulse selection circuit 8b via the inverter 9 and one end of the clock pulse selection circuit 8b. A clock pulse from the screen display oscillator 5 is given to the other ends of NAND game) 81a and 81b, and when the selection signal Ra is "1", the clock selection circuit 8a is controlled, and when the selection signal Ra is "O", the clock selection circuit 8a is controlled. When the clock control circuit 8b is controlled, the output of the Nant gate 81a81b is output from the AND gate 8.
3a, and an inverter 82a at the other end.
, 82b respectively. The selection signals Rb and Rc are also respectively applied to one end of the ant gates 84a and 84b. The CPLI clock CK is applied to the other end of the AND gate 84a, and the output clock pulse of the screen display clock control circuit 3 is applied to the other end of the AND gate 84b. The outputs of AND gates 83a, 84a, 83b, 84b are Noah game)
85a and 85b separately.

When the selection signals Rb and Rc are “1”, it is an anti-game)
84a, 84b side output, that is, CPυ clock oscillator 4
In this case, the CPU clock CK is selected regardless of whether the selection signal Ra is "1" or "0". Moreover, the selection signal Ra=1, Rb
= 01Rc-1, AND gates 83a, 84b
The first clock pulse CKI from the first oscillator 5a of the screen display oscillator 5 is selected. In addition, when the selection signal Ra=O8Rc=O, the AND gate 83b
In other words, the second clock pulse (J2) from the second oscillator 5b of the screen display oscillator 5 is selected.In this case, regardless of whether the selection signal Rb is "1" or "0", the second clock pulse CK2 The following is summarized in Table 1.

Table 1 As shown above, the value in register 7 determines the CPU clock C.
In addition to being able to select the clock of K or the external screen display oscillator 5, it is also possible to select two types of screen display clocks (crystal oscillator or RC, LC oscillation circuit).

FIG. 3 is a block diagram when the first oscillator 5a using a crystal resonator is selected as the screen display oscillator 5,
Since the crystal oscillator is used without being stopped as described above, it is once input to the screen display clock control circuit 3 and starts oscillating in synchronization with the timing of the horizontal synchronizing signal.

FIG. 4 is a block diagram when the second oscillator 5b using an RC or LC oscillation circuit is selected as the screen display oscillator 5. In the case of an RC or LC oscillation circuit, even if the clock signal is started, the clock signal is immediately clocked. Since pulses can be generated, there is no need for manual input to the screen display clock control circuit 3, and the pulse can be directly used as the operating clock for the screen display device 3.

By installing the clock pulse selection circuits 8a and 8b in this manner, the frequency of the CPU clock CK is no longer restricted, and the clock of the screen display oscillator 5 can be used as the operating clock of the screen display device 2. The operating frequency can be easily changed.

Further, by providing clock pulse selection circuits before and after the screen display clock control circuit, any of a crystal resonator, an RC oscillation circuit, and an LC oscillation circuit can be used for screen display oscillation. Furthermore, it can operate even if the CP clock is selected as the operating clock for the screen display device 2, so in that case, there is no need to externally connect a screen display oscillator.
The number of pins can be reduced.

By using the microcomputer of this invention,
The TV system designer can select the pulse generation source for the operating clock of the screen display device in any number of ways.

[Effects of the Invention] As explained above, according to the present invention, since the selection means for selecting either the first clock for operating the CPU or the second clock having a different period from the first clock is provided, the screen display means If you want to operate with a clock with a different frequency from the first clock, you can select and operate the second clock, and the second clock can be used regardless of whether it is synchronized to the horizontal synchronization signal or not. Oscillators using various oscillators can be used, and excellent effects such as being able to be used in accordance with the design of various systems are achieved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a microcomputer according to the present invention, FIG. 2 is a block diagram mainly showing the configuration of the clock pulse selection circuit, and FIGS. 3 and 4 show that the clock pulse selection circuit is used for screen display. The fifth part is a block diagram showing the structure of a conventional microcomputer. 1...CPI+ 2...Screen display device 4...
cpu black. Oscillator 5...Screen display oscillator 8a, 8b...
- Clock pulse selection circuit In the figures, the same reference numerals indicate the same or equivalent parts. Agent Masuo Oiwa B Figure - (Voluntary) Patent Attorney General 1, Indication of the case Mochiganshima No. 2-204124 No. 28 Name of the invention Microcomputer 3, Representative of the person making the amendment Figure 5, Amendment ``Detailed description of the invention j column and drawing 6 of the subject specification, content of amendment 61 ``Detailed description of the invention'' column of the specification (1) Page 6, line 6 of the specification, ``For example, 31 The phrase ``first clock pulse with a period of 25 μsec'' has been corrected to ``first clock pulse''. (2) In the 7th line of page 7 of the specification, the phrase "second clock pulse from the second oscillator 5b" is corrected to "the second clock pulse synchronized with the horizontal synchronization signal from the second oscillator 5b". . (3) On page 8, line 20 of the specification, ``Register 7 is 8 bits'' is corrected to ``Register 7 is, for example, 8 bits.'' (4) Page 8, line 20 of the specification. In the line ``antogame''
83a' is replaced with 'and gate 83a, 83b.
I am corrected. (5) Table 1 on page 10 of the specification is amended as follows.

Claims (1)

[Claims] (1) C that operates with the first clock given externally
Operates with a clock synchronized with the PU and a signal with a specific period,
In a microcomputer equipped with a screen display means for displaying characters such as letters and symbols on a display screen, a first clock or a second clock having a period different from the first clock and generated by an external screen display oscillator is used.
and means for controlling the selection operation of the selection means, and the screen display means is configured to operate with the selected clock synchronized with the signal of the specific period. microcomputer.